CorebootPayloadPkg: Use extra braces to prevent gcc compile fail

[mirror_edk2.git] / CorebootModulePkg / Include / Coreboot.h

/** @file\r
  Coreboot PEI module include file.\r
\r
  Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
/*\r
 * This file is part of the libpayload project.\r
 *\r
 * Copyright (C) 2008 Advanced Micro Devices, Inc.\r
 *\r
 * Redistribution and use in source and binary forms, with or without\r
 * modification, are permitted provided that the following conditions\r
 * are met:\r
 * 1. Redistributions of source code must retain the above copyright\r
 *    notice, this list of conditions and the following disclaimer.\r
 * 2. Redistributions in binary form must reproduce the above copyright\r
 *    notice, this list of conditions and the following disclaimer in the\r
 *    documentation and/or other materials provided with the distribution.\r
 * 3. The name of the author may not be used to endorse or promote products\r
 *    derived from this software without specific prior written permission.\r
 *\r
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND\r
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE\r
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
 * SUCH DAMAGE.\r
 */\r
\r
\r
#ifndef _COREBOOT_PEI_H_INCLUDED_\r
#define _COREBOOT_PEI_H_INCLUDED_\r
\r
#pragma warning( disable : 4200 )\r
\r
#define DYN_CBMEM_ALIGN_SIZE (4096)\r
\r
struct cbmem_entry {\r
  UINT32 magic;\r
  UINT32 start;\r
  UINT32 size;\r
  UINT32 id;\r
};\r
\r
struct cbmem_root {\r
  UINT32 max_entries;\r
  UINT32 num_entries;\r
  UINT32 locked;\r
  UINT32 size;\r
  struct cbmem_entry entries[0];\r
};\r
\r
struct cbuint64 {\r
  UINT32 lo;\r
  UINT32 hi;\r
};\r
\r
#define CB_HEADER_SIGNATURE 0x4F49424C\r
\r
struct cb_header {\r
  UINT32 signature;\r
  UINT32 header_bytes;\r
  UINT32 header_checksum;\r
  UINT32 table_bytes;\r
  UINT32 table_checksum;\r
  UINT32 table_entries;\r
};\r
\r
struct cb_record {\r
  UINT32 tag;\r
  UINT32 size;\r
};\r
\r
#define CB_TAG_UNUSED     0x0000\r
#define CB_TAG_MEMORY     0x0001\r
\r
struct cb_memory_range {\r
  struct cbuint64 start;\r
  struct cbuint64 size;\r
  UINT32 type;\r
};\r
\r
#define CB_MEM_RAM    1\r
#define CB_MEM_RESERVED     2\r
#define CB_MEM_ACPI   3\r
#define CB_MEM_NVS    4\r
#define CB_MEM_UNUSABLE     5\r
#define CB_MEM_VENDOR_RSVD  6\r
#define CB_MEM_TABLE       16\r
\r
struct cb_memory {\r
  UINT32 tag;\r
  UINT32 size;\r
  struct cb_memory_range map[0];\r
};\r
\r
#define CB_TAG_MAINBOARD  0x0003\r
\r
struct cb_mainboard {\r
  UINT32 tag;\r
  UINT32 size;\r
  UINT8 vendor_idx;\r
  UINT8 part_number_idx;\r
  UINT8 strings[0];\r
};\r
#define CB_TAG_VERSION  0x0004\r
#define CB_TAG_EXTRA_VERSION  0x0005\r
#define CB_TAG_BUILD    0x0006\r
#define CB_TAG_COMPILE_TIME   0x0007\r
#define CB_TAG_COMPILE_BY     0x0008\r
#define CB_TAG_COMPILE_HOST   0x0009\r
#define CB_TAG_COMPILE_DOMAIN 0x000a\r
#define CB_TAG_COMPILER       0x000b\r
#define CB_TAG_LINKER   0x000c\r
#define CB_TAG_ASSEMBLER      0x000d\r
\r
struct cb_string {\r
  UINT32 tag;\r
  UINT32 size;\r
  UINT8 string[0];\r
};\r
\r
#define CB_TAG_SERIAL   0x000f\r
\r
struct cb_serial {\r
  UINT32 tag;\r
  UINT32 size;\r
#define CB_SERIAL_TYPE_IO_MAPPED     1\r
#define CB_SERIAL_TYPE_MEMORY_MAPPED 2\r
  UINT32 type;\r
  UINT32 baseaddr;\r
  UINT32 baud;\r
};\r
\r
#define CB_TAG_CONSOLE       0x00010\r
\r
struct cb_console {\r
  UINT32 tag;\r
  UINT32 size;\r
  UINT16 type;\r
};\r
\r
#define CB_TAG_CONSOLE_SERIAL8250 0\r
#define CB_TAG_CONSOLE_VGA  1 // OBSOLETE\r
#define CB_TAG_CONSOLE_BTEXT      2 // OBSOLETE\r
#define CB_TAG_CONSOLE_LOGBUF     3\r
#define CB_TAG_CONSOLE_SROM       4 // OBSOLETE\r
#define CB_TAG_CONSOLE_EHCI       5\r
\r
#define CB_TAG_FORWARD       0x00011\r
\r
struct cb_forward {\r
  UINT32 tag;\r
  UINT32 size;\r
  UINT64 forward;\r
};\r
\r
#define CB_TAG_FRAMEBUFFER      0x0012\r
struct cb_framebuffer {\r
  UINT32 tag;\r
  UINT32 size;\r
\r
  UINT64 physical_address;\r
  UINT32 x_resolution;\r
  UINT32 y_resolution;\r
  UINT32 bytes_per_line;\r
  UINT8 bits_per_pixel;\r
  UINT8 red_mask_pos;\r
  UINT8 red_mask_size;\r
  UINT8 green_mask_pos;\r
  UINT8 green_mask_size;\r
  UINT8 blue_mask_pos;\r
  UINT8 blue_mask_size;\r
  UINT8 reserved_mask_pos;\r
  UINT8 reserved_mask_size;\r
};\r
\r
#define CB_TAG_VDAT     0x0015\r
struct cb_vdat {\r
  UINT32 tag;\r
  UINT32 size;  /* size of the entire entry */\r
  UINT64 vdat_addr;\r
  UINT32 vdat_size;\r
};\r
\r
#define CB_TAG_TIMESTAMPS       0x0016\r
#define CB_TAG_CBMEM_CONSOLE    0x0017\r
#define CB_TAG_MRC_CACHE  0x0018\r
struct cb_cbmem_tab {\r
  UINT32 tag;\r
  UINT32 size;\r
  UINT64 cbmem_tab;\r
};\r
\r
/* Helpful macros */\r
\r
#define MEM_RANGE_COUNT(_rec) \\r
  (((_rec)->size - sizeof(*(_rec))) / sizeof((_rec)->map[0]))\r
\r
#define MEM_RANGE_PTR(_rec, _idx) \\r
  (void *)(((UINT8 *) (_rec)) + sizeof(*(_rec)) \\r
    + (sizeof((_rec)->map[0]) * (_idx)))\r
\r
\r
#endif // _COREBOOT_PEI_H_INCLUDED_\r