CorebootPayloadPkg: Use extra braces to prevent gcc compile fail
[mirror_edk2.git] / CorebootModulePkg / Include / Coreboot.h
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1/** @file\r
2 Coreboot PEI module include file.\r
3\r
4 Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
5 This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15/*\r
16 * This file is part of the libpayload project.\r
17 *\r
18 * Copyright (C) 2008 Advanced Micro Devices, Inc.\r
19 *\r
20 * Redistribution and use in source and binary forms, with or without\r
21 * modification, are permitted provided that the following conditions\r
22 * are met:\r
23 * 1. Redistributions of source code must retain the above copyright\r
24 * notice, this list of conditions and the following disclaimer.\r
25 * 2. Redistributions in binary form must reproduce the above copyright\r
26 * notice, this list of conditions and the following disclaimer in the\r
27 * documentation and/or other materials provided with the distribution.\r
28 * 3. The name of the author may not be used to endorse or promote products\r
29 * derived from this software without specific prior written permission.\r
30 *\r
31 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND\r
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE\r
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
41 * SUCH DAMAGE.\r
42 */\r
43\r
44\r
45#ifndef _COREBOOT_PEI_H_INCLUDED_\r
46#define _COREBOOT_PEI_H_INCLUDED_\r
47\r
48#pragma warning( disable : 4200 )\r
49\r
50#define DYN_CBMEM_ALIGN_SIZE (4096)\r
51\r
52struct cbmem_entry {\r
53 UINT32 magic;\r
54 UINT32 start;\r
55 UINT32 size;\r
56 UINT32 id;\r
57};\r
58\r
59struct cbmem_root {\r
60 UINT32 max_entries;\r
61 UINT32 num_entries;\r
62 UINT32 locked;\r
63 UINT32 size;\r
64 struct cbmem_entry entries[0];\r
65};\r
66\r
67struct cbuint64 {\r
68 UINT32 lo;\r
69 UINT32 hi;\r
70};\r
71\r
72#define CB_HEADER_SIGNATURE 0x4F49424C\r
73\r
74struct cb_header {\r
75 UINT32 signature;\r
76 UINT32 header_bytes;\r
77 UINT32 header_checksum;\r
78 UINT32 table_bytes;\r
79 UINT32 table_checksum;\r
80 UINT32 table_entries;\r
81};\r
82\r
83struct cb_record {\r
84 UINT32 tag;\r
85 UINT32 size;\r
86};\r
87\r
88#define CB_TAG_UNUSED 0x0000\r
89#define CB_TAG_MEMORY 0x0001\r
90\r
91struct cb_memory_range {\r
92 struct cbuint64 start;\r
93 struct cbuint64 size;\r
94 UINT32 type;\r
95};\r
96\r
97#define CB_MEM_RAM 1\r
98#define CB_MEM_RESERVED 2\r
99#define CB_MEM_ACPI 3\r
100#define CB_MEM_NVS 4\r
101#define CB_MEM_UNUSABLE 5\r
102#define CB_MEM_VENDOR_RSVD 6\r
103#define CB_MEM_TABLE 16\r
104\r
105struct cb_memory {\r
106 UINT32 tag;\r
107 UINT32 size;\r
108 struct cb_memory_range map[0];\r
109};\r
110\r
111#define CB_TAG_MAINBOARD 0x0003\r
112\r
113struct cb_mainboard {\r
114 UINT32 tag;\r
115 UINT32 size;\r
116 UINT8 vendor_idx;\r
117 UINT8 part_number_idx;\r
118 UINT8 strings[0];\r
119};\r
120#define CB_TAG_VERSION 0x0004\r
121#define CB_TAG_EXTRA_VERSION 0x0005\r
122#define CB_TAG_BUILD 0x0006\r
123#define CB_TAG_COMPILE_TIME 0x0007\r
124#define CB_TAG_COMPILE_BY 0x0008\r
125#define CB_TAG_COMPILE_HOST 0x0009\r
126#define CB_TAG_COMPILE_DOMAIN 0x000a\r
127#define CB_TAG_COMPILER 0x000b\r
128#define CB_TAG_LINKER 0x000c\r
129#define CB_TAG_ASSEMBLER 0x000d\r
130\r
131struct cb_string {\r
132 UINT32 tag;\r
133 UINT32 size;\r
134 UINT8 string[0];\r
135};\r
136\r
137#define CB_TAG_SERIAL 0x000f\r
138\r
139struct cb_serial {\r
140 UINT32 tag;\r
141 UINT32 size;\r
142#define CB_SERIAL_TYPE_IO_MAPPED 1\r
143#define CB_SERIAL_TYPE_MEMORY_MAPPED 2\r
144 UINT32 type;\r
145 UINT32 baseaddr;\r
146 UINT32 baud;\r
147};\r
148\r
149#define CB_TAG_CONSOLE 0x00010\r
150\r
151struct cb_console {\r
152 UINT32 tag;\r
153 UINT32 size;\r
154 UINT16 type;\r
155};\r
156\r
157#define CB_TAG_CONSOLE_SERIAL8250 0\r
158#define CB_TAG_CONSOLE_VGA 1 // OBSOLETE\r
159#define CB_TAG_CONSOLE_BTEXT 2 // OBSOLETE\r
160#define CB_TAG_CONSOLE_LOGBUF 3\r
161#define CB_TAG_CONSOLE_SROM 4 // OBSOLETE\r
162#define CB_TAG_CONSOLE_EHCI 5\r
163\r
164#define CB_TAG_FORWARD 0x00011\r
165\r
166struct cb_forward {\r
167 UINT32 tag;\r
168 UINT32 size;\r
169 UINT64 forward;\r
170};\r
171\r
172#define CB_TAG_FRAMEBUFFER 0x0012\r
173struct cb_framebuffer {\r
174 UINT32 tag;\r
175 UINT32 size;\r
176\r
177 UINT64 physical_address;\r
178 UINT32 x_resolution;\r
179 UINT32 y_resolution;\r
180 UINT32 bytes_per_line;\r
181 UINT8 bits_per_pixel;\r
182 UINT8 red_mask_pos;\r
183 UINT8 red_mask_size;\r
184 UINT8 green_mask_pos;\r
185 UINT8 green_mask_size;\r
186 UINT8 blue_mask_pos;\r
187 UINT8 blue_mask_size;\r
188 UINT8 reserved_mask_pos;\r
189 UINT8 reserved_mask_size;\r
190};\r
191\r
192#define CB_TAG_VDAT 0x0015\r
193struct cb_vdat {\r
194 UINT32 tag;\r
195 UINT32 size; /* size of the entire entry */\r
196 UINT64 vdat_addr;\r
197 UINT32 vdat_size;\r
198};\r
199\r
200#define CB_TAG_TIMESTAMPS 0x0016\r
201#define CB_TAG_CBMEM_CONSOLE 0x0017\r
202#define CB_TAG_MRC_CACHE 0x0018\r
203struct cb_cbmem_tab {\r
204 UINT32 tag;\r
205 UINT32 size;\r
206 UINT64 cbmem_tab;\r
207};\r
208\r
209/* Helpful macros */\r
210\r
211#define MEM_RANGE_COUNT(_rec) \\r
212 (((_rec)->size - sizeof(*(_rec))) / sizeof((_rec)->map[0]))\r
213\r
214#define MEM_RANGE_PTR(_rec, _idx) \\r
215 (void *)(((UINT8 *) (_rec)) + sizeof(*(_rec)) \\r
216 + (sizeof((_rec)->map[0]) * (_idx)))\r
217\r
218\r
219#endif // _COREBOOT_PEI_H_INCLUDED_\r