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IntelFsp2Pkg/Tools: Add BSF bit field support in GenCfgOpt tool
[mirror_edk2.git] / CorebootModulePkg / PciBusNoEnumerationDxe / PciCommand.h
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1/*++
2
3Copyright (c) 2005 - 2006, Intel Corporation. All rights reserved.<BR>
4This program and the accompanying materials
5are licensed and made available under the terms and conditions of the BSD License
6which accompanies this distribution. The full text of the license may be found at
7http://opensource.org/licenses/bsd-license.php
8
9THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11
12Module Name:
13
14 PciCommand.h
15
16Abstract:
17
18 PCI Bus Driver
19
20Revision History
21
22--*/
23
24#ifndef _EFI_PCI_COMMAND_H
25#define _EFI_PCI_COMMAND_H
26
27#include "PciBus.h"
28
29//
30// The PCI Command register bits owned by PCI Bus driver.
31//
32// They should be cleared at the beginning. The other registers
33// are owned by chipset, we should not touch them.
34//
35#define EFI_PCI_COMMAND_BITS_OWNED ( \
36 EFI_PCI_COMMAND_IO_SPACE | \
37 EFI_PCI_COMMAND_MEMORY_SPACE | \
38 EFI_PCI_COMMAND_BUS_MASTER | \
39 EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE | \
40 EFI_PCI_COMMAND_VGA_PALETTE_SNOOP | \
41 EFI_PCI_COMMAND_FAST_BACK_TO_BACK \
42 )
43
44//
45// The PCI Bridge Control register bits owned by PCI Bus driver.
46//
47// They should be cleared at the beginning. The other registers
48// are owned by chipset, we should not touch them.
49//
50#define EFI_PCI_BRIDGE_CONTROL_BITS_OWNED ( \
51 EFI_PCI_BRIDGE_CONTROL_ISA | \
52 EFI_PCI_BRIDGE_CONTROL_VGA | \
53 EFI_PCI_BRIDGE_CONTROL_VGA_16 | \
54 EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK \
55 )
56
57//
58// The PCCard Bridge Control register bits owned by PCI Bus driver.
59//
60// They should be cleared at the beginning. The other registers
61// are owned by chipset, we should not touch them.
62//
63#define EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED ( \
64 EFI_PCI_BRIDGE_CONTROL_ISA | \
65 EFI_PCI_BRIDGE_CONTROL_VGA | \
66 EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK \
67 )
68
69EFI_STATUS
70PciReadCommandRegister (
71 IN PCI_IO_DEVICE *PciIoDevice,
72 OUT UINT16 *Command
73);
74
75
76EFI_STATUS
77PciSetCommandRegister (
78 IN PCI_IO_DEVICE *PciIoDevice,
79 IN UINT16 Command
80);
81
82EFI_STATUS
83PciEnableCommandRegister (
84 IN PCI_IO_DEVICE *PciIoDevice,
85 IN UINT16 Command
86);
87
88EFI_STATUS
89PciDisableCommandRegister (
90 IN PCI_IO_DEVICE *PciIoDevice,
91 IN UINT16 Command
92);
93
94EFI_STATUS
95PciDisableBridgeControlRegister (
96 IN PCI_IO_DEVICE *PciIoDevice,
97 IN UINT16 Command
98);
99
100
101EFI_STATUS
102PciEnableBridgeControlRegister (
103 IN PCI_IO_DEVICE *PciIoDevice,
104 IN UINT16 Command
105);
106
107EFI_STATUS
108PciReadBridgeControlRegister (
109 IN PCI_IO_DEVICE *PciIoDevice,
110 OUT UINT16 *Command
111);
112
113BOOLEAN
114PciCapabilitySupport (
115 IN PCI_IO_DEVICE *PciIoDevice
116 )
117/*++
118
119Routine Description:
120
121 TODO: Add function description
122
123Arguments:
124
125 PciIoDevice - TODO: add argument description
126
127Returns:
128
129 TODO: add return values
130
131--*/
132;
133
134EFI_STATUS
135LocateCapabilityRegBlock (
136 IN PCI_IO_DEVICE *PciIoDevice,
137 IN UINT8 CapId,
138 IN OUT UINT8 *Offset,
139 OUT UINT8 *NextRegBlock OPTIONAL
140 )
141/*++
142
143Routine Description:
144
145 Locate Capability register.
146
147Arguments:
148
149 PciIoDevice - A pointer to the PCI_IO_DEVICE.
150 CapId - The capability ID.
151 Offset - A pointer to the offset.
152 As input: the default offset;
153 As output: the offset of the found block.
154 NextRegBlock - An optional pointer to return the value of next block.
155
156Returns:
157
158 EFI_UNSUPPORTED - The Pci Io device is not supported.
159 EFI_NOT_FOUND - The Pci Io device cannot be found.
160 EFI_SUCCESS - The Pci Io device is successfully located.
161
162--*/
163;
164
165
166#endif
167