projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 81a23a0f LL |
1 | /*++ |
| 2 | ||
| 3 | Copyright (c) 2005 - 2012, Intel Corporation. All rights reserved.<BR> | |
| 4 | This program and the accompanying materials | |
| 5 | are licensed and made available under the terms and conditions of the BSD License | |
| 6 | which accompanies this distribution. The full text of the license may be found at | |
| 7 | http://opensource.org/licenses/bsd-license.php | |
| 8 | ||
| 9 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, | |
| 10 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. | |
| 11 | ||
| 12 | Module Name: | |
| 13 | ||
| 14 | PciPowerManagement.c | |
| 15 | ||
| 16 | Abstract: | |
| 17 | ||
| 18 | PCI Bus Driver | |
| 19 | ||
| 20 | Revision History | |
| 21 | ||
| 22 | --*/ | |
| 23 | ||
| 24 | #include "PciBus.h" | |
| 25 | ||
| 26 | EFI_STATUS | |
| 27 | EFIAPI | |
| 28 | ResetPowerManagementFeature ( | |
| 29 | IN PCI_IO_DEVICE *PciIoDevice | |
| 30 | ) | |
| 31 | /*++ | |
| 32 | ||
| 33 | Routine Description: | |
| 34 | ||
| 35 | This function is intended to turn off PWE assertion and | |
| 36 | put the device to D0 state if the device supports | |
| 37 | PCI Power Management. | |
| 38 | ||
| 39 | Arguments: | |
| 40 | ||
| 41 | Returns: | |
| 42 | ||
| 43 | None | |
| 44 | ||
| 45 | --*/ | |
| 46 | { | |
| 47 | EFI_STATUS Status; | |
| 48 | UINT8 PowerManagementRegBlock; | |
| 49 | UINT16 PowerManagementCSR; | |
| 50 | ||
| 51 | PowerManagementRegBlock = 0; | |
| 52 | ||
| 53 | Status = LocateCapabilityRegBlock ( | |
| 54 | PciIoDevice, | |
| 55 | EFI_PCI_CAPABILITY_ID_PMI, | |
| 56 | &PowerManagementRegBlock, | |
| 57 | NULL | |
| 58 | ); | |
| 59 | ||
| 60 | if (EFI_ERROR (Status)) { | |
| 61 | return EFI_UNSUPPORTED; | |
| 62 | } | |
| 63 | ||
| 64 | // | |
| 65 | // Turn off the PWE assertion and put the device into D0 State | |
| 66 | // | |
| 67 | ||
| 68 | // | |
| 69 | // Read PMCSR | |
| 70 | // | |
| 71 | Status = PciIoDevice->PciIo.Pci.Read ( | |
| 72 | &PciIoDevice->PciIo, | |
| 73 | EfiPciIoWidthUint16, | |
| 74 | PowerManagementRegBlock + 4, | |
| 75 | 1, | |
| 76 | &PowerManagementCSR | |
| 77 | ); | |
| 78 | if (!EFI_ERROR (Status)) { | |
| 79 | // | |
| 80 | // Clear PME_Status bit | |
| 81 | // | |
| 82 | PowerManagementCSR |= BIT15; | |
| 83 | // | |
| 84 | // Clear PME_En bit. PowerState = D0. | |
| 85 | // | |
| 86 | PowerManagementCSR &= ~(BIT8 | BIT1 | BIT0); | |
| 87 | ||
| 88 | // | |
| 89 | // Write PMCSR | |
| 90 | // | |
| 91 | Status = PciIoDevice->PciIo.Pci.Write ( | |
| 92 | &PciIoDevice->PciIo, | |
| 93 | EfiPciIoWidthUint16, | |
| 94 | PowerManagementRegBlock + 4, | |
| 95 | 1, | |
| 96 | &PowerManagementCSR | |
| 97 | ); | |
| 98 | } | |
| 99 | return Status; | |
| 100 | } |