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[mirror_edk2.git] / CorebootPayloadPkg / Library / PlatformBdsLib / BdsPlatform.h
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1/** @file\r
2 Head file for BDS Platform specific code\r
3\r
4Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
5This program and the accompanying materials\r
6are licensed and made available under the terms and conditions of the BSD License\r
7which accompanies this distribution. The full text of the license may be found at\r
8http://opensource.org/licenses/bsd-license.php\r
9\r
10THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#ifndef _PLATFORM_SPECIFIC_BDS_PLATFORM_H_\r
16#define _PLATFORM_SPECIFIC_BDS_PLATFORM_H_\r
17\r
18#include <PiDxe.h>\r
19#include <IndustryStandard/Pci.h>\r
20#include <Library/DebugLib.h>\r
21#include <Library/BaseMemoryLib.h>\r
22#include <Library/UefiBootServicesTableLib.h>\r
23#include <Library/MemoryAllocationLib.h>\r
24#include <Library/BaseLib.h>\r
25#include <Library/PcdLib.h>\r
26#include <Library/GenericBdsLib.h>\r
27#include <Library/PlatformBdsLib.h>\r
28#include <Library/UefiLib.h>\r
29#include <Library/DevicePathLib.h>\r
30\r
31#include <Protocol/PciIo.h>\r
32#include <Protocol/SerialIo.h>\r
33\r
34#include <Guid/GlobalVariable.h>\r
35extern BDS_CONSOLE_CONNECT_ENTRY gPlatformConsole[];\r
36extern EFI_DEVICE_PATH_PROTOCOL *gPlatformConnectSequence[];\r
37extern EFI_DEVICE_PATH_PROTOCOL *gPlatformDriverOption[];\r
38extern EFI_DEVICE_PATH_PROTOCOL *gPlatformRootBridges[];\r
39extern ACPI_HID_DEVICE_PATH gPnp16550ComPortDeviceNode;\r
40extern UART_DEVICE_PATH gUartDeviceNode;\r
41extern VENDOR_DEVICE_PATH gTerminalTypeDeviceNode;\r
42extern VENDOR_DEVICE_PATH gUartDeviceVenderNode;\r
43\r
44//\r
45//\r
46//\r
47#define VarConsoleInpDev L"ConInDev"\r
48#define VarConsoleInp L"ConIn"\r
49#define VarConsoleOutDev L"ConOutDev"\r
50#define VarConsoleOut L"ConOut"\r
51#define VarErrorOutDev L"ErrOutDev"\r
52#define VarErrorOut L"ErrOut"\r
53\r
54#define PCI_DEVICE_PATH_NODE(Func, Dev) \\r
55 { \\r
56 { \\r
57 HARDWARE_DEVICE_PATH, \\r
58 HW_PCI_DP, \\r
59 { \\r
60 (UINT8) (sizeof (PCI_DEVICE_PATH)), \\r
61 (UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8) \\r
62 } \\r
63 }, \\r
64 (Func), \\r
65 (Dev) \\r
66 }\r
67\r
68#define PNPID_DEVICE_PATH_NODE(PnpId) \\r
69 { \\r
70 { \\r
71 ACPI_DEVICE_PATH, \\r
72 ACPI_DP, \\r
73 { \\r
74 (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)), \\r
75 (UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8) \\r
76 }, \\r
77 }, \\r
78 EISA_PNP_ID((PnpId)), \\r
79 0 \\r
80 }\r
81\r
82#define gPciRootBridge \\r
83 PNPID_DEVICE_PATH_NODE(0x0A03)\r
84#define gPnp16550ComPort \\r
85 PNPID_DEVICE_PATH_NODE(0x0501)\r
86\r
87#define gUartVender \\r
88 { \\r
89 { \\r
90 HARDWARE_DEVICE_PATH, \\r
91 HW_VENDOR_DP, \\r
92 { \\r
93 (UINT8) (sizeof (VENDOR_DEVICE_PATH)), \\r
94 (UINT8) ((sizeof (VENDOR_DEVICE_PATH)) >> 8) \\r
95 } \\r
96 }, \\r
97 EFI_SERIAL_IO_PROTOCOL_GUID \\r
98 }\r
99 \r
100#define gUart \\r
101 { \\r
102 { \\r
103 MESSAGING_DEVICE_PATH, \\r
104 MSG_UART_DP, \\r
105 { \\r
106 (UINT8) (sizeof (UART_DEVICE_PATH)), \\r
107 (UINT8) ((sizeof (UART_DEVICE_PATH)) >> 8) \\r
108 } \\r
109 }, \\r
110 0, \\r
111 115200, \\r
112 8, \\r
113 1, \\r
114 1 \\r
115 }\r
116\r
117#define gPcAnsiTerminal \\r
118 { \\r
119 { \\r
120 MESSAGING_DEVICE_PATH, \\r
121 MSG_VENDOR_DP, \\r
122 { \\r
123 (UINT8) (sizeof (VENDOR_DEVICE_PATH)), \\r
124 (UINT8) ((sizeof (VENDOR_DEVICE_PATH)) >> 8) \\r
125 } \\r
126 }, \\r
127 DEVICE_PATH_MESSAGING_PC_ANSI \\r
128 }\r
129\r
130#define gEndEntire \\r
131 { \\r
132 END_DEVICE_PATH_TYPE, \\r
133 END_ENTIRE_DEVICE_PATH_SUBTYPE, \\r
134 { \\r
135 END_DEVICE_PATH_LENGTH, \\r
136 0 \\r
137 } \\r
138 }\r
139#define PCI_CLASS_SCC 0x07\r
140#define PCI_SUBCLASS_SERIAL 0x00\r
141#define PCI_IF_16550 0x02\r
142#define IS_PCI_16550SERIAL(_p) IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550)\r
143\r
144#define IS_PCI_ISA_PDECODE(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA_PDECODE, 0)\r
145\r
146//\r
147// Platform Root Bridge\r
148//\r
149typedef struct {\r
150 ACPI_HID_DEVICE_PATH PciRootBridge;\r
151 EFI_DEVICE_PATH_PROTOCOL End;\r
152} PLATFORM_ROOT_BRIDGE_DEVICE_PATH;\r
153EFI_STATUS\r
154PlatformBdsNoConsoleAction (\r
155 VOID\r
156 );\r
157VOID\r
158PlatformBdsEnterFrontPage (\r
159 IN UINT16 TimeoutDefault,\r
160 IN BOOLEAN ConnectAllHappened\r
161 );\r
162#endif // _PLATFORM_SPECIFIC_BDS_PLATFORM_H_\r