[mirror_edk2.git] / DuetPkg / Include / IndustryStandard / LegacyBiosMpTable.h

/*++\r
\r
Copyright (c) 2007, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials                          \r
are licensed and made available under the terms and conditions of the BSD License         \r
which accompanies this distribution.  The full text of the license may be found at        \r
http://opensource.org/licenses/bsd-license.php                                            \r
                                                                                          \r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
\r
Module Name:\r
\r
  LegacyBiosMpTable.h\r
\r
Abstract:\r
  Defives data structures per Multi Processor Specification Ver 1.4.\r
\r
--*/\r
\r
#ifndef LEGACY_BIOS_MPTABLE_H_\r
#define LEGACY_BIOS_MPTABLE_H_\r
\r
#define EFI_LEGACY_MP_TABLE_REV_1_4 0x04\r
\r
//\r
// Define MP table structures. All are packed.\r
//\r
#pragma pack(push, 1)\r
\r
#define EFI_LEGACY_MP_TABLE_FLOATING_POINTER_SIGNATURE  SIGNATURE_32 ('_', 'M', 'P', '_')\r
typedef struct {\r
  UINT32  Signature;\r
  UINT32  PhysicalAddress;\r
  UINT8   Length;\r
  UINT8   SpecRev;\r
  UINT8   Checksum;\r
  UINT8   FeatureByte1;\r
  struct {\r
    UINT32  Reserved1 : 6;\r
    UINT32  MutipleClk : 1;\r
    UINT32  Imcr : 1;\r
    UINT32  Reserved2 : 24;\r
  } FeatureByte2_5;\r
} EFI_LEGACY_MP_TABLE_FLOATING_POINTER;\r
\r
#define EFI_LEGACY_MP_TABLE_HEADER_SIGNATURE  SIGNATURE_32 ('P', 'C', 'M', 'P')\r
typedef struct {\r
  UINT32  Signature;\r
  UINT16  BaseTableLength;\r
  UINT8   SpecRev;\r
  UINT8   Checksum;\r
  CHAR8   OemId[8];\r
  CHAR8   OemProductId[12];\r
  UINT32  OemTablePointer;\r
  UINT16  OemTableSize;\r
  UINT16  EntryCount;\r
  UINT32  LocalApicAddress;\r
  UINT16  ExtendedTableLength;\r
  UINT8   ExtendedChecksum;\r
  UINT8   Reserved;\r
} EFI_LEGACY_MP_TABLE_HEADER;\r
\r
typedef struct {\r
  UINT8 EntryType;\r
} EFI_LEGACY_MP_TABLE_ENTRY_TYPE;\r
\r
//\r
// Entry Type 0: Processor.\r
//\r
#define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_PROCESSOR  0x00\r
typedef struct {\r
  UINT8 EntryType;\r
  UINT8 Id;\r
  UINT8 Ver;\r
  struct {\r
    UINT8 Enabled : 1;\r
    UINT8 Bsp : 1;\r
    UINT8 Reserved : 6;\r
  } Flags;\r
  struct {\r
    UINT32  Stepping : 4;\r
    UINT32  Model : 4;\r
    UINT32  Family : 4;\r
    UINT32  Reserved : 20;\r
  } Signature;\r
  struct {\r
    UINT32  Fpu : 1;\r
    UINT32  Reserved1 : 6;\r
    UINT32  Mce : 1;\r
    UINT32  Cx8 : 1;\r
    UINT32  Apic : 1;\r
    UINT32  Reserved2 : 22;\r
  } Features;\r
  UINT32  Reserved1;\r
  UINT32  Reserved2;\r
} EFI_LEGACY_MP_TABLE_ENTRY_PROCESSOR;\r
\r
//\r
// Entry Type 1: Bus.\r
//\r
#define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_BUS  0x01\r
typedef struct {\r
  UINT8 EntryType;\r
  UINT8 Id;\r
  CHAR8 TypeString[6];\r
} EFI_LEGACY_MP_TABLE_ENTRY_BUS;\r
\r
#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_CBUS   "CBUS  "  // Corollary CBus\r
#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_CBUSII "CBUSII"  // Corollary CBUS II\r
#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_EISA   "EISA  "  // Extended ISA\r
#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_FUTURE "FUTURE"  // IEEE FutureBus\r
#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_INTERN "INTERN"  // Internal bus\r
#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_ISA    "ISA   "  // Industry Standard Architecture\r
#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MBI    "MBI   "  // Multibus I\r
#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MBII   "MBII  "  // Multibus II\r
#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MCA    "MCA   "  // Micro Channel Architecture\r
#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MPI    "MPI   "  // MPI\r
#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MPSA   "MPSA  "  // MPSA\r
#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_NUBUS  "NUBUS "  // Apple Macintosh NuBus\r
#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_PCI    "PCI   "  // Peripheral Component Interconnect\r
#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_PCMCIA "PCMCIA"  // PC Memory Card International Assoc.\r
#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_TC     "TC    "  // DEC TurboChannel\r
#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_VL     "VL    "  // VESA Local Bus\r
#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_VME    "VME   "  // VMEbus\r
#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_XPRESS "XPRESS"  // Express System Bus\r
//\r
// Entry Type 2: I/O APIC.\r
//\r
#define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_IOAPIC 0x02\r
typedef struct {\r
  UINT8 EntryType;\r
  UINT8 Id;\r
  UINT8 Ver;\r
  struct {\r
    UINT8 Enabled : 1;\r
    UINT8 Reserved : 7;\r
  } Flags;\r
  UINT32  Address;\r
} EFI_LEGACY_MP_TABLE_ENTRY_IOAPIC;\r
\r
//\r
// Entry Type 3: I/O Interrupt Assignment.\r
//\r
#define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_IO_INT 0x03\r
typedef struct {\r
  UINT8 EntryType;\r
  UINT8 IntType;\r
  struct {\r
    UINT16  Polarity : 2;\r
    UINT16  Trigger : 2;\r
    UINT16  Reserved : 12;\r
  } Flags;\r
  UINT8 SourceBusId;\r
  union {\r
    struct {\r
      UINT8 IntNo : 2;\r
      UINT8 Dev : 5;\r
      UINT8 Reserved : 1;\r
    } fields;\r
    UINT8 byte;\r
  } SourceBusIrq;\r
  UINT8 DestApicId;\r
  UINT8 DestApicIntIn;\r
} EFI_LEGACY_MP_TABLE_ENTRY_IO_INT;\r
\r
typedef enum {\r
  EfiLegacyMpTableEntryIoIntTypeInt   = 0,\r
  EfiLegacyMpTableEntryIoIntTypeNmi   = 1,\r
  EfiLegacyMpTableEntryIoIntTypeSmi   = 2,\r
  EfiLegacyMpTableEntryIoIntTypeExtInt= 3,\r
} EFI_LEGACY_MP_TABLE_ENTRY_IO_INT_TYPE;\r
\r
typedef enum {\r
  EfiLegacyMpTableEntryIoIntFlagsPolaritySpec       = 0x0,\r
  EfiLegacyMpTableEntryIoIntFlagsPolarityActiveHigh = 0x1,\r
  EfiLegacyMpTableEntryIoIntFlagsPolarityReserved   = 0x2,\r
  EfiLegacyMpTableEntryIoIntFlagsPolarityActiveLow  = 0x3,\r
} EFI_LEGACY_MP_TABLE_ENTRY_IO_INT_FLAGS_POLARITY;\r
\r
typedef enum {\r
  EfiLegacyMpTableEntryIoIntFlagsTriggerSpec        = 0x0,\r
  EfiLegacyMpTableEntryIoIntFlagsTriggerEdge        = 0x1,\r
  EfiLegacyMpTableEntryIoIntFlagsTriggerReserved    = 0x2,\r
  EfiLegacyMpTableEntryIoIntFlagsTriggerLevel       = 0x3,\r
} EFI_LEGACY_MP_TABLE_ENTRY_IO_INT_FLAGS_TRIGGER;\r
\r
//\r
// Entry Type 4: Local Interrupt Assignment.\r
//\r
#define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_LOCAL_INT  0x04\r
typedef struct {\r
  UINT8 EntryType;\r
  UINT8 IntType;\r
  struct {\r
    UINT16  Polarity : 2;\r
    UINT16  Trigger : 2;\r
    UINT16  Reserved : 12;\r
  } Flags;\r
  UINT8 SourceBusId;\r
  UINT8 SourceBusIrq;\r
  UINT8 DestApicId;\r
  UINT8 DestApicIntIn;\r
} EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT;\r
\r
typedef enum {\r
  EfiLegacyMpTableEntryLocalIntTypeInt              = 0,\r
  EfiLegacyMpTableEntryLocalIntTypeNmi              = 1,\r
  EfiLegacyMpTableEntryLocalIntTypeSmi              = 2,\r
  EfiLegacyMpTableEntryLocalIntTypeExtInt           = 3,\r
} EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT_TYPE;\r
\r
typedef enum {\r
  EfiLegacyMpTableEntryLocalIntFlagsPolaritySpec      = 0x0,\r
  EfiLegacyMpTableEntryLocalIntFlagsPolarityActiveHigh= 0x1,\r
  EfiLegacyMpTableEntryLocalIntFlagsPolarityReserved  = 0x2,\r
  EfiLegacyMpTableEntryLocalIntFlagsPolarityActiveLow = 0x3,\r
} EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT_FLAGS_POLARITY;\r
\r
typedef enum {\r
  EfiLegacyMpTableEntryLocalIntFlagsTriggerSpec       = 0x0,\r
  EfiLegacyMpTableEntryLocalIntFlagsTriggerEdge       = 0x1,\r
  EfiLegacyMpTableEntryLocalIntFlagsTriggerReserved   = 0x2,\r
  EfiLegacyMpTableEntryLocalIntFlagsTriggerLevel      = 0x3,\r
} EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT_FLAGS_TRIGGER;\r
\r
//\r
// Entry Type 128: System Address Space Mapping.\r
//\r
#define EFI_LEGACY_MP_TABLE_ENTRY_EXT_TYPE_SYS_ADDR_SPACE_MAPPING 0x80\r
typedef struct {\r
  UINT8   EntryType;\r
  UINT8   Length;\r
  UINT8   BusId;\r
  UINT8   AddressType;\r
  UINT64  AddressBase;\r
  UINT64  AddressLength;\r
} EFI_LEGACY_MP_TABLE_ENTRY_EXT_SYS_ADDR_SPACE_MAPPING;\r
\r
typedef enum {\r
  EfiLegacyMpTableEntryExtSysAddrSpaceMappingIo       = 0,\r
  EfiLegacyMpTableEntryExtSysAddrSpaceMappingMemory   = 1,\r
  EfiLegacyMpTableEntryExtSysAddrSpaceMappingPrefetch = 2,\r
} EFI_LEGACY_MP_TABLE_ENTRY_EXT_SYS_ADDR_SPACE_MAPPING_TYPE;\r
\r
//\r
// Entry Type 129: Bus Hierarchy.\r
//\r
#define EFI_LEGACY_MP_TABLE_ENTRY_EXT_TYPE_BUS_HIERARCHY  0x81\r
typedef struct {\r
  UINT8 EntryType;\r
  UINT8 Length;\r
  UINT8 BusId;\r
  struct {\r
    UINT8 SubtractiveDecode : 1;\r
    UINT8 Reserved : 7;\r
  } BusInfo;\r
  UINT8 ParentBus;\r
  UINT8 Reserved1;\r
  UINT8 Reserved2;\r
  UINT8 Reserved3;\r
} EFI_LEGACY_MP_TABLE_ENTRY_EXT_BUS_HIERARCHY;\r
\r
//\r
// Entry Type 130: Compatibility Bus Address Space Modifier.\r
//\r
#define EFI_LEGACY_MP_TABLE_ENTRY_EXT_TYPE_COMPAT_BUS_ADDR_SPACE_MODIFIER 0x82\r
typedef struct {\r
  UINT8 EntryType;\r
  UINT8 Length;\r
  UINT8 BusId;\r
  struct {\r
    UINT8 RangeMode : 1;\r
    UINT8 Reserved : 7;\r
  } AddrMode;\r
  UINT32  PredefinedRangeList;\r
} EFI_LEGACY_MP_TABLE_ENTRY_EXT_COMPAT_BUS_ADDR_SPACE_MODIFIER;\r
\r
#pragma pack(pop)\r
\r
#endif\r
Commit	Line	Data
6d09f048	1	/*++\r
6d09f048	2	\r
b1f700a8 HT	3	Copyright (c) 2007, Intel Corporation. All rights reserved.<BR>\r
b1f700a8 HT	4	This program and the accompanying materials \r
6d09f048	5	are licensed and made available under the terms and conditions of the BSD License \r
	6	which accompanies this distribution. The full text of the license may be found at \r
	7	http://opensource.org/licenses/bsd-license.php \r
	8	\r
	9	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
	10	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
	11	\r
	12	Module Name:\r
	13	\r
	14	LegacyBiosMpTable.h\r
	15	\r
	16	Abstract:\r
	17	Defives data structures per Multi Processor Specification Ver 1.4.\r
	18	\r
	19	--*/\r
	20	\r
	21	#ifndef LEGACY_BIOS_MPTABLE_H_\r
	22	#define LEGACY_BIOS_MPTABLE_H_\r
	23	\r
	24	#define EFI_LEGACY_MP_TABLE_REV_1_4 0x04\r
	25	\r
	26	//\r
	27	// Define MP table structures. All are packed.\r
	28	//\r
	29	#pragma pack(push, 1)\r
	30	\r
eea53ce1	31	#define EFI_LEGACY_MP_TABLE_FLOATING_POINTER_SIGNATURE SIGNATURE_32 ('_', 'M', 'P', '_')\r
6d09f048	32	typedef struct {\r
	33	UINT32 Signature;\r
	34	UINT32 PhysicalAddress;\r
	35	UINT8 Length;\r
	36	UINT8 SpecRev;\r
	37	UINT8 Checksum;\r
	38	UINT8 FeatureByte1;\r
	39	struct {\r
	40	UINT32 Reserved1 : 6;\r
	41	UINT32 MutipleClk : 1;\r
	42	UINT32 Imcr : 1;\r
	43	UINT32 Reserved2 : 24;\r
	44	} FeatureByte2_5;\r
	45	} EFI_LEGACY_MP_TABLE_FLOATING_POINTER;\r
	46	\r
eea53ce1	47	#define EFI_LEGACY_MP_TABLE_HEADER_SIGNATURE SIGNATURE_32 ('P', 'C', 'M', 'P')\r
6d09f048	48	typedef struct {\r
	49	UINT32 Signature;\r
	50	UINT16 BaseTableLength;\r
	51	UINT8 SpecRev;\r
	52	UINT8 Checksum;\r
	53	CHAR8 OemId[8];\r
	54	CHAR8 OemProductId[12];\r
	55	UINT32 OemTablePointer;\r
	56	UINT16 OemTableSize;\r
	57	UINT16 EntryCount;\r
	58	UINT32 LocalApicAddress;\r
	59	UINT16 ExtendedTableLength;\r
	60	UINT8 ExtendedChecksum;\r
	61	UINT8 Reserved;\r
	62	} EFI_LEGACY_MP_TABLE_HEADER;\r
	63	\r
	64	typedef struct {\r
	65	UINT8 EntryType;\r
	66	} EFI_LEGACY_MP_TABLE_ENTRY_TYPE;\r
	67	\r
	68	//\r
	69	// Entry Type 0: Processor.\r
	70	//\r
	71	#define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_PROCESSOR 0x00\r
	72	typedef struct {\r
	73	UINT8 EntryType;\r
	74	UINT8 Id;\r
	75	UINT8 Ver;\r
	76	struct {\r
	77	UINT8 Enabled : 1;\r
	78	UINT8 Bsp : 1;\r
	79	UINT8 Reserved : 6;\r
	80	} Flags;\r
	81	struct {\r
	82	UINT32 Stepping : 4;\r
	83	UINT32 Model : 4;\r
	84	UINT32 Family : 4;\r
	85	UINT32 Reserved : 20;\r
	86	} Signature;\r
	87	struct {\r
	88	UINT32 Fpu : 1;\r
	89	UINT32 Reserved1 : 6;\r
	90	UINT32 Mce : 1;\r
	91	UINT32 Cx8 : 1;\r
	92	UINT32 Apic : 1;\r
	93	UINT32 Reserved2 : 22;\r
	94	} Features;\r
	95	UINT32 Reserved1;\r
	96	UINT32 Reserved2;\r
	97	} EFI_LEGACY_MP_TABLE_ENTRY_PROCESSOR;\r
	98	\r
	99	//\r
	100	// Entry Type 1: Bus.\r
	101	//\r
	102	#define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_BUS 0x01\r
	103	typedef struct {\r
	104	UINT8 EntryType;\r
	105	UINT8 Id;\r
	106	CHAR8 TypeString[6];\r
	107	} EFI_LEGACY_MP_TABLE_ENTRY_BUS;\r
	108	\r
	109	#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_CBUS "CBUS " // Corollary CBus\r
	110	#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_CBUSII "CBUSII" // Corollary CBUS II\r
	111	#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_EISA "EISA " // Extended ISA\r
112	#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_FUTURE "FUTURE" // IEEE FutureBus\r
113	#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_INTERN "INTERN" // Internal bus\r
114	#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_ISA "ISA " // Industry Standard Architecture\r
115	#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MBI "MBI " // Multibus I\r
116	#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MBII "MBII " // Multibus II\r
117	#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MCA "MCA " // Micro Channel Architecture\r
118	#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MPI "MPI " // MPI\r
119	#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MPSA "MPSA " // MPSA\r
120	#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_NUBUS "NUBUS " // Apple Macintosh NuBus\r
121	#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_PCI "PCI " // Peripheral Component Interconnect\r
122	#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_PCMCIA "PCMCIA" // PC Memory Card International Assoc.\r
123	#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_TC "TC " // DEC TurboChannel\r
124	#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_VL "VL " // VESA Local Bus\r
125	#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_VME "VME " // VMEbus\r
126	#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_XPRESS "XPRESS" // Express System Bus\r
127	//\r
128	// Entry Type 2: I/O APIC.\r
129	//\r
130	#define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_IOAPIC 0x02\r
131	typedef struct {\r
132	UINT8 EntryType;\r
133	UINT8 Id;\r
134	UINT8 Ver;\r
135	struct {\r
136	UINT8 Enabled : 1;\r
137	UINT8 Reserved : 7;\r
138	} Flags;\r
139	UINT32 Address;\r
140	} EFI_LEGACY_MP_TABLE_ENTRY_IOAPIC;\r
141	\r
142	//\r
143	// Entry Type 3: I/O Interrupt Assignment.\r
144	//\r
145	#define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_IO_INT 0x03\r
146	typedef struct {\r
147	UINT8 EntryType;\r
148	UINT8 IntType;\r
149	struct {\r
150	UINT16 Polarity : 2;\r
151	UINT16 Trigger : 2;\r
152	UINT16 Reserved : 12;\r
153	} Flags;\r
154	UINT8 SourceBusId;\r
155	union {\r
156	struct {\r
157	UINT8 IntNo : 2;\r
158	UINT8 Dev : 5;\r
159	UINT8 Reserved : 1;\r
160	} fields;\r
161	UINT8 byte;\r
162	} SourceBusIrq;\r
163	UINT8 DestApicId;\r
164	UINT8 DestApicIntIn;\r
165	} EFI_LEGACY_MP_TABLE_ENTRY_IO_INT;\r
166	\r
167	typedef enum {\r
168	EfiLegacyMpTableEntryIoIntTypeInt = 0,\r
169	EfiLegacyMpTableEntryIoIntTypeNmi = 1,\r
170	EfiLegacyMpTableEntryIoIntTypeSmi = 2,\r
171	EfiLegacyMpTableEntryIoIntTypeExtInt= 3,\r
172	} EFI_LEGACY_MP_TABLE_ENTRY_IO_INT_TYPE;\r
173	\r
174	typedef enum {\r
175	EfiLegacyMpTableEntryIoIntFlagsPolaritySpec = 0x0,\r
176	EfiLegacyMpTableEntryIoIntFlagsPolarityActiveHigh = 0x1,\r
177	EfiLegacyMpTableEntryIoIntFlagsPolarityReserved = 0x2,\r
178	EfiLegacyMpTableEntryIoIntFlagsPolarityActiveLow = 0x3,\r
179	} EFI_LEGACY_MP_TABLE_ENTRY_IO_INT_FLAGS_POLARITY;\r
180	\r
181	typedef enum {\r
182	EfiLegacyMpTableEntryIoIntFlagsTriggerSpec = 0x0,\r
183	EfiLegacyMpTableEntryIoIntFlagsTriggerEdge = 0x1,\r
184	EfiLegacyMpTableEntryIoIntFlagsTriggerReserved = 0x2,\r
185	EfiLegacyMpTableEntryIoIntFlagsTriggerLevel = 0x3,\r
186	} EFI_LEGACY_MP_TABLE_ENTRY_IO_INT_FLAGS_TRIGGER;\r
187	\r
188	//\r
189	// Entry Type 4: Local Interrupt Assignment.\r
190	//\r
191	#define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_LOCAL_INT 0x04\r
192	typedef struct {\r
193	UINT8 EntryType;\r
194	UINT8 IntType;\r
195	struct {\r
196	UINT16 Polarity : 2;\r
197	UINT16 Trigger : 2;\r
198	UINT16 Reserved : 12;\r
199	} Flags;\r
200	UINT8 SourceBusId;\r
201	UINT8 SourceBusIrq;\r
202	UINT8 DestApicId;\r
203	UINT8 DestApicIntIn;\r
204	} EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT;\r
205	\r
206	typedef enum {\r
207	EfiLegacyMpTableEntryLocalIntTypeInt = 0,\r
208	EfiLegacyMpTableEntryLocalIntTypeNmi = 1,\r
209	EfiLegacyMpTableEntryLocalIntTypeSmi = 2,\r
210	EfiLegacyMpTableEntryLocalIntTypeExtInt = 3,\r
211	} EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT_TYPE;\r
212	\r
213	typedef enum {\r
214	EfiLegacyMpTableEntryLocalIntFlagsPolaritySpec = 0x0,\r
215	EfiLegacyMpTableEntryLocalIntFlagsPolarityActiveHigh= 0x1,\r
216	EfiLegacyMpTableEntryLocalIntFlagsPolarityReserved = 0x2,\r
217	EfiLegacyMpTableEntryLocalIntFlagsPolarityActiveLow = 0x3,\r
218	} EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT_FLAGS_POLARITY;\r
219	\r
220	typedef enum {\r
221	EfiLegacyMpTableEntryLocalIntFlagsTriggerSpec = 0x0,\r
222	EfiLegacyMpTableEntryLocalIntFlagsTriggerEdge = 0x1,\r
223	EfiLegacyMpTableEntryLocalIntFlagsTriggerReserved = 0x2,\r
224	EfiLegacyMpTableEntryLocalIntFlagsTriggerLevel = 0x3,\r
225	} EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT_FLAGS_TRIGGER;\r
226	\r
227	//\r
228	// Entry Type 128: System Address Space Mapping.\r
229	//\r
230	#define EFI_LEGACY_MP_TABLE_ENTRY_EXT_TYPE_SYS_ADDR_SPACE_MAPPING 0x80\r
231	typedef struct {\r
232	UINT8 EntryType;\r
233	UINT8 Length;\r
234	UINT8 BusId;\r
235	UINT8 AddressType;\r
236	UINT64 AddressBase;\r
237	UINT64 AddressLength;\r
238	} EFI_LEGACY_MP_TABLE_ENTRY_EXT_SYS_ADDR_SPACE_MAPPING;\r
239	\r
240	typedef enum {\r
241	EfiLegacyMpTableEntryExtSysAddrSpaceMappingIo = 0,\r
242	EfiLegacyMpTableEntryExtSysAddrSpaceMappingMemory = 1,\r
243	EfiLegacyMpTableEntryExtSysAddrSpaceMappingPrefetch = 2,\r
244	} EFI_LEGACY_MP_TABLE_ENTRY_EXT_SYS_ADDR_SPACE_MAPPING_TYPE;\r
245	\r
246	//\r
247	// Entry Type 129: Bus Hierarchy.\r
248	//\r
249	#define EFI_LEGACY_MP_TABLE_ENTRY_EXT_TYPE_BUS_HIERARCHY 0x81\r
250	typedef struct {\r
251	UINT8 EntryType;\r
252	UINT8 Length;\r
253	UINT8 BusId;\r
254	struct {\r
255	UINT8 SubtractiveDecode : 1;\r
256	UINT8 Reserved : 7;\r
257	} BusInfo;\r
258	UINT8 ParentBus;\r
259	UINT8 Reserved1;\r
260	UINT8 Reserved2;\r
261	UINT8 Reserved3;\r
262	} EFI_LEGACY_MP_TABLE_ENTRY_EXT_BUS_HIERARCHY;\r
263	\r
264	//\r
265	// Entry Type 130: Compatibility Bus Address Space Modifier.\r
266	//\r
267	#define EFI_LEGACY_MP_TABLE_ENTRY_EXT_TYPE_COMPAT_BUS_ADDR_SPACE_MODIFIER 0x82\r
268	typedef struct {\r
269	UINT8 EntryType;\r
270	UINT8 Length;\r
271	UINT8 BusId;\r
272	struct {\r
273	UINT8 RangeMode : 1;\r
274	UINT8 Reserved : 7;\r
275	} AddrMode;\r
276	UINT32 PredefinedRangeList;\r
277	} EFI_LEGACY_MP_TABLE_ENTRY_EXT_COMPAT_BUS_ADDR_SPACE_MODIFIER;\r
278	\r
279	#pragma pack(pop)\r
280	\r
281	#endif\r