[mirror_edk2.git] / EdkCompatibilityPkg / Foundation / Core / Dxe / ArchProtocol / Cpu / Cpu.h

/*++ \r
\r
Copyright (c) 2004, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials                          \r
are licensed and made available under the terms and conditions of the BSD License         \r
which accompanies this distribution.  The full text of the license may be found at        \r
http://opensource.org/licenses/bsd-license.php                                            \r
                                                                                          \r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
\r
Module Name:\r
\r
  Cpu.h\r
\r
Abstract:\r
\r
  CPU Architectural Protocol as defined in Tiano\r
\r
  This code abstracts the DXE core from processor implementation details.\r
\r
--*/\r
\r
#ifndef _ARCH_PROTOCOL_CPU_H_\r
#define _ARCH_PROTOCOL_CPU_H_\r
\r
#include EFI_PROTOCOL_DEFINITION (DebugSupport)\r
\r
#define EFI_CPU_ARCH_PROTOCOL_GUID \\r
  { 0x26baccb1, 0x6f42, 0x11d4, {0xbc, 0xe7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81} }\r
\r
EFI_FORWARD_DECLARATION (EFI_CPU_ARCH_PROTOCOL);\r
\r
typedef enum {\r
  EfiCpuFlushTypeWriteBackInvalidate,\r
  EfiCpuFlushTypeWriteBack,\r
  EfiCpuFlushTypeInvalidate,\r
  EfiCpuMaxFlushType\r
} EFI_CPU_FLUSH_TYPE;\r
\r
typedef enum {\r
  EfiCpuInit,\r
  EfiCpuMaxInitType\r
} EFI_CPU_INIT_TYPE;\r
\r
typedef\r
VOID\r
(EFIAPI *EFI_CPU_INTERRUPT_HANDLER) (\r
  IN EFI_EXCEPTION_TYPE                 InterruptType,\r
  IN EFI_SYSTEM_CONTEXT                 SystemContext\r
  );\r
\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_CPU_FLUSH_DATA_CACHE) (\r
  IN EFI_CPU_ARCH_PROTOCOL              * This,\r
  IN EFI_PHYSICAL_ADDRESS               Start,\r
  IN UINT64                             Length,\r
  IN EFI_CPU_FLUSH_TYPE                 FlushType\r
  );\r
\r
/*++\r
\r
Routine Description:\r
\r
  This function flushes the range of addresses from Start to Start+Length \r
  from the processor's data cache. If Start is not aligned to a cache line \r
  boundary, then the bytes before Start to the preceding cache line boundary \r
  are also flushed. If Start+Length is not aligned to a cache line boundary, \r
  then the bytes past Start+Length to the end of the next cache line boundary \r
  are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be \r
  supported. If the data cache is fully coherent with all DMA operations, then \r
  this function can just return EFI_SUCCESS. If the processor does not support \r
  flushing a range of the data cache, then the entire data cache can be flushed.\r
\r
Arguments:\r
\r
  This       - The EFI_CPU_ARCH_PROTOCOL instance.\r
  Start      - The beginning physical address to flush from the processor's data \r
               cache. \r
  Length     - The number of bytes to flush from the processor's data cache. This \r
               function may flush more bytes than Length specifies depending upon \r
               the granularity of the flush operation that the processor supports.\r
  FlushType  - Specifies the type of flush operation to perform.\r
  \r
Returns: \r
\r
  EFI_SUCCESS       -  The address range from Start to Start+Length was flushed from \r
                       the processor's data cache.\r
  EFI_UNSUPPORTEDT  -  The processor does not support the cache flush type specified \r
                       by FlushType.\r
  EFI_DEVICE_ERROR  -  The address range from Start to Start+Length could not be flushed \r
                       from the processor's data cache.\r
                       \r
--*/\r
\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_CPU_ENABLE_INTERRUPT) (\r
  IN EFI_CPU_ARCH_PROTOCOL              * This\r
  );\r
\r
/*++\r
\r
Routine Description:\r
\r
  This function enables interrupt processing by the processor. \r
\r
Arguments:\r
\r
  This  - The EFI_CPU_ARCH_PROTOCOL instance.\r
    \r
Returns: \r
\r
  EFI_SUCCESS       -  Interrupts are enabled on the processor.\r
  EFI_DEVICE_ERROR  -  Interrupts could not be enabled on the processor.\r
                       \r
--*/\r
\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_CPU_DISABLE_INTERRUPT) (\r
  IN EFI_CPU_ARCH_PROTOCOL              * This\r
  );\r
\r
/*++\r
\r
Routine Description:\r
\r
  This function disables interrupt processing by the processor.\r
\r
Arguments:\r
\r
  This  -  The EFI_CPU_ARCH_PROTOCOL instance.\r
    \r
Returns: \r
\r
  EFI_SUCCESS       -  Interrupts are disabled on the processor.\r
  EFI_DEVICE_ERROR  -  Interrupts could not be disabled on the processor.\r
                       \r
--*/\r
\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_CPU_GET_INTERRUPT_STATE) (\r
  IN EFI_CPU_ARCH_PROTOCOL              * This,\r
  OUT BOOLEAN                           *State\r
  );\r
\r
/*++\r
\r
Routine Description:\r
\r
  This function retrieves the processor's current interrupt state a returns it in \r
  State. If interrupts are currently enabled, then TRUE is returned. If interrupts \r
  are currently disabled, then FALSE is returned.\r
\r
Arguments:\r
\r
  This  -  The EFI_CPU_ARCH_PROTOCOL instance.\r
  State -  A pointer to the processor's current interrupt state. Set to TRUE if \r
           interrupts are enabled and FALSE if interrupts are disabled.  \r
Returns: \r
\r
  EFI_SUCCESS             -  The processor's current interrupt state was returned in State.\r
  EFI_INVALID_PARAMETER   -  State is NULL.\r
                       \r
--*/\r
\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_CPU_INIT) (\r
  IN EFI_CPU_ARCH_PROTOCOL              * This,\r
  IN EFI_CPU_INIT_TYPE                  InitType\r
  );\r
\r
/*++\r
\r
Routine Description:\r
\r
  This function generates an INIT on the processor. If this function succeeds, then the\r
  processor will be reset, and control will not be returned to the caller. If InitType is \r
  not supported by this processor, or the processor cannot programmatically generate an \r
  INIT without help from external hardware, then EFI_UNSUPPORTED is returned. If an error \r
  occurs attempting to generate an INIT, then EFI_DEVICE_ERROR is returned.\r
\r
Arguments:\r
\r
  This     -  The EFI_CPU_ARCH_PROTOCOL instance.\r
  InitType -  The type of processor INIT to perform.  \r
  \r
Returns: \r
\r
  EFI_SUCCESS         -  The processor INIT was performed. This return code should never be seen.\r
  EFI_UNSUPPORTED     -  The processor INIT operation specified by InitType is not supported \r
                         by this processor.\r
  EFI_DEVICE_ERROR    -  The processor INIT failed.   \r
                       \r
--*/\r
\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_CPU_REGISTER_INTERRUPT_HANDLER) (\r
  IN EFI_CPU_ARCH_PROTOCOL              * This,\r
  IN EFI_EXCEPTION_TYPE                 InterruptType,\r
  IN EFI_CPU_INTERRUPT_HANDLER          InterruptHandler\r
  );\r
\r
/*++\r
\r
Routine Description:\r
\r
  This function registers and enables the handler specified by InterruptHandler for a processor \r
  interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the \r
  handler for the processor interrupt or exception type specified by InterruptType is uninstalled. \r
  The installed handler is called once for each processor interrupt or exception.\r
  \r
Arguments:\r
\r
  This              -  The EFI_CPU_ARCH_PROTOCOL instance.\r
  InterruptType     -  A pointer to the processor's current interrupt state. Set to TRUE if interrupts \r
                       are enabled and FALSE if interrupts are disabled.  \r
  InterruptHandler  -  A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called\r
                       when a processor interrupt occurs. If this parameter is NULL, then the handler \r
                       will be uninstalled.\r
Returns: \r
\r
  EFI_SUCCESS           -  The handler for the processor interrupt was successfully installed or uninstalled.\r
  EFI_ALREADY_STARTED   -  InterruptHandler is not NULL, and a handler for InterruptType was \r
                           previously installed.\r
  EFI_INVALID_PARAMETER -  InterruptHandler is NULL, and a handler for InterruptType was not \r
                           previously installed.\r
  EFI_UNSUPPORTED       -  The interrupt specified by InterruptType is not supported.\r
                    \r
--*/\r
\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_CPU_GET_TIMER_VALUE) (\r
  IN EFI_CPU_ARCH_PROTOCOL              * This,\r
  IN UINT32                             TimerIndex,\r
  OUT UINT64                            *TimerValue,\r
  OUT UINT64                            *TimerPeriod OPTIONAL\r
  );\r
\r
/*++\r
\r
Routine Description:\r
\r
  This function reads the processor timer specified by TimerIndex and returns it in TimerValue.\r
  \r
Arguments:\r
\r
  This        -  The EFI_CPU_ARCH_PROTOCOL instance.\r
  TimerIndex  -  Specifies which processor timer is to be returned in TimerValue. This parameter\r
                 must be between 0 and NumberOfTimers-1.\r
  TimerValue  -  Pointer to the returned timer value.\r
  TimerPeriod -  A pointer to the amount of time that passes in femtoseconds for each increment \r
                 of TimerValue.\r
Returns: \r
\r
  EFI_SUCCESS           -  The processor timer value specified by TimerIndex was returned in TimerValue.\r
  EFI_DEVICE_ERROR      -  An error occurred attempting to read one of the processor's timers.\r
  EFI_INVALID_PARAMETER -  TimerValue is NULL or TimerIndex is not valid.\r
  EFI_UNSUPPORTED       -  The processor does not have any readable timers.\r
                    \r
--*/\r
\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_CPU_SET_MEMORY_ATTRIBUTES) (\r
  IN EFI_CPU_ARCH_PROTOCOL              * This,\r
  IN  EFI_PHYSICAL_ADDRESS              BaseAddress,\r
  IN  UINT64                            Length,\r
  IN  UINT64                            Attributes\r
  );\r
\r
/*++\r
\r
Routine Description:\r
\r
  This function modifies the attributes for the memory region specified by BaseAddress and\r
  Length from their current attributes to the attributes specified by Attributes.\r
  \r
Arguments:\r
\r
  This          -  The EFI_CPU_ARCH_PROTOCOL instance.\r
  BaseAddress   -  The physical address that is the start address of a memory region.\r
  Length        -  The size in bytes of the memory region.\r
  Attributes    -  The bit mask of attributes to set for the memory region. \r
  \r
Returns: \r
\r
  EFI_SUCCESS           -  The attributes were set for the memory region.\r
  EFI_ACCESS_DENIED     -  The attributes for the memory resource range specified by \r
                           BaseAddress and Length cannot be modified.\r
  EFI_INVALID_PARAMETER -  Length is zero.\r
  EFI_OUT_OF_RESOURCES  -  There are not enough system resources to modify the attributes of\r
                           the memory resource range.   \r
  EFI_UNSUPPORTED       -  The processor does not support one or more bytes of the memory \r
                           resource range specified by BaseAddress and Length. \r
                           The bit mask of attributes is not support for the memory resource\r
                           range specified by BaseAddress and Length.\r
                                          \r
--*/\r
\r
struct _EFI_CPU_ARCH_PROTOCOL {\r
  EFI_CPU_FLUSH_DATA_CACHE            FlushDataCache;\r
  EFI_CPU_ENABLE_INTERRUPT            EnableInterrupt;\r
  EFI_CPU_DISABLE_INTERRUPT           DisableInterrupt;\r
  EFI_CPU_GET_INTERRUPT_STATE         GetInterruptState;\r
  EFI_CPU_INIT                        Init;\r
  EFI_CPU_REGISTER_INTERRUPT_HANDLER  RegisterInterruptHandler;\r
  EFI_CPU_GET_TIMER_VALUE             GetTimerValue;\r
  EFI_CPU_SET_MEMORY_ATTRIBUTES       SetMemoryAttributes;\r
  UINT32                              NumberOfTimers;\r
  UINT32                              DmaBufferAlignment;\r
};\r
\r
/*++\r
\r
Protocol Description:\r
  \r
  The EFI_CPU_ARCH_PROTOCOL is used to abstract processor-specific functions from the DXE\r
  Foundation. This includes flushing caches, enabling and disabling interrupts, hooking interrupt\r
  vectors and exception vectors, reading internal processor timers, resetting the processor, and\r
  determining the processor frequency.\r
\r
Parameters:\r
\r
  FlushDataCache            -  Flushes a range of the processor's data cache. If the processor does \r
                               not contain a data cache, or the data cache is fully coherent, then this \r
                               function can just return EFI_SUCCESS. If the processor does not support \r
                               flushing a range of addresses from the data cache, then the entire data \r
                               cache must be flushed. \r
  EnableInterrupt           -  Enables interrupt processing by the processor. \r
  DisableInterrupt          -  Disables interrupt processing by the processor.\r
  GetInterruptState         -  Retrieves the processor's current interrupt state.\r
  Init                      -  Generates an INIT on the processor. If a processor cannot programmatically \r
                               generate an INIT without help from external hardware, then this function \r
                               returns EFI_UNSUPPORTED.\r
  RegisterInterruptHandler  -  Associates an interrupt service routine with one of the processor's interrupt \r
                               vectors. This function is typically used by the EFI_TIMER_ARCH_PROTOCOL to \r
                               hook the timer interrupt in a system. It can also be used by the debugger to \r
                               hook exception vectors.\r
  GetTimerValue             -  Returns the value of one of the processor's internal timers.\r
  SetMemoryAttributes       -  Attempts to set the attributes of a memory region.\r
  NumberOfTimers            -  The number of timers that are available in a processor. The value in this \r
                               field is a constant that must not be modified after the CPU Architectural \r
                               Protocol is installed. All consumers must treat this as a read-only field.\r
  DmaBufferAlignment        -  The size, in bytes, of the alignment required for DMA buffer allocations. \r
                               This is typically the size of the largest data cache line in the platform. \r
                               The value in this field is a constant that must not be modified after the \r
                               CPU Architectural Protocol is installed. All consumers must treat this as \r
                               a read-only field.\r
  \r
--*/\r
\r
extern EFI_GUID gEfiCpuArchProtocolGuid;\r
\r
#endif\r
Commit	Line	Data
3eb9473e	1	/*++ \r
3eb9473e	2	\r
f57387d5 HT	3	Copyright (c) 2004, Intel Corporation. All rights reserved.<BR>\r
f57387d5 HT	4	This program and the accompanying materials \r
3eb9473e	5	are licensed and made available under the terms and conditions of the BSD License \r
	6	which accompanies this distribution. The full text of the license may be found at \r
	7	http://opensource.org/licenses/bsd-license.php \r
	8	\r
	9	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
	10	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
	11	\r
	12	Module Name:\r
	13	\r
	14	Cpu.h\r
	15	\r
	16	Abstract:\r
	17	\r
	18	CPU Architectural Protocol as defined in Tiano\r
	19	\r
	20	This code abstracts the DXE core from processor implementation details.\r
	21	\r
	22	--*/\r
	23	\r
	24	#ifndef _ARCH_PROTOCOL_CPU_H_\r
	25	#define _ARCH_PROTOCOL_CPU_H_\r
	26	\r
	27	#include EFI_PROTOCOL_DEFINITION (DebugSupport)\r
	28	\r
	29	#define EFI_CPU_ARCH_PROTOCOL_GUID \\r
7ccf38a3	30	{ 0x26baccb1, 0x6f42, 0x11d4, {0xbc, 0xe7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81} }\r
3eb9473e	31	\r
	32	EFI_FORWARD_DECLARATION (EFI_CPU_ARCH_PROTOCOL);\r
	33	\r
	34	typedef enum {\r
	35	EfiCpuFlushTypeWriteBackInvalidate,\r
	36	EfiCpuFlushTypeWriteBack,\r
	37	EfiCpuFlushTypeInvalidate,\r
	38	EfiCpuMaxFlushType\r
	39	} EFI_CPU_FLUSH_TYPE;\r
	40	\r
	41	typedef enum {\r
	42	EfiCpuInit,\r
	43	EfiCpuMaxInitType\r
	44	} EFI_CPU_INIT_TYPE;\r
	45	\r
	46	typedef\r
	47	VOID\r
2c40a813	48	(EFIAPI *EFI_CPU_INTERRUPT_HANDLER) (\r
3eb9473e	49	IN EFI_EXCEPTION_TYPE InterruptType,\r
	50	IN EFI_SYSTEM_CONTEXT SystemContext\r
	51	);\r
	52	\r
	53	typedef\r
	54	EFI_STATUS\r
	55	(EFIAPI *EFI_CPU_FLUSH_DATA_CACHE) (\r
	56	IN EFI_CPU_ARCH_PROTOCOL * This,\r
	57	IN EFI_PHYSICAL_ADDRESS Start,\r
	58	IN UINT64 Length,\r
	59	IN EFI_CPU_FLUSH_TYPE FlushType\r
	60	);\r
	61	\r
	62	/*++\r
	63	\r
	64	Routine Description:\r
	65	\r
	66	This function flushes the range of addresses from Start to Start+Length \r
	67	from the processor's data cache. If Start is not aligned to a cache line \r
	68	boundary, then the bytes before Start to the preceding cache line boundary \r
	69	are also flushed. If Start+Length is not aligned to a cache line boundary, \r
	70	then the bytes past Start+Length to the end of the next cache line boundary \r
	71	are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be \r
	72	supported. If the data cache is fully coherent with all DMA operations, then \r
	73	this function can just return EFI_SUCCESS. If the processor does not support \r
	74	flushing a range of the data cache, then the entire data cache can be flushed.\r
	75	\r
	76	Arguments:\r
	77	\r
	78	This - The EFI_CPU_ARCH_PROTOCOL instance.\r
	79	Start - The beginning physical address to flush from the processor's data \r
	80	cache. \r
	81	Length - The number of bytes to flush from the processor's data cache. This \r
	82	function may flush more bytes than Length specifies depending upon \r
	83	the granularity of the flush operation that the processor supports.\r
	84	FlushType - Specifies the type of flush operation to perform.\r
	85	\r
	86	Returns: \r
	87	\r
	88	EFI_SUCCESS - The address range from Start to Start+Length was flushed from \r
	89	the processor's data cache.\r
	90	EFI_UNSUPPORTEDT - The processor does not support the cache flush type specified \r
	91	by FlushType.\r
	92	EFI_DEVICE_ERROR - The address range from Start to Start+Length could not be flushed \r
	93	from the processor's data cache.\r
	94	\r
	95	--*/\r
	96	\r
	97	typedef\r
	98	EFI_STATUS\r
	99	(EFIAPI *EFI_CPU_ENABLE_INTERRUPT) (\r
	100	IN EFI_CPU_ARCH_PROTOCOL * This\r
	101	);\r
	102	\r
	103	/*++\r
	104	\r
	105	Routine Description:\r
	106	\r
	107	This function enables interrupt processing by the processor. \r
	108	\r
	109	Arguments:\r
	110	\r
	111	This - The EFI_CPU_ARCH_PROTOCOL instance.\r
	112	\r
113	Returns: \r
114	\r
115	EFI_SUCCESS - Interrupts are enabled on the processor.\r
116	EFI_DEVICE_ERROR - Interrupts could not be enabled on the processor.\r
117	\r
118	--*/\r
119	\r
120	typedef\r
121	EFI_STATUS\r
122	(EFIAPI *EFI_CPU_DISABLE_INTERRUPT) (\r
123	IN EFI_CPU_ARCH_PROTOCOL * This\r
124	);\r
125	\r
126	/*++\r
127	\r
128	Routine Description:\r
129	\r
130	This function disables interrupt processing by the processor.\r
131	\r
132	Arguments:\r
133	\r
134	This - The EFI_CPU_ARCH_PROTOCOL instance.\r
135	\r
136	Returns: \r
137	\r
138	EFI_SUCCESS - Interrupts are disabled on the processor.\r
139	EFI_DEVICE_ERROR - Interrupts could not be disabled on the processor.\r
140	\r
141	--*/\r
142	\r
143	typedef\r
144	EFI_STATUS\r
145	(EFIAPI *EFI_CPU_GET_INTERRUPT_STATE) (\r
146	IN EFI_CPU_ARCH_PROTOCOL * This,\r
147	OUT BOOLEAN *State\r
148	);\r
149	\r
150	/*++\r
151	\r
152	Routine Description:\r
153	\r
154	This function retrieves the processor's current interrupt state a returns it in \r
155	State. If interrupts are currently enabled, then TRUE is returned. If interrupts \r
156	are currently disabled, then FALSE is returned.\r
157	\r
158	Arguments:\r
159	\r
160	This - The EFI_CPU_ARCH_PROTOCOL instance.\r
161	State - A pointer to the processor's current interrupt state. Set to TRUE if \r
162	interrupts are enabled and FALSE if interrupts are disabled. \r
163	Returns: \r
164	\r
165	EFI_SUCCESS - The processor's current interrupt state was returned in State.\r
166	EFI_INVALID_PARAMETER - State is NULL.\r
167	\r
168	--*/\r
169	\r
170	typedef\r
171	EFI_STATUS\r
172	(EFIAPI *EFI_CPU_INIT) (\r
173	IN EFI_CPU_ARCH_PROTOCOL * This,\r
174	IN EFI_CPU_INIT_TYPE InitType\r
175	);\r
176	\r
177	/*++\r
178	\r
179	Routine Description:\r
180	\r
181	This function generates an INIT on the processor. If this function succeeds, then the\r
182	processor will be reset, and control will not be returned to the caller. If InitType is \r
183	not supported by this processor, or the processor cannot programmatically generate an \r
184	INIT without help from external hardware, then EFI_UNSUPPORTED is returned. If an error \r
185	occurs attempting to generate an INIT, then EFI_DEVICE_ERROR is returned.\r
186	\r
187	Arguments:\r
188	\r
189	This - The EFI_CPU_ARCH_PROTOCOL instance.\r
190	InitType - The type of processor INIT to perform. \r
191	\r
192	Returns: \r
193	\r
194	EFI_SUCCESS - The processor INIT was performed. This return code should never be seen.\r
195	EFI_UNSUPPORTED - The processor INIT operation specified by InitType is not supported \r
196	by this processor.\r
197	EFI_DEVICE_ERROR - The processor INIT failed. \r
198	\r
199	--*/\r
200	\r
201	typedef\r
202	EFI_STATUS\r
203	(EFIAPI *EFI_CPU_REGISTER_INTERRUPT_HANDLER) (\r
204	IN EFI_CPU_ARCH_PROTOCOL * This,\r
205	IN EFI_EXCEPTION_TYPE InterruptType,\r
206	IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler\r
207	);\r
208	\r
209	/*++\r
210	\r
211	Routine Description:\r
212	\r
213	This function registers and enables the handler specified by InterruptHandler for a processor \r
214	interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the \r
215	handler for the processor interrupt or exception type specified by InterruptType is uninstalled. \r
216	The installed handler is called once for each processor interrupt or exception.\r
217	\r
218	Arguments:\r
219	\r
220	This - The EFI_CPU_ARCH_PROTOCOL instance.\r
221	InterruptType - A pointer to the processor's current interrupt state. Set to TRUE if interrupts \r
222	are enabled and FALSE if interrupts are disabled. \r
223	InterruptHandler - A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called\r
224	when a processor interrupt occurs. If this parameter is NULL, then the handler \r
225	will be uninstalled.\r
226	Returns: \r
227	\r
228	EFI_SUCCESS - The handler for the processor interrupt was successfully installed or uninstalled.\r
229	EFI_ALREADY_STARTED - InterruptHandler is not NULL, and a handler for InterruptType was \r
230	previously installed.\r
231	EFI_INVALID_PARAMETER - InterruptHandler is NULL, and a handler for InterruptType was not \r
232	previously installed.\r
233	EFI_UNSUPPORTED - The interrupt specified by InterruptType is not supported.\r
234	\r
235	--*/\r
236	\r
237	typedef\r
238	EFI_STATUS\r
239	(EFIAPI *EFI_CPU_GET_TIMER_VALUE) (\r
240	IN EFI_CPU_ARCH_PROTOCOL * This,\r
241	IN UINT32 TimerIndex,\r
242	OUT UINT64 *TimerValue,\r
243	OUT UINT64 *TimerPeriod OPTIONAL\r
244	);\r
245	\r
246	/*++\r
247	\r
248	Routine Description:\r
249	\r
250	This function reads the processor timer specified by TimerIndex and returns it in TimerValue.\r
251	\r
252	Arguments:\r
253	\r
254	This - The EFI_CPU_ARCH_PROTOCOL instance.\r
255	TimerIndex - Specifies which processor timer is to be returned in TimerValue. This parameter\r
256	must be between 0 and NumberOfTimers-1.\r
257	TimerValue - Pointer to the returned timer value.\r
258	TimerPeriod - A pointer to the amount of time that passes in femtoseconds for each increment \r
259	of TimerValue.\r
260	Returns: \r
261	\r
262	EFI_SUCCESS - The processor timer value specified by TimerIndex was returned in TimerValue.\r
263	EFI_DEVICE_ERROR - An error occurred attempting to read one of the processor's timers.\r
264	EFI_INVALID_PARAMETER - TimerValue is NULL or TimerIndex is not valid.\r
265	EFI_UNSUPPORTED - The processor does not have any readable timers.\r
266	\r
267	--*/\r
268	\r
269	typedef\r
270	EFI_STATUS\r
271	(EFIAPI *EFI_CPU_SET_MEMORY_ATTRIBUTES) (\r
272	IN EFI_CPU_ARCH_PROTOCOL * This,\r
273	IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
274	IN UINT64 Length,\r
275	IN UINT64 Attributes\r
276	);\r
277	\r
278	/*++\r
279	\r
280	Routine Description:\r
281	\r
282	This function modifies the attributes for the memory region specified by BaseAddress and\r
283	Length from their current attributes to the attributes specified by Attributes.\r
284	\r
285	Arguments:\r
286	\r
287	This - The EFI_CPU_ARCH_PROTOCOL instance.\r
288	BaseAddress - The physical address that is the start address of a memory region.\r
289	Length - The size in bytes of the memory region.\r
290	Attributes - The bit mask of attributes to set for the memory region. \r
291	\r
292	Returns: \r
293	\r
294	EFI_SUCCESS - The attributes were set for the memory region.\r
295	EFI_ACCESS_DENIED - The attributes for the memory resource range specified by \r
296	BaseAddress and Length cannot be modified.\r
297	EFI_INVALID_PARAMETER - Length is zero.\r
298	EFI_OUT_OF_RESOURCES - There are not enough system resources to modify the attributes of\r
299	the memory resource range. \r
300	EFI_UNSUPPORTED - The processor does not support one or more bytes of the memory \r
301	resource range specified by BaseAddress and Length. \r
302	The bit mask of attributes is not support for the memory resource\r
303	range specified by BaseAddress and Length.\r
304	\r
305	--*/\r
306	\r
6f80bb86	307	struct _EFI_CPU_ARCH_PROTOCOL {\r
3eb9473e	308	EFI_CPU_FLUSH_DATA_CACHE FlushDataCache;\r
	309	EFI_CPU_ENABLE_INTERRUPT EnableInterrupt;\r
	310	EFI_CPU_DISABLE_INTERRUPT DisableInterrupt;\r
	311	EFI_CPU_GET_INTERRUPT_STATE GetInterruptState;\r
	312	EFI_CPU_INIT Init;\r
	313	EFI_CPU_REGISTER_INTERRUPT_HANDLER RegisterInterruptHandler;\r
	314	EFI_CPU_GET_TIMER_VALUE GetTimerValue;\r
	315	EFI_CPU_SET_MEMORY_ATTRIBUTES SetMemoryAttributes;\r
	316	UINT32 NumberOfTimers;\r
	317	UINT32 DmaBufferAlignment;\r
6f80bb86	318	};\r
3eb9473e	319	\r
	320	/*++\r
	321	\r
	322	Protocol Description:\r
	323	\r
	324	The EFI_CPU_ARCH_PROTOCOL is used to abstract processor-specific functions from the DXE\r
	325	Foundation. This includes flushing caches, enabling and disabling interrupts, hooking interrupt\r
	326	vectors and exception vectors, reading internal processor timers, resetting the processor, and\r
	327	determining the processor frequency.\r
	328	\r
	329	Parameters:\r
	330	\r
	331	FlushDataCache - Flushes a range of the processor's data cache. If the processor does \r
	332	not contain a data cache, or the data cache is fully coherent, then this \r
	333	function can just return EFI_SUCCESS. If the processor does not support \r
	334	flushing a range of addresses from the data cache, then the entire data \r
	335	cache must be flushed. \r
	336	EnableInterrupt - Enables interrupt processing by the processor. \r
	337	DisableInterrupt - Disables interrupt processing by the processor.\r
	338	GetInterruptState - Retrieves the processor's current interrupt state.\r
	339	Init - Generates an INIT on the processor. If a processor cannot programmatically \r
	340	generate an INIT without help from external hardware, then this function \r
	341	returns EFI_UNSUPPORTED.\r
	342	RegisterInterruptHandler - Associates an interrupt service routine with one of the processor's interrupt \r
	343	vectors. This function is typically used by the EFI_TIMER_ARCH_PROTOCOL to \r
	344	hook the timer interrupt in a system. It can also be used by the debugger to \r
	345	hook exception vectors.\r
	346	GetTimerValue - Returns the value of one of the processor's internal timers.\r
	347	SetMemoryAttributes - Attempts to set the attributes of a memory region.\r
	348	NumberOfTimers - The number of timers that are available in a processor. The value in this \r
	349	field is a constant that must not be modified after the CPU Architectural \r
	350	Protocol is installed. All consumers must treat this as a read-only field.\r
	351	DmaBufferAlignment - The size, in bytes, of the alignment required for DMA buffer allocations. \r
	352	This is typically the size of the largest data cache line in the platform. \r
	353	The value in this field is a constant that must not be modified after the \r
	354	CPU Architectural Protocol is installed. All consumers must treat this as \r
	355	a read-only field.\r
	356	\r
	357	--*/\r
	358	\r
	359	extern EFI_GUID gEfiCpuArchProtocolGuid;\r
	360	\r
	361	#endif\r