[mirror_edk2.git] / EdkCompatibilityPkg / Foundation / Cpu / Pentium / CpuIA32Lib / IA32 / CpuIA32.S

#/*++\r
#\r
#Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
#This program and the accompanying materials                          \r
#are licensed and made available under the terms and conditions of the BSD License         \r
#which accompanies this distribution.  The full text of the license may be found at        \r
#http://opensource.org/licenses/bsd-license.php                                            \r
#                                                                                          \r
#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
#\r
#Module Name:\r
#\r
#  CpuIA32.c\r
#\r
#Abstract:\r
#\r
#--*/\r
\r
##include "CpuIA32.h"\r
#include "EfiBind.h"\r
\r
#---------------------------------------------------------------------------\r
    .586p: \r
    #.MODEL flat,C\r
    .code: \r
\r
#---------------------------------------------------------------------------\r
\r
.globl ASM_PFX(EfiHalt)\r
.globl ASM_PFX(EfiWbinvd)\r
.globl ASM_PFX(EfiInvd)\r
.globl ASM_PFX(EfiCpuid)\r
.globl ASM_PFX(EfiReadMsr)\r
.globl ASM_PFX(EfiWriteMsr)\r
.globl ASM_PFX(EfiReadTsc)\r
.globl ASM_PFX(EfiDisableCache)\r
.globl ASM_PFX(EfiEnableCache)\r
.globl ASM_PFX(EfiGetEflags)\r
.globl ASM_PFX(EfiDisableInterrupts)\r
.globl ASM_PFX(EfiEnableInterrupts)\r
.globl ASM_PFX(EfiCpuidExt)\r
\r
\r
#VOID\r
#EfiHalt (\r
#  VOID\r
#)\r
ASM_PFX(EfiHalt):\r
    hlt\r
    ret\r
#EfiHalt ENDP\r
\r
#VOID\r
#EfiWbinvd (\r
#  VOID\r
#)\r
ASM_PFX(EfiWbinvd):\r
    wbinvd\r
    ret\r
#EfiWbinvd ENDP\r
\r
#VOID\r
#EfiInvd (\r
# VOID\r
#)\r
ASM_PFX(EfiInvd):\r
    invd\r
    ret\r
#EfiInvd ENDP\r
\r
#VOID\r
#EfiCpuid (IN UINT32 RegisterInEax,\r
#          OUT EFI_CPUID_REGISTER *Reg OPTIONAL)\r
ASM_PFX(EfiCpuid):\r
    pushl %ebp\r
    movl %esp, %ebp\r
    pushl %ebx\r
    pushl %esi\r
    pushl %edi\r
    pushal\r
\r
    movl   8(%ebp), %eax           #RegisterInEax\r
    cpuid\r
    cmpl   $0, 0xC(%ebp)           # Reg\r
    je     L1\r
    movl        0xC(%ebp), %edi         # Reg \r
\r
    movl        %eax, (%edi)        # Reg->RegEax\r
    movl        %ebx, 4(%edi)         # Reg->RegEbx\r
    movl        %ecx, 8(%edi)         # Reg->RegEcx\r
    movl        %edx, 0xC(%edi)         # Reg->RegEdx\r
\r
L1: \r
    popal\r
    popl        %edi\r
    popl        %esi\r
    popl        %ebx\r
    popl        %ebp\r
\r
    ret\r
#EfiCpuid ENDP\r
\r
\r
#UINT64\r
#EfiReadMsr (\r
#  IN UINT32 Index\r
#  );\r
ASM_PFX(EfiReadMsr):\r
    movl   4(%esp), %ecx           # Index\r
    rdmsr\r
    ret\r
#EfiReadMsr ENDP\r
\r
#VOID\r
#EfiWriteMsr (\r
#  IN   UINT32  Index,\r
#  IN   UINT64  Value\r
#  );\r
ASM_PFX(EfiWriteMsr):\r
    movl   4(%esp), %ecx         # Index\r
    movl   8(%esp), %eax         # DWORD PTR Value[0]\r
    movl   0xC(%esp), %edx         # DWORD PTR Value[4]\r
    wrmsr\r
    ret\r
#EfiWriteMsr ENDP\r
\r
#UINT64\r
#EfiReadTsc (\r
#  VOID\r
#  )\r
ASM_PFX(EfiReadTsc):\r
    rdtsc\r
    ret\r
#EfiReadTsc ENDP\r
\r
#VOID\r
#EfiDisableCache (\r
#  VOID\r
#)\r
ASM_PFX(EfiDisableCache):\r
    movl  %cr0, %eax\r
    bswapl %eax\r
    andb  $0x60, %al\r
    cmpb  $0x60, %al\r
    je    L2\r
    movl  %cr0, %eax\r
    orl   $0x60000000, %eax\r
    movl  %eax, %cr0\r
    wbinvd\r
L2: \r
    ret\r
#EfiDisableCache ENDP\r
\r
#VOID\r
#EfiEnableCache (\r
#  VOID\r
#  )\r
ASM_PFX(EfiEnableCache):\r
    wbinvd\r
    movl  %cr0, %eax\r
    andl  $0x9fffffff, %eax\r
    movl  %eax, %cr0\r
    ret\r
#EfiEnableCache ENDP\r
\r
#UINT32\r
#EfiGetEflags (\r
#  VOID\r
#  )\r
ASM_PFX(EfiGetEflags):\r
    pushfl\r
    popl %eax\r
    ret\r
#EfiGetEflags ENDP\r
\r
#VOID\r
#EfiDisableInterrupts (\r
#  VOID\r
#  )\r
ASM_PFX(EfiDisableInterrupts):\r
    cli\r
    ret\r
#EfiDisableInterrupts ENDP\r
\r
#VOID\r
#EfiEnableInterrupts (\r
#  VOID\r
#  )\r
ASM_PFX(EfiEnableInterrupts):\r
    sti\r
    ret\r
#EfiEnableInterrupts ENDP\r
\r
#VOID\r
#EfiCpuidExt (\r
#  IN   UINT32              RegisterInEax,\r
#  IN   UINT32              CacheLevel,\r
#  OUT  EFI_CPUID_REGISTER  *Regs              \r
#  )\r
ASM_PFX(EfiCpuidExt):\r
    push   %ebx\r
    push   %edi\r
    push   %esi\r
    pushal\r
\r
    movl   0x30(%esp), %eax           # RegisterInEax\r
    movl   0x34(%esp), %ecx           # CacheLevel\r
    cpuid\r
    movl   0x38(%esp), %edi           # DWORD PTR Regs \r
\r
    movl   %eax, (%edi)                 # Reg->RegEax\r
    movl   %ebx, 4(%edi)                # Reg->RegEbx\r
    movl   %ecx, 8(%edi)                # Reg->RegEcx\r
    movl   %edx, 0xC(%edi)              # Reg->RegEdx\r
\r
    popal\r
    pop    %esi\r
    pop    %edi\r
    pop    %ebx\r
    ret\r
#EfiCpuidExt ENDP\r
\r
\r
\r
Commit	Line	Data
c69a09d9	1	#/*++\r
c69a09d9	2	#\r
3e99020d	3	#Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
f57387d5	4	#This program and the accompanying materials \r
c69a09d9	5	#are licensed and made available under the terms and conditions of the BSD License \r
	6	#which accompanies this distribution. The full text of the license may be found at \r
	7	#http://opensource.org/licenses/bsd-license.php \r
	8	# \r
	9	#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
	10	#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
	11	#\r
	12	#Module Name:\r
	13	#\r
	14	# CpuIA32.c\r
	15	#\r
	16	#Abstract:\r
	17	#\r
	18	#--*/\r
	19	\r
	20	##include "CpuIA32.h"\r
	21	#include "EfiBind.h"\r
	22	\r
	23	#---------------------------------------------------------------------------\r
	24	.586p: \r
	25	#.MODEL flat,C\r
	26	.code: \r
	27	\r
	28	#---------------------------------------------------------------------------\r
	29	\r
	30	.globl ASM_PFX(EfiHalt)\r
	31	.globl ASM_PFX(EfiWbinvd)\r
	32	.globl ASM_PFX(EfiInvd)\r
	33	.globl ASM_PFX(EfiCpuid)\r
	34	.globl ASM_PFX(EfiReadMsr)\r
	35	.globl ASM_PFX(EfiWriteMsr)\r
	36	.globl ASM_PFX(EfiReadTsc)\r
	37	.globl ASM_PFX(EfiDisableCache)\r
	38	.globl ASM_PFX(EfiEnableCache)\r
	39	.globl ASM_PFX(EfiGetEflags)\r
	40	.globl ASM_PFX(EfiDisableInterrupts)\r
	41	.globl ASM_PFX(EfiEnableInterrupts)\r
	42	.globl ASM_PFX(EfiCpuidExt)\r
	43	\r
	44	\r
	45	#VOID\r
	46	#EfiHalt (\r
	47	# VOID\r
	48	#)\r
	49	ASM_PFX(EfiHalt):\r
	50	hlt\r
	51	ret\r
	52	#EfiHalt ENDP\r
	53	\r
	54	#VOID\r
	55	#EfiWbinvd (\r
	56	# VOID\r
	57	#)\r
	58	ASM_PFX(EfiWbinvd):\r
	59	wbinvd\r
	60	ret\r
	61	#EfiWbinvd ENDP\r
	62	\r
	63	#VOID\r
	64	#EfiInvd (\r
	65	# VOID\r
	66	#)\r
	67	ASM_PFX(EfiInvd):\r
	68	invd\r
69	ret\r
70	#EfiInvd ENDP\r
71	\r
72	#VOID\r
73	#EfiCpuid (IN UINT32 RegisterInEax,\r
74	# OUT EFI_CPUID_REGISTER *Reg OPTIONAL)\r
75	ASM_PFX(EfiCpuid):\r
76	pushl %ebp\r
77	movl %esp, %ebp\r
78	pushl %ebx\r
79	pushl %esi\r
80	pushl %edi\r
81	pushal\r
82	\r
83	movl 8(%ebp), %eax #RegisterInEax\r
84	cpuid\r
85	cmpl $0, 0xC(%ebp) # Reg\r
86	je L1\r
87	movl 0xC(%ebp), %edi # Reg \r
88	\r
89	movl %eax, (%edi) # Reg->RegEax\r
90	movl %ebx, 4(%edi) # Reg->RegEbx\r
91	movl %ecx, 8(%edi) # Reg->RegEcx\r
92	movl %edx, 0xC(%edi) # Reg->RegEdx\r
93	\r
94	L1: \r
95	popal\r
96	popl %edi\r
97	popl %esi\r
98	popl %ebx\r
99	popl %ebp\r
100	\r
101	ret\r
102	#EfiCpuid ENDP\r
103	\r
104	\r
105	#UINT64\r
106	#EfiReadMsr (\r
107	# IN UINT32 Index\r
108	# );\r
109	ASM_PFX(EfiReadMsr):\r
110	movl 4(%esp), %ecx # Index\r
111	rdmsr\r
112	ret\r
113	#EfiReadMsr ENDP\r
114	\r
115	#VOID\r
116	#EfiWriteMsr (\r
117	# IN UINT32 Index,\r
118	# IN UINT64 Value\r
119	# );\r
120	ASM_PFX(EfiWriteMsr):\r
121	movl 4(%esp), %ecx # Index\r
122	movl 8(%esp), %eax # DWORD PTR Value[0]\r
123	movl 0xC(%esp), %edx # DWORD PTR Value[4]\r
124	wrmsr\r
125	ret\r
126	#EfiWriteMsr ENDP\r
127	\r
128	#UINT64\r
129	#EfiReadTsc (\r
130	# VOID\r
131	# )\r
132	ASM_PFX(EfiReadTsc):\r
133	rdtsc\r
134	ret\r
135	#EfiReadTsc ENDP\r
136	\r
137	#VOID\r
138	#EfiDisableCache (\r
139	# VOID\r
140	#)\r
141	ASM_PFX(EfiDisableCache):\r
142	movl %cr0, %eax\r
143	bswapl %eax\r
144	andb $0x60, %al\r
145	cmpb $0x60, %al\r
146	je L2\r
147	movl %cr0, %eax\r
148	orl $0x60000000, %eax\r
149	movl %eax, %cr0\r
150	wbinvd\r
151	L2: \r
152	ret\r
153	#EfiDisableCache ENDP\r
154	\r
155	#VOID\r
156	#EfiEnableCache (\r
157	# VOID\r
158	# )\r
159	ASM_PFX(EfiEnableCache):\r
3e99020d	160	wbinvd\r
c69a09d9	161	movl %cr0, %eax\r
	162	andl $0x9fffffff, %eax\r
	163	movl %eax, %cr0\r
	164	ret\r
	165	#EfiEnableCache ENDP\r
	166	\r
	167	#UINT32\r
	168	#EfiGetEflags (\r
	169	# VOID\r
	170	# )\r
	171	ASM_PFX(EfiGetEflags):\r
	172	pushfl\r
	173	popl %eax\r
	174	ret\r
	175	#EfiGetEflags ENDP\r
	176	\r
	177	#VOID\r
	178	#EfiDisableInterrupts (\r
	179	# VOID\r
	180	# )\r
	181	ASM_PFX(EfiDisableInterrupts):\r
	182	cli\r
	183	ret\r
	184	#EfiDisableInterrupts ENDP\r
	185	\r
	186	#VOID\r
	187	#EfiEnableInterrupts (\r
	188	# VOID\r
	189	# )\r
	190	ASM_PFX(EfiEnableInterrupts):\r
	191	sti\r
	192	ret\r
	193	#EfiEnableInterrupts ENDP\r
	194	\r
	195	#VOID\r
	196	#EfiCpuidExt (\r
	197	# IN UINT32 RegisterInEax,\r
	198	# IN UINT32 CacheLevel,\r
	199	# OUT EFI_CPUID_REGISTER *Regs \r
	200	# )\r
	201	ASM_PFX(EfiCpuidExt):\r
	202	push %ebx\r
	203	push %edi\r
	204	push %esi\r
	205	pushal\r
	206	\r
	207	movl 0x30(%esp), %eax # RegisterInEax\r
	208	movl 0x34(%esp), %ecx # CacheLevel\r
	209	cpuid\r
	210	movl 0x38(%esp), %edi # DWORD PTR Regs \r
	211	\r
	212	movl %eax, (%edi) # Reg->RegEax\r
	213	movl %ebx, 4(%edi) # Reg->RegEbx\r
	214	movl %ecx, 8(%edi) # Reg->RegEcx\r
	215	movl %edx, 0xC(%edi) # Reg->RegEdx\r
	216	\r
	217	popal\r
	218	pop %esi\r
	219	pop %edi\r
	220	pop %ebx\r
	221	ret\r
	222	#EfiCpuidExt ENDP\r
	223	\r
	224	\r
225	\r