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3eb9473e 1/*++\r
2\r
f57387d5
HT		 3Copyright (c) 2007, Intel Corporation. All rights reserved.<BR>\r
4This program and the accompanying materials \r
3eb9473e 5are licensed and made available under the terms and conditions of the BSD License \r
6which accompanies this distribution. The full text of the license may be found at \r
7http://opensource.org/licenses/bsd-license.php \r
8 \r
9THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
10WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
11\r
12Module Name:\r
13\r
14 Atapi.h\r
15 \r
16Abstract: \r
17 \r
18\r
19Revision History\r
20--*/\r
21\r
22#ifndef _ATAPI_H\r
23#define _ATAPI_H\r
24\r
25#include "Tiano.h"\r
26\r
27#pragma pack(1)\r
28\r
29typedef struct {\r
30 UINT16 config; /* General Configuration */\r
31 UINT16 cylinders; /* Number of Cylinders */\r
32 UINT16 reserved_2;\r
33 UINT16 heads; /* Number of logical heads */\r
34 UINT16 vendor_data1;\r
35 UINT16 vendoe_data2;\r
36 UINT16 sectors_per_track;\r
37 UINT16 vendor_specific_7_9[3];\r
38 CHAR8 SerialNo[20]; /* ASCII */\r
39 UINT16 vendor_specific_20_21[2];\r
40 UINT16 ecc_bytes_available;\r
41 CHAR8 FirmwareVer[8]; /* ASCII */\r
42 CHAR8 ModelName[40]; /* ASCII */\r
43 UINT16 multi_sector_cmd_max_sct_cnt;\r
44 UINT16 reserved_48;\r
45 UINT16 capabilities;\r
46 UINT16 reserved_50;\r
47 UINT16 pio_cycle_timing;\r
48 UINT16 reserved_52;\r
49 UINT16 field_validity;\r
50 UINT16 current_cylinders;\r
51 UINT16 current_heads;\r
52 UINT16 current_sectors;\r
53 UINT16 CurrentCapacityLsb;\r
54 UINT16 CurrentCapacityMsb;\r
55 UINT16 reserved_59;\r
56 UINT16 user_addressable_sectors_lo;\r
57 UINT16 user_addressable_sectors_hi;\r
58 UINT16 reserved_62;\r
59 UINT16 multi_word_dma_mode;\r
60 UINT16 advanced_pio_modes;\r
61 UINT16 min_multi_word_dma_cycle_time;\r
62 UINT16 rec_multi_word_dma_cycle_time;\r
63 UINT16 min_pio_cycle_time_without_flow_control;\r
64 UINT16 min_pio_cycle_time_with_flow_control;\r
65 UINT16 reserved_69_79[11];\r
66 UINT16 major_version_no;\r
67 UINT16 minor_version_no;\r
68 UINT16 reserved_82_127[46];\r
69 UINT16 security_status;\r
70 UINT16 vendor_data_129_159[31];\r
71 UINT16 reserved_160_255[96];\r
72} IDENTIFY;\r
73\r
74typedef struct {\r
75 UINT8 peripheral_type;\r
76 UINT8 RMB;\r
77 UINT8 version;\r
78 UINT8 response_data_format;\r
79 UINT8 addnl_length;\r
80 UINT8 reserved_5;\r
81 UINT8 reserved_6;\r
82 UINT8 reserved_7;\r
83 UINT8 vendor_info[8];\r
84 UINT8 product_id[12];\r
85 UINT8 eeprom_product_code[4];\r
86 UINT8 firmware_rev_level[4];\r
87 UINT8 firmware_sub_rev_level[1];\r
88 UINT8 reserved_37;\r
89 UINT8 reserved_38;\r
90 UINT8 reserved_39;\r
91 UINT8 max_capacity_hi;\r
92 UINT8 max_capacity_mid;\r
93 UINT8 max_capacity_lo;\r
94 UINT8 reserved_43_95[95 - 43 + 1];\r
95 UINT8 vendor_id[20];\r
96 UINT8 eeprom_drive_sno[12];\r
97} INQUIRY_DATA;\r
98\r
99typedef struct {\r
100 UINT8 error_code : 7;\r
101 UINT8 valid : 1;\r
102 UINT8 reserved_1;\r
103 UINT8 sense_key : 4;\r
104 UINT8 reserved_21 : 1;\r
105 UINT8 ILI : 1;\r
106 UINT8 reserved_22 : 2;\r
107 UINT8 vendor_specific_3;\r
108 UINT8 vendor_specific_4;\r
109 UINT8 vendor_specific_5;\r
110 UINT8 vendor_specific_6;\r
111 UINT8 addnl_sense_length; // n - 7\r
112 UINT8 vendor_specific_8;\r
113 UINT8 vendor_specific_9;\r
114 UINT8 vendor_specific_10;\r
115 UINT8 vendor_specific_11;\r
116 UINT8 addnl_sense_code; // mandatory\r
117 UINT8 addnl_sense_code_qualifier; // mandatory\r
118 UINT8 field_replaceable_unit_code; // optional\r
119 UINT8 reserved_15;\r
120 UINT8 reserved_16;\r
121 UINT8 reserved_17;\r
122 //\r
123 // Followed by additional sense bytes : FIXME\r
124 //\r
125} REQUEST_SENSE_DATA;\r
126\r
127typedef struct {\r
128 UINT8 LastLba3;\r
129 UINT8 LastLba2;\r
130 UINT8 LastLba1;\r
131 UINT8 LastLba0;\r
132 UINT8 BlockSize3;\r
133 UINT8 BlockSize2;\r
134 UINT8 BlockSize1;\r
135 UINT8 BlockSize0;\r
136} READ_CAPACITY_DATA;\r
137\r
138typedef struct {\r
139 UINT8 reserved_0;\r
140 UINT8 reserved_1;\r
141 UINT8 reserved_2;\r
142 UINT8 Capacity_Length;\r
143 UINT8 LastLba3;\r
144 UINT8 LastLba2;\r
145 UINT8 LastLba1;\r
146 UINT8 LastLba0;\r
147 UINT8 DesCode : 2;\r
148 UINT8 reserved_9 : 6;\r
149 UINT8 BlockSize2;\r
150 UINT8 BlockSize1;\r
151 UINT8 BlockSize0;\r
152} READ_FORMAT_CAPACITY_DATA;\r
153\r
154#pragma pack()\r
155//\r
156// ATAPI Command\r
157//\r
158#define ATAPI_SOFT_RESET_CMD 0x08\r
159#define PACKET_CMD 0xA0\r
160#define ATAPI_IDENTIFY_DEVICE_CMD 0xA1\r
161#define ATAPI_SERVICE_CMD 0xA2\r
162\r
163//\r
164// ATAPI Packet Command\r
165//\r
166#pragma pack(1)\r
167\r
168typedef struct {\r
169 UINT8 opcode;\r
170 UINT8 reserved_1;\r
171 UINT8 reserved_2;\r
172 UINT8 reserved_3;\r
173 UINT8 reserved_4;\r
174 UINT8 reserved_5;\r
175 UINT8 reserved_6;\r
176 UINT8 reserved_7;\r
177 UINT8 reserved_8;\r
178 UINT8 reserved_9;\r
179 UINT8 reserved_10;\r
180 UINT8 reserved_11;\r
181} TEST_UNIT_READY_CMD;\r
182\r
183typedef struct {\r
184 UINT8 opcode;\r
185 UINT8 reserved_1 : 4;\r
186 UINT8 lun : 4;\r
187 UINT8 page_code;\r
188 UINT8 reserved_3;\r
189 UINT8 allocation_length;\r
190 UINT8 reserved_5;\r
191 UINT8 reserved_6;\r
192 UINT8 reserved_7;\r
193 UINT8 reserved_8;\r
194 UINT8 reserved_9;\r
195 UINT8 reserved_10;\r
196 UINT8 reserved_11;\r
197} INQUIRY_CMD;\r
198\r
199typedef struct {\r
200 UINT8 opcode;\r
201 UINT8 reserved_1 : 4;\r
202 UINT8 lun : 4;\r
203 UINT8 reserved_2;\r
204 UINT8 reserved_3;\r
205 UINT8 allocation_length;\r
206 UINT8 reserved_5;\r
207 UINT8 reserved_6;\r
208 UINT8 reserved_7;\r
209 UINT8 reserved_8;\r
210 UINT8 reserved_9;\r
211 UINT8 reserved_10;\r
212 UINT8 reserved_11;\r
213} REQUEST_SENSE_CMD;\r
214\r
215typedef struct {\r
216 UINT8 opcode;\r
217 UINT8 reserved_1 : 5;\r
218 UINT8 lun : 3;\r
219 UINT8 Lba0;\r
220 UINT8 Lba1;\r
221 UINT8 Lba2;\r
222 UINT8 Lba3;\r
223 UINT8 reserved_6;\r
224 UINT8 TranLen0;\r
225 UINT8 TranLen1;\r
226 UINT8 reserved_9;\r
227 UINT8 reserved_10;\r
228 UINT8 reserved_11;\r
229} READ10_CMD;\r
230\r
231typedef struct {\r
232 UINT8 opcode;\r
233 UINT8 reserved_1;\r
234 UINT8 reserved_2;\r
235 UINT8 reserved_3;\r
236 UINT8 reserved_4;\r
237 UINT8 reserved_5;\r
238 UINT8 reserved_6;\r
239 UINT8 allocation_length_hi;\r
240 UINT8 allocation_length_lo;\r
241 UINT8 reserved_9;\r
242 UINT8 reserved_10;\r
243 UINT8 reserved_11;\r
244} READ_FORMAT_CAP_CMD;\r
245\r
246typedef struct {\r
247 UINT8 peripheral_type;\r
248 UINT8 RMB;\r
249 UINT8 version;\r
250 UINT8 response_data_format;\r
251 UINT8 addnl_length;\r
252 UINT8 reserved_5;\r
253 UINT8 reserved_6;\r
254 UINT8 reserved_7;\r
255 UINT8 vendor_info[8];\r
256 UINT8 product_id[12];\r
257 UINT8 eeprom_product_code[4];\r
258 UINT8 firmware_rev_level[4];\r
259} USB_INQUIRY_DATA;\r
260\r
261typedef union {\r
262 UINT16 Data16[6];\r
263 TEST_UNIT_READY_CMD TestUnitReady;\r
264 READ10_CMD Read10;\r
265 REQUEST_SENSE_CMD RequestSence;\r
266 INQUIRY_CMD Inquiry;\r
267 READ_FORMAT_CAP_CMD ReadFormatCapacity;\r
268} ATAPI_PACKET_COMMAND;\r
269\r
270#pragma pack()\r
271//\r
272// Packet Command Code\r
273//\r
274#define TEST_UNIT_READY 0x00\r
275#define REQUEST_SENSE 0x03\r
276#define INQUIRY 0x12\r
277#define READ_FORMAT_CAPACITY 0x23\r
278#define READ_CAPACITY 0x25\r
279#define READ_10 0x28\r
280\r
281#define DEFAULT_CTL (0x0a) // default content of device control register, disable INT\r
282#define DEFAULT_CMD (0xa0)\r
283\r
284#define MAX_ATAPI_BYTE_COUNT (0xfffe)\r
285\r
286//\r
287// Sense Key\r
288//\r
289#define REQUEST_SENSE_ERROR (0x70)\r
290#define SK_NO_SENSE (0x0)\r
291#define SK_RECOVERY_ERROR (0x1)\r
292#define SK_NOT_READY (0x2)\r
293#define SK_MEDIUM_ERROR (0x3)\r
294#define SK_HARDWARE_ERROR (0x4)\r
295#define SK_ILLEGAL_REQUEST (0x5)\r
296#define SK_UNIT_ATTENTION (0x6)\r
297#define SK_DATA_PROTECT (0x7)\r
298#define SK_BLANK_CHECK (0x8)\r
299#define SK_VENDOR_SPECIFIC (0x9)\r
300#define SK_RESERVED_A (0xA)\r
301#define SK_ABORT (0xB)\r
302#define SK_RESERVED_C (0xC)\r
303#define SK_OVERFLOW (0xD)\r
304#define SK_MISCOMPARE (0xE)\r
305#define SK_RESERVED_F (0xF)\r
306\r
307//\r
308// Additional Sense Codes\r
309//\r
310#define ASC_NOT_READY (0x04)\r
311#define ASC_MEDIA_ERR1 (0x10)\r
312#define ASC_MEDIA_ERR2 (0x11)\r
313#define ASC_MEDIA_ERR3 (0x14)\r
314#define ASC_MEDIA_ERR4 (0x30)\r
315#define ASC_MEDIA_UPSIDE_DOWN (0x06)\r
316#define ASC_INVALID_CMD (0x20)\r
317#define ASC_LBA_OUT_OF_RANGE (0x21)\r
318#define ASC_INVALID_FIELD (0x24)\r
319#define ASC_WRITE_PROTECTED (0x27)\r
320#define ASC_MEDIA_CHANGE (0x28)\r
321#define ASC_RESET (0x29) /* Power On Reset or Bus Reset occurred */\r
322#define ASC_ILLEGAL_FIELD (0x26)\r
323#define ASC_NO_MEDIA (0x3A)\r
324#define ASC_ILLEGAL_MODE_FOR_THIS_TRACK (0x64)\r
325\r
326//\r
327// Additional Sense Code Qualifier\r
328//\r
329#define ASCQ_IN_PROGRESS (0x01)\r
330\r
331#endif\r
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