[mirror_edk2.git] / EdkCompatibilityPkg / Foundation / Library / Dxe / Include / X64 / CpuFuncs.h

/*++\r
\r
Copyright (c) 2005 - 2006, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials                          \r
are licensed and made available under the terms and conditions of the BSD License         \r
which accompanies this distribution.  The full text of the license may be found at        \r
http://opensource.org/licenses/bsd-license.php                                            \r
                                                                                          \r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
\r
Module Name:\r
\r
  CpuFuncs.h\r
\r
Abstract:\r
\r
--*/\r
\r
#ifndef _CPU_FUNCS_H_\r
#define _CPU_FUNCS_H_\r
\r
#define EFI_CPUID_SIGNATURE         0x0\r
#define EFI_CPUID_VERSION_INFO      0x1\r
#define EFI_CPUID_CACHE_INFO        0x2\r
#define EFI_CPUID_SERIAL_NUMBER     0x3\r
#define EFI_CPUID_EXTENDED_FUNCTION 0x80000000\r
#define EFI_CPUID_EXTENDED_CPU_SIG  0x80000001\r
#define EFI_CPUID_BRAND_STRING1     0x80000002\r
#define EFI_CPUID_BRAND_STRING2     0x80000003\r
#define EFI_CPUID_BRAND_STRING3     0x80000004\r
\r
//\r
// CPUID version information masks\r
// Note: leaving masks here is for the compatibility\r
//       use EfiCpuVersion (...) instead\r
//\r
\r
#define EFI_CPUID_FAMILY                      0x0F00\r
#define EFI_CPUID_MODEL                       0x00F0\r
#define EFI_CPUID_STEPPING                    0x000F\r
\r
#define EFI_CPUID_PENTIUM_M                   0x0600\r
#define EFI_CPUID_BANIAS                      0x0090\r
#define EFI_CPUID_DOTHAN                      0x00D0\r
#define EFI_CPUID_NETBURST                    0x0F00\r
\r
#define EFI_MSR_IA32_PLATFORM_ID              0x17\r
#define EFI_MSR_IA32_APIC_BASE                0x1B\r
#define EFI_MSR_EBC_HARD_POWERON              0x2A\r
#define EFI_MSR_EBC_SOFT_POWERON              0x2B\r
#define BINIT_DRIVER_DISABLE                  0x40\r
#define INTERNAL_MCERR_DISABLE                0x20\r
#define INITIATOR_MCERR_DISABLE               0x10\r
#define EFI_MSR_EBC_FREQUENCY_ID              0x2C\r
#define EFI_MSR_IA32_BIOS_UPDT_TRIG           0x79\r
#define EFI_MSR_IA32_BIOS_SIGN_ID             0x8B\r
#define EFI_MSR_PSB_CLOCK_STATUS              0xCD\r
#define EFI_APIC_GLOBAL_ENABLE                0x800\r
#define EFI_MSR_IA32_MISC_ENABLE              0x1A0\r
#define LIMIT_CPUID_MAXVAL_ENABLE_BIT         0x00400000\r
#define AUTOMATIC_THERMAL_CONTROL_ENABLE_BIT  0x00000008\r
#define COMPATIBLE_FPU_OPCODE_ENABLE_BIT      0x00000004\r
#define LOGICAL_PROCESSOR_PRIORITY_ENABLE_BIT 0x00000002\r
#define FAST_STRING_ENABLE_BIT                0x00000001\r
\r
#define EFI_CACHE_VARIABLE_MTRR_BASE          0x200\r
#define EFI_CACHE_VARIABLE_MTRR_END           0x20F\r
#define EFI_CACHE_IA32_MTRR_DEF_TYPE          0x2FF\r
#define EFI_CACHE_VALID_ADDRESS               0xFFFFFF000\r
#define EFI_CACHE_MTRR_VALID                  0x800\r
#define EFI_CACHE_FIXED_MTRR_VALID            0x400\r
#define EFI_MSR_VALID_MASK                    0xFFFFFFFFF\r
\r
#define EFI_IA32_MTRR_FIX64K_00000            0x250\r
#define EFI_IA32_MTRR_FIX16K_80000            0x258\r
#define EFI_IA32_MTRR_FIX16K_A0000            0x259\r
#define EFI_IA32_MTRR_FIX4K_C0000             0x268\r
#define EFI_IA32_MTRR_FIX4K_C8000             0x269\r
#define EFI_IA32_MTRR_FIX4K_D0000             0x26A\r
#define EFI_IA32_MTRR_FIX4K_D8000             0x26B\r
#define EFI_IA32_MTRR_FIX4K_E0000             0x26C\r
#define EFI_IA32_MTRR_FIX4K_E8000             0x26D\r
#define EFI_IA32_MTRR_FIX4K_F0000             0x26E\r
#define EFI_IA32_MTRR_FIX4K_F8000             0x26F\r
\r
#define EFI_IA32_MCG_CAP                      0x179\r
#define EFI_IA32_MCG_CTL                      0x17B\r
#define EFI_IA32_MC0_CTL                      0x400\r
#define EFI_IA32_MC0_STATUS                   0x401\r
\r
#define EFI_CACHE_UNCACHEABLE                 0\r
#define EFI_CACHE_WRITECOMBINING              1\r
#define EFI_CACHE_WRITETHROUGH                4\r
#define EFI_CACHE_WRITEPROTECTED              5\r
#define EFI_CACHE_WRITEBACK                   6\r
\r
//\r
// Combine f(FamilyId), m(Model), s(SteppingId) to a single 32 bit number\r
//\r
#define EfiMakeCpuVersion(f, m, s)         \\r
  (((UINT32) (f) << 16) | ((UINT32) (m) << 8) | ((UINT32) (s)))\r
\r
\r
typedef struct {\r
  UINT32  HeaderVersion;\r
  UINT32  UpdateRevision;\r
  UINT32  Date;\r
  UINT32  ProcessorId;\r
  UINT32  Checksum;\r
  UINT32  LoaderRevision;\r
  UINT32  ProcessorFlags;\r
  UINT32  DataSize;\r
  UINT32  TotalSize;\r
  UINT8   Reserved[12];\r
} EFI_CPU_MICROCODE_HEADER;\r
\r
typedef struct {\r
  UINT32  ExtSigCount;\r
  UINT32  ExtChecksum;\r
  UINT8   Reserved[12];\r
  UINT32  ProcessorId;\r
  UINT32  ProcessorFlags;\r
  UINT32  Checksum;\r
} EFI_CPU_MICROCODE_EXT_HEADER;\r
\r
typedef struct {\r
  UINT32  RegEax;\r
  UINT32  RegEbx;\r
  UINT32  RegEcx;\r
  UINT32  RegEdx;\r
} EFI_CPUID_REGISTER;\r
\r
VOID\r
EfiWriteMsr (\r
  IN  UINT32      Input,\r
  IN  UINT64      Value\r
  )\r
/*++                               \r
                                                                                           \r
Routine Description:                                                \r
\r
  Write Cpu MSR\r
  \r
Arguments:                \r
\r
  Input  -The index value to select the register\r
  Value  -The value to write to the selected register                      \r
  \r
Returns:                                                            \r
\r
   None                                                \r
   \r
--*/\r
;\r
\r
UINT64\r
EfiReadMsr (\r
  IN  UINT32      Input\r
  )\r
/*++                                 \r
                                                                                         \r
Routine Description:                                                \r
\r
  Read Cpu MSR.\r
  \r
Arguments:                \r
\r
  Input: -The index value to select the register\r
                       \r
Returns:                                                            \r
\r
   Return the read data                                                \r
   \r
--*/\r
;\r
\r
VOID\r
EfiCpuid (\r
  IN  UINT32                    RegEax,\r
  OUT EFI_CPUID_REGISTER        *Reg\r
  )\r
/*++                                      \r
                                                                                    \r
Routine Description:                                     \r
           \r
  Get the Cpu info by excute the CPUID instruction.\r
  \r
Arguments:                \r
\r
   RegEax  -The input value to put into register EAX\r
   Reg     -The Output value                      \r
   \r
Returns:                         \r
                                   \r
   None                          \r
                         \r
--*/\r
;\r
\r
VOID\r
EfiCpuVersion (\r
  IN   UINT16  *FamilyId,    OPTIONAL\r
  IN   UINT8   *Model,       OPTIONAL\r
  IN   UINT8   *SteppingId,  OPTIONAL\r
  IN   UINT8   *Processor    OPTIONAL\r
  )\r
/*++\r
\r
Routine Description:\r
  Extract CPU detail version infomation\r
\r
Arguments:\r
  FamilyId   - FamilyId, including ExtendedFamilyId\r
  Model      - Model, including ExtendedModel\r
  SteppingId - SteppingId\r
  Processor  - Processor\r
\r
--*/\r
;\r
\r
UINT64\r
EfiReadTsc (\r
  VOID\r
  )\r
/*++                   \r
                                                                                                       \r
Routine Description:                                                \r
\r
  Read Time stamp.\r
  \r
Arguments:                \r
\r
  None                 \r
  \r
Returns:                                                            \r
\r
   Return the read data                                                \r
   \r
--*/\r
;\r
VOID\r
EfiCpuidExt (\r
  IN  UINT32                 RegisterInEax,\r
  IN  UINT32                 CacheLevel,\r
  OUT EFI_CPUID_REGISTER     *Regs\r
  )\r
/*++                                                                                                                          \r
Routine Description:                                                \r
  When RegisterInEax != 4, the functionality is the same as EfiCpuid.\r
  When RegisterInEax == 4, the function return the deterministic cache\r
  parameters by excuting the CPUID instruction\r
Arguments:                \r
   RegisterInEax: - The input value to put into register EAX\r
   CacheLevel:      - The deterministic cache level\r
   Regs:          - The Output value                      \r
Returns:                                                            \r
   None                                                \r
--*/\r
;\r
\r
#endif\r
Commit	Line	Data
3eb9473e	1	/*++\r
3eb9473e	2	\r
4ea9375a HT	3	Copyright (c) 2005 - 2006, Intel Corporation. All rights reserved.<BR>\r
4ea9375a HT	4	This program and the accompanying materials \r
3eb9473e	5	are licensed and made available under the terms and conditions of the BSD License \r
	6	which accompanies this distribution. The full text of the license may be found at \r
	7	http://opensource.org/licenses/bsd-license.php \r
	8	\r
	9	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
	10	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
	11	\r
	12	Module Name:\r
	13	\r
	14	CpuFuncs.h\r
	15	\r
	16	Abstract:\r
	17	\r
	18	--*/\r
	19	\r
	20	#ifndef _CPU_FUNCS_H_\r
	21	#define _CPU_FUNCS_H_\r
	22	\r
	23	#define EFI_CPUID_SIGNATURE 0x0\r
	24	#define EFI_CPUID_VERSION_INFO 0x1\r
	25	#define EFI_CPUID_CACHE_INFO 0x2\r
	26	#define EFI_CPUID_SERIAL_NUMBER 0x3\r
	27	#define EFI_CPUID_EXTENDED_FUNCTION 0x80000000\r
	28	#define EFI_CPUID_EXTENDED_CPU_SIG 0x80000001\r
	29	#define EFI_CPUID_BRAND_STRING1 0x80000002\r
	30	#define EFI_CPUID_BRAND_STRING2 0x80000003\r
	31	#define EFI_CPUID_BRAND_STRING3 0x80000004\r
	32	\r
	33	//\r
	34	// CPUID version information masks\r
	35	// Note: leaving masks here is for the compatibility\r
	36	// use EfiCpuVersion (...) instead\r
	37	//\r
	38	\r
	39	#define EFI_CPUID_FAMILY 0x0F00\r
	40	#define EFI_CPUID_MODEL 0x00F0\r
	41	#define EFI_CPUID_STEPPING 0x000F\r
	42	\r
	43	#define EFI_CPUID_PENTIUM_M 0x0600\r
	44	#define EFI_CPUID_BANIAS 0x0090\r
	45	#define EFI_CPUID_DOTHAN 0x00D0\r
	46	#define EFI_CPUID_NETBURST 0x0F00\r
	47	\r
	48	#define EFI_MSR_IA32_PLATFORM_ID 0x17\r
	49	#define EFI_MSR_IA32_APIC_BASE 0x1B\r
	50	#define EFI_MSR_EBC_HARD_POWERON 0x2A\r
	51	#define EFI_MSR_EBC_SOFT_POWERON 0x2B\r
	52	#define BINIT_DRIVER_DISABLE 0x40\r
	53	#define INTERNAL_MCERR_DISABLE 0x20\r
	54	#define INITIATOR_MCERR_DISABLE 0x10\r
	55	#define EFI_MSR_EBC_FREQUENCY_ID 0x2C\r
	56	#define EFI_MSR_IA32_BIOS_UPDT_TRIG 0x79\r
	57	#define EFI_MSR_IA32_BIOS_SIGN_ID 0x8B\r
	58	#define EFI_MSR_PSB_CLOCK_STATUS 0xCD\r
	59	#define EFI_APIC_GLOBAL_ENABLE 0x800\r
	60	#define EFI_MSR_IA32_MISC_ENABLE 0x1A0\r
	61	#define LIMIT_CPUID_MAXVAL_ENABLE_BIT 0x00400000\r
	62	#define AUTOMATIC_THERMAL_CONTROL_ENABLE_BIT 0x00000008\r
	63	#define COMPATIBLE_FPU_OPCODE_ENABLE_BIT 0x00000004\r
	64	#define LOGICAL_PROCESSOR_PRIORITY_ENABLE_BIT 0x00000002\r
	65	#define FAST_STRING_ENABLE_BIT 0x00000001\r
	66	\r
	67	#define EFI_CACHE_VARIABLE_MTRR_BASE 0x200\r
	68	#define EFI_CACHE_VARIABLE_MTRR_END 0x20F\r
69	#define EFI_CACHE_IA32_MTRR_DEF_TYPE 0x2FF\r
70	#define EFI_CACHE_VALID_ADDRESS 0xFFFFFF000\r
71	#define EFI_CACHE_MTRR_VALID 0x800\r
72	#define EFI_CACHE_FIXED_MTRR_VALID 0x400\r
73	#define EFI_MSR_VALID_MASK 0xFFFFFFFFF\r
74	\r
75	#define EFI_IA32_MTRR_FIX64K_00000 0x250\r
76	#define EFI_IA32_MTRR_FIX16K_80000 0x258\r
77	#define EFI_IA32_MTRR_FIX16K_A0000 0x259\r
78	#define EFI_IA32_MTRR_FIX4K_C0000 0x268\r
79	#define EFI_IA32_MTRR_FIX4K_C8000 0x269\r
80	#define EFI_IA32_MTRR_FIX4K_D0000 0x26A\r
81	#define EFI_IA32_MTRR_FIX4K_D8000 0x26B\r
82	#define EFI_IA32_MTRR_FIX4K_E0000 0x26C\r
83	#define EFI_IA32_MTRR_FIX4K_E8000 0x26D\r
84	#define EFI_IA32_MTRR_FIX4K_F0000 0x26E\r
85	#define EFI_IA32_MTRR_FIX4K_F8000 0x26F\r
86	\r
87	#define EFI_IA32_MCG_CAP 0x179\r
88	#define EFI_IA32_MCG_CTL 0x17B\r
89	#define EFI_IA32_MC0_CTL 0x400\r
90	#define EFI_IA32_MC0_STATUS 0x401\r
91	\r
92	#define EFI_CACHE_UNCACHEABLE 0\r
93	#define EFI_CACHE_WRITECOMBINING 1\r
94	#define EFI_CACHE_WRITETHROUGH 4\r
95	#define EFI_CACHE_WRITEPROTECTED 5\r
96	#define EFI_CACHE_WRITEBACK 6\r
97	\r
98	//\r
99	// Combine f(FamilyId), m(Model), s(SteppingId) to a single 32 bit number\r
100	//\r
101	#define EfiMakeCpuVersion(f, m, s) \\r
102	(((UINT32) (f) << 16) \| ((UINT32) (m) << 8) \| ((UINT32) (s)))\r
103	\r
104	\r
105	typedef struct {\r
106	UINT32 HeaderVersion;\r
107	UINT32 UpdateRevision;\r
108	UINT32 Date;\r
109	UINT32 ProcessorId;\r
110	UINT32 Checksum;\r
111	UINT32 LoaderRevision;\r
112	UINT32 ProcessorFlags;\r
113	UINT32 DataSize;\r
114	UINT32 TotalSize;\r
115	UINT8 Reserved[12];\r
116	} EFI_CPU_MICROCODE_HEADER;\r
117	\r
118	typedef struct {\r
119	UINT32 ExtSigCount;\r
120	UINT32 ExtChecksum;\r
121	UINT8 Reserved[12];\r
122	UINT32 ProcessorId;\r
123	UINT32 ProcessorFlags;\r
124	UINT32 Checksum;\r
125	} EFI_CPU_MICROCODE_EXT_HEADER;\r
126	\r
127	typedef struct {\r
128	UINT32 RegEax;\r
129	UINT32 RegEbx;\r
130	UINT32 RegEcx;\r
131	UINT32 RegEdx;\r
132	} EFI_CPUID_REGISTER;\r
133	\r
134	VOID\r
135	EfiWriteMsr (\r
136	IN UINT32 Input,\r
137	IN UINT64 Value\r
138	)\r
139	/*++ \r
140	\r
141	Routine Description: \r
142	\r
143	Write Cpu MSR\r
144	\r
145	Arguments: \r
146	\r
147	Input -The index value to select the register\r
148	Value -The value to write to the selected register \r
149	\r
150	Returns: \r
151	\r
152	None \r
153	\r
154	--*/\r
155	;\r
156	\r
157	UINT64\r
158	EfiReadMsr (\r
159	IN UINT32 Input\r
160	)\r
161	/*++ \r
162	\r
163	Routine Description: \r
164	\r
165	Read Cpu MSR.\r
166	\r
167	Arguments: \r
168	\r
169	Input: -The index value to select the register\r
170	\r
171	Returns: \r
172	\r
173	Return the read data \r
174	\r
175	--*/\r
176	;\r
177	\r
178	VOID\r
179	EfiCpuid (\r
180	IN UINT32 RegEax,\r
181	OUT EFI_CPUID_REGISTER *Reg\r
182	)\r
183	/*++ \r
184	\r
185	Routine Description: \r
186	\r
187	Get the Cpu info by excute the CPUID instruction.\r
188	\r
189	Arguments: \r
190	\r
191	RegEax -The input value to put into register EAX\r
192	Reg -The Output value \r
193	\r
194	Returns: \r
195	\r
196	None \r
197	\r
198	--*/\r
199	;\r
200	\r
201	VOID\r
202	EfiCpuVersion (\r
203	IN UINT16 *FamilyId, OPTIONAL\r
204	IN UINT8 *Model, OPTIONAL\r
205	IN UINT8 *SteppingId, OPTIONAL\r
206	IN UINT8 *Processor OPTIONAL\r
207	)\r
208	/*++\r
209	\r
210	Routine Description:\r
211	Extract CPU detail version infomation\r
212	\r
213	Arguments:\r
214	FamilyId - FamilyId, including ExtendedFamilyId\r
215	Model - Model, including ExtendedModel\r
216	SteppingId - SteppingId\r
217	Processor - Processor\r
218	\r
219	--*/\r
220	;\r
221	\r
222	UINT64\r
223	EfiReadTsc (\r
224	VOID\r
225	)\r
226	/*++ \r
227	\r
228	Routine Description: \r
229	\r
230	Read Time stamp.\r
231	\r
232	Arguments: \r
233	\r
234	None \r
235	\r
236	Returns: \r
237	\r
238	Return the read data \r
239	\r
240	--*/\r
241	;\r
242	VOID\r
243	EfiCpuidExt (\r
244	IN UINT32 RegisterInEax,\r
245	IN UINT32 CacheLevel,\r
246	OUT EFI_CPUID_REGISTER *Regs\r
247	)\r
248	/*++ \r
249	Routine Description: \r
250	When RegisterInEax != 4, the functionality is the same as EfiCpuid.\r
251	When RegisterInEax == 4, the function return the deterministic cache\r
252	parameters by excuting the CPUID instruction\r
253	Arguments: \r
254	RegisterInEax: - The input value to put into register EAX\r
255	CacheLevel: - The deterministic cache level\r
256	Regs: - The Output value \r
257	Returns: \r
258	None \r
259	--*/\r
260	;\r
261	\r
262	#endif\r