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3eb9473e | 1 | /*++\r |
2 | \r | |
2c7e5c2f HT |
3 | Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>\r |
4 | This program and the accompanying materials \r | |
3eb9473e | 5 | are licensed and made available under the terms and conditions of the BSD License \r |
6 | which accompanies this distribution. The full text of the license may be found at \r | |
7 | http://opensource.org/licenses/bsd-license.php \r | |
8 | \r | |
9 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
10 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
11 | \r | |
12 | \r | |
13 | Module Name:\r | |
14 | \r | |
15 | CpuBreakpint.c\r | |
16 | \r | |
17 | Abstract: \r | |
18 | \r | |
19 | --*/\r | |
20 | \r | |
c7f33ca4 | 21 | #include "BaseLibInternals.h"\r |
3eb9473e | 22 | \r |
23 | //void __mfa (void);\r | |
24 | \r | |
25 | #pragma intrinsic (_enable)\r | |
26 | #pragma intrinsic (_disable)\r | |
27 | #pragma intrinsic (__break)\r | |
28 | #pragma intrinsic (__mfa)\r | |
29 | \r | |
30 | \r | |
31 | /**\r | |
32 | Generates a breakpoint on the CPU.\r | |
33 | \r | |
34 | Generates a breakpoint on the CPU. The breakpoint must be implemented such\r | |
35 | that code can resume normal execution after the breakpoint.\r | |
36 | \r | |
37 | **/\r | |
38 | VOID\r | |
39 | EFIAPI\r | |
40 | CpuBreakpoint (\r | |
41 | VOID\r | |
42 | )\r | |
43 | {\r | |
44 | __break (0);\r | |
45 | }\r | |
46 | \r | |
47 | /**\r | |
48 | Used to serialize load and store operations.\r | |
49 | \r | |
50 | All loads and stores that proceed calls to this function are guaranteed to be\r | |
51 | globally visible when this function returns.\r | |
52 | \r | |
53 | **/\r | |
54 | VOID\r | |
55 | EFIAPI\r | |
56 | MemoryFence (\r | |
57 | VOID\r | |
58 | )\r | |
59 | {\r | |
60 | __mfa ();\r | |
61 | }\r | |
62 | \r | |
63 | /**\r | |
64 | Disables CPU interrupts.\r | |
65 | \r | |
66 | Disables CPU interrupts.\r | |
67 | \r | |
68 | **/\r | |
69 | VOID\r | |
70 | EFIAPI\r | |
71 | DisableInterrupts (\r | |
72 | VOID\r | |
73 | )\r | |
74 | {\r | |
75 | _disable ();\r | |
76 | }\r | |
77 | \r | |
78 | /**\r | |
79 | Enables CPU interrupts.\r | |
80 | \r | |
81 | Enables CPU interrupts.\r | |
82 | \r | |
83 | **/\r | |
84 | VOID\r | |
85 | EFIAPI\r | |
86 | EnableInterrupts (\r | |
87 | VOID\r | |
88 | )\r | |
89 | {\r | |
90 | _enable ();\r | |
91 | }\r | |
92 | \r | |
93 | /**\r | |
94 | Enables CPU interrupts for the smallest window required to capture any\r | |
95 | pending interrupts.\r | |
96 | \r | |
97 | Enables CPU interrupts for the smallest window required to capture any\r | |
98 | pending interrupts.\r | |
99 | \r | |
100 | **/\r | |
101 | VOID\r | |
102 | EFIAPI\r | |
103 | EnableDisableInterrupts (\r | |
104 | VOID\r | |
105 | )\r | |
106 | {\r | |
107 | EnableInterrupts ();\r | |
108 | DisableInterrupts ();\r | |
109 | }\r | |
110 | \r | |
111 | /**\r | |
112 | Places the CPU in a sleep state until an interrupt is received.\r | |
113 | \r | |
114 | Places the CPU in a sleep state until an interrupt is received. If interrupts\r | |
115 | are disabled prior to calling this function, then the CPU will be placed in a\r | |
116 | sleep state indefinitely.\r | |
117 | \r | |
118 | **/\r | |
119 | VOID\r | |
120 | EFIAPI\r | |
121 | CpuSleep (\r | |
122 | VOID\r | |
123 | )\r | |
124 | {\r | |
125 | PalCallStatic (NULL, 29, 0, 0, 0);\r | |
126 | }\r |