projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 3eb9473e | 1 | //++\r |
| 4ea9375a HT |
2 | // Copyright (c) 2004, Intel Corporation. All rights reserved.<BR>\r |
| 3 | // This program and the accompanying materials \r | |
| 3eb9473e | 4 | // are licensed and made available under the terms and conditions of the BSD License \r |
| 5 | // which accompanies this distribution. The full text of the license may be found at \r | |
| 6 | // http://opensource.org/licenses/bsd-license.php \r | |
| 7 | // \r | |
| 8 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
| 9 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
| 10 | // \r | |
| 11 | // Module Name:\r | |
| 12 | //\r | |
| 13 | // IpfCpuCache.s\r | |
| 14 | //\r | |
| 15 | // Abstract:\r | |
| 16 | //\r | |
| 17 | // Contains Misc assembly procedures to support IPF CPU AP.\r | |
| 18 | //\r | |
| 19 | // Revision History:\r | |
| 20 | //\r | |
| 21 | //--\r | |
| 22 | \r | |
| 23 | .file "IpfCpuCache.s"\r | |
| 24 | \r | |
| 25 | #include "IpfMacro.i"\r | |
| 26 | #include "IpfDefines.h"\r | |
| 27 | \r | |
| 28 | //-----------------------------------------------------------------------------\r | |
| 29 | //++\r | |
| 30 | // Flush Cache\r | |
| 31 | //\r | |
| 32 | // Arguments : \r | |
| 33 | \r | |
| 34 | // Input = in0 = Starting Address to Flush.\r | |
| 35 | // Input = in1 = Length in bytes.\r | |
| 36 | // Input = b0 = return branch register.\r | |
| 37 | // On Entry :\r | |
| 38 | //\r | |
| 39 | // Return Value: \r | |
| 40 | //\r | |
| 41 | // VOID\r | |
| 42 | // SalFlushCache (\r | |
| 43 | // IN UINT64 BaseToFlush,\r | |
| 44 | // IN UINT64 LengthToFlush\r | |
| 45 | // );\r | |
| 46 | //\r | |
| 47 | //--\r | |
| 48 | //---------------------------------------------------------------------------\r | |
| 49 | PROCEDURE_ENTRY (SalFlushCache)\r | |
| 50 | \r | |
| 51 | NESTED_SETUP (5,8,0,0)\r | |
| 52 | \r | |
| 53 | mov loc2 = ar.lc\r | |
| 54 | \r | |
| 55 | mov loc3 = in0 // Start address.\r | |
| 56 | mov loc4 = in1;; // Length in bytes.\r | |
| 57 | \r | |
| 58 | cmp.eq p6,p7 = loc4, r0;; // If Length is zero then don't flush any cache\r | |
| 59 | (p6) br.spnt.many DoneFlushingC;; \r | |
| 60 | \r | |
| 61 | add loc4 = loc4,loc3 \r | |
| 62 | mov loc5 = 1;;\r | |
| 63 | sub loc4 = loc4, loc5 ;; // the End address to flush\r | |
| 64 | \r | |
| 65 | dep loc3 = r0,loc3,0,5 \r | |
| 66 | dep loc4 = r0,loc4,0,5;; \r | |
| 67 | shr loc3 = loc3,5 \r | |
| 68 | shr loc4 = loc4,5;; // 32 byte cache line\r | |
| 69 | \r | |
| 70 | sub loc4 = loc4,loc3;; // total flush count, It should be add 1 but \r | |
| 71 | // the br.cloop will first execute one time \r | |
| 72 | mov loc3 = in0 \r | |
| 73 | mov loc5 = 32 \r | |
| 74 | mov ar.lc = loc4;;\r | |
| 75 | \r | |
| 76 | StillFlushingC:\r | |
| 77 | fc loc3;; \r | |
| 78 | sync.i;;\r | |
| 79 | srlz.i;;\r | |
| 80 | add loc3 = loc5,loc3;;\r | |
| 81 | br.cloop.sptk.few StillFlushingC;;\r | |
| 82 | \r | |
| 83 | DoneFlushingC: \r | |
| 84 | mov ar.lc = loc2 \r | |
| 85 | NESTED_RETURN\r | |
| 86 | \r | |
| 87 | PROCEDURE_EXIT (SalFlushCache)\r | |
| 88 | \r |