Make sure all DMA related buffer allocation through PCI IO interface, not allocated...

[mirror_edk2.git] / EdkModulePkg / Bus / Pci / IdeBus / Dxe / ata.c

/** @file\r
  Copyright (c) 2006, Intel Corporation\r
  All rights reserved. This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
  @par Revision Reference:\r
  2002-6: Add Atapi6 enhancement, support >120GB hard disk, including\r
  update - ATAIdentity() func\r
  update - AtaBlockIoReadBlocks() func\r
  update - AtaBlockIoWriteBlocks() func\r
  add    - AtaAtapi6Identify() func\r
  add    - AtaReadSectorsExt() func\r
  add    - AtaWriteSectorsExt() func\r
  add    - AtaPioDataInExt() func\r
  add    - AtaPioDataOutExt() func\r
\r
**/\r
\r
#include "idebus.h"\r
\r
\r
EFI_STATUS\r
AtaReadSectorsExt (\r
  IN  IDE_BLK_IO_DEV  *IdeDev,\r
  IN  OUT VOID        *DataBuffer,\r
  IN  EFI_LBA         StartLba,\r
  IN  UINTN           NumberOfBlocks\r
  );\r
\r
EFI_STATUS\r
AtaWriteSectorsExt (\r
  IN  IDE_BLK_IO_DEV  *IdeDev,\r
  IN  VOID            *DataBuffer,\r
  IN  EFI_LBA         StartLba,\r
  IN  UINTN           NumberOfBlocks\r
  );\r
\r
EFI_STATUS\r
AtaPioDataInExt (\r
  IN  IDE_BLK_IO_DEV  *IdeDev,\r
  IN  OUT VOID        *Buffer,\r
  IN  UINT32          ByteCount,\r
  IN  UINT8           AtaCommand,\r
  IN  EFI_LBA         StartLba,\r
  IN  UINT16          SectorCount\r
  );\r
\r
EFI_STATUS\r
AtaPioDataOutExt (\r
  IN  IDE_BLK_IO_DEV  *IdeDev,\r
  IN  VOID            *Buffer,\r
  IN  UINT32          ByteCount,\r
  IN  UINT8           AtaCommand,\r
  IN  EFI_LBA         StartLba,\r
  IN  UINT16          SectorCount\r
  );\r
\r
/**\r
  Sends out an ATA Identify Command to the specified device.\r
\r
  This function is called by DiscoverIdeDevice() during its device\r
  identification. It sends out the ATA Identify Command to the\r
  specified device. Only ATA device responses to this command. If\r
  the command succeeds, it returns the Identify data structure which\r
  contains information about the device. This function extracts the\r
  information it needs to fill the IDE_BLK_IO_DEV data structure,\r
  including device type, media block size, media capacity, and etc.\r
\r
  @param[in] *IdeDev\r
  pointer pointing to IDE_BLK_IO_DEV data structure,used\r
  to record all the information of the IDE device.\r
\r
  @retval EFI_SUCCESS Identify ATA device successfully.\r
\r
  @retval EFI_DEVICE_ERROR ATA Identify Device Command failed or\r
  device is not ATA device.\r
\r
  @note\r
  parameter IdeDev will be updated in this function.\r
\r
**/\r
EFI_STATUS\r
ATAIdentify (\r
  IN  IDE_BLK_IO_DEV  *IdeDev\r
  )\r
{\r
  EFI_STATUS        Status;\r
  EFI_IDENTIFY_DATA *AtaIdentifyPointer;\r
  UINT32            Capacity;\r
  UINT8             DeviceSelect;\r
\r
  //\r
  //  AtaIdentifyPointer is used for accommodating returned IDENTIFY data of\r
  //  the ATA Identify command\r
  //\r
  AtaIdentifyPointer = (EFI_IDENTIFY_DATA *) AllocateZeroPool (sizeof (EFI_IDENTIFY_DATA));\r
\r
  //\r
  //  use ATA PIO Data In protocol to send ATA Identify command\r
  //  and receive data from device\r
  //\r
  DeviceSelect  = 0;\r
  DeviceSelect  = (UINT8) ((IdeDev->Device) << 4);\r
  Status = AtaPioDataIn (\r
            IdeDev,\r
            (VOID *) AtaIdentifyPointer,\r
            sizeof (EFI_IDENTIFY_DATA),\r
            IDENTIFY_DRIVE_CMD,\r
            DeviceSelect,\r
            0,\r
            0,\r
            0,\r
            0\r
            );\r
  //\r
  // If ATA Identify command succeeds, then according to the received\r
  // IDENTIFY data,\r
  // identify the device type ( ATA or not ).\r
  // If ATA device, fill the information in IdeDev.\r
  // If not ATA device, return IDE_DEVICE_ERROR\r
  //\r
  if (!EFI_ERROR (Status)) {\r
\r
    IdeDev->pIdData = AtaIdentifyPointer;\r
\r
    //\r
    // Print ATA Module Name\r
    //\r
    PrintAtaModuleName (IdeDev);\r
\r
    //\r
    // bit 15 of pAtaIdentify->config is used to identify whether device is\r
    // ATA device or ATAPI device.\r
    // if 0, means ATA device; if 1, means ATAPI device.\r
    //\r
    if ((AtaIdentifyPointer->AtaData.config & 0x8000) == 0x00) {\r
      //\r
      // Detect if support S.M.A.R.T. If yes, enable it as default\r
      //\r
      AtaSMARTSupport (IdeDev);\r
\r
      //\r
      // Check whether this device needs 48-bit addressing (ATAPI-6 ata device)\r
      //\r
      Status = AtaAtapi6Identify (IdeDev);\r
      if (!EFI_ERROR (Status)) {\r
        //\r
        // It's a disk with >120GB capacity, initialized in AtaAtapi6Identify()\r
        //\r
        return EFI_SUCCESS;\r
      }\r
      //\r
      // This is a hard disk <= 120GB capacity, treat it as normal hard disk\r
      //\r
      IdeDev->Type = IdeHardDisk;\r
\r
      //\r
      // Block Media Information:\r
      // Media->LogicalPartition , Media->WriteCaching will be filled\r
      // in the DiscoverIdeDevcie() function.\r
      //\r
      IdeDev->BlkIo.Media->IoAlign        = 4;\r
      IdeDev->BlkIo.Media->MediaId        = 1;\r
      IdeDev->BlkIo.Media->RemovableMedia = FALSE;\r
      IdeDev->BlkIo.Media->MediaPresent   = TRUE;\r
      IdeDev->BlkIo.Media->ReadOnly       = FALSE;\r
      IdeDev->BlkIo.Media->BlockSize      = 0x200;\r
\r
      //\r
      // Calculate device capacity\r
      //\r
      Capacity = ((UINT32)AtaIdentifyPointer->AtaData.user_addressable_sectors_hi << 16) |\r
                  AtaIdentifyPointer->AtaData.user_addressable_sectors_lo ;\r
      IdeDev->BlkIo.Media->LastBlock = Capacity - 1;\r
\r
      return EFI_SUCCESS;\r
\r
    }\r
  }\r
\r
  gBS->FreePool (AtaIdentifyPointer);\r
  //\r
  // Make sure the pIdData will not be freed again.\r
  //\r
  IdeDev->pIdData = NULL;\r
\r
  return EFI_DEVICE_ERROR;\r
}\r
\r
\r
/**\r
  This function is called by ATAIdentify() to identity whether this disk\r
  supports ATA/ATAPI6 48bit addressing, ie support >120G capacity\r
\r
  @param[in] *IdeDev\r
  pointer pointing to IDE_BLK_IO_DEV data structure, used\r
  to record all the information of the IDE device.\r
\r
  @retval  EFI_SUCCESS The disk specified by IdeDev is a Atapi6 supported one\r
  and 48-bit addressing must be used\r
\r
  @retval  EFI_UNSUPPORTED The disk dosn't not support Atapi6 or it supports but\r
  the capacity is below 120G, 48bit addressing is not\r
  needed\r
\r
  @note\r
  This function must be called after DEVICE_IDENTITY command has been\r
  successfully returned\r
\r
**/\r
EFI_STATUS\r
AtaAtapi6Identify (\r
  IN  IDE_BLK_IO_DEV  *IdeDev\r
  )\r
{\r
  UINT8             Index;\r
  EFI_LBA           TmpLba;\r
  EFI_LBA           Capacity;\r
  EFI_IDENTIFY_DATA *Atapi6IdentifyStruct;\r
\r
  if (IdeDev->pIdData == NULL) {\r
    return EFI_UNSUPPORTED;\r
  }\r
\r
  Atapi6IdentifyStruct = IdeDev->pIdData;\r
\r
  if ((Atapi6IdentifyStruct->AtapiData.cmd_set_support_83 & bit10) == 0) {\r
    //\r
    // The device dosn't support 48 bit addressing\r
    //\r
    return EFI_UNSUPPORTED;\r
  }\r
\r
  //\r
  // 48 bit address feature set is supported, get maximum capacity\r
  //\r
  Capacity = Atapi6IdentifyStruct->AtapiData.max_user_lba_for_48bit_addr[0];\r
  for (Index = 1; Index < 4; Index++) {\r
    //\r
    // Lower byte goes first: word[100] is the lowest word, word[103] is highest\r
    //\r
    TmpLba = Atapi6IdentifyStruct->AtapiData.max_user_lba_for_48bit_addr[Index];\r
    Capacity |= LShiftU64 (TmpLba, 16 * Index);\r
  }\r
\r
  if (Capacity > MAX_28BIT_ADDRESSING_CAPACITY) {\r
    //\r
    // Capacity exceeds 120GB. 48-bit addressing is really needed\r
    //\r
    IdeDev->Type = Ide48bitAddressingHardDisk;\r
\r
    //\r
    // Fill block media information:Media->LogicalPartition ,\r
    // Media->WriteCaching will be filledin the DiscoverIdeDevcie() function.\r
    //\r
    IdeDev->BlkIo.Media->IoAlign        = 4;\r
    IdeDev->BlkIo.Media->MediaId        = 1;\r
    IdeDev->BlkIo.Media->RemovableMedia = FALSE;\r
    IdeDev->BlkIo.Media->MediaPresent   = TRUE;\r
    IdeDev->BlkIo.Media->ReadOnly       = FALSE;\r
    IdeDev->BlkIo.Media->BlockSize      = 0x200;\r
    IdeDev->BlkIo.Media->LastBlock      = Capacity - 1;\r
\r
    return EFI_SUCCESS;\r
  }\r
\r
  return EFI_UNSUPPORTED;\r
}\r
\r
/**\r
  This function is called by ATAIdentify() or ATAPIIdentify()\r
  to print device's module name.\r
\r
  @param[in] *IdeDev\r
  pointer pointing to IDE_BLK_IO_DEV data structure, used\r
  to record all the information of the IDE device.\r
\r
**/\r
VOID\r
PrintAtaModuleName (\r
  IN  IDE_BLK_IO_DEV  *IdeDev\r
  )\r
{\r
  if (IdeDev->pIdData == NULL) {\r
    return ;\r
  }\r
\r
  SwapStringChars (IdeDev->ModelName, IdeDev->pIdData->AtaData.ModelName, 40);\r
  IdeDev->ModelName[40] = 0x00;\r
}\r
\r
/**\r
  This function is used to send out ATA commands conforms to the\r
  PIO Data In Protocol.\r
\r
  @param[in] *IdeDev\r
  pointer pointing to IDE_BLK_IO_DEV data structure, used\r
  to record all the information of the IDE device.\r
\r
  @param[in] *Buffer\r
  buffer contained data transferred from device to host.\r
\r
  @param[in] ByteCount\r
  data size in byte unit of the buffer.\r
\r
  @param[in] AtaCommand\r
  value of the Command Register\r
\r
  @param[in] Head\r
  value of the Head/Device Register\r
\r
  @param[in] SectorCount\r
  value of the Sector Count Register\r
\r
  @param[in] SectorNumber\r
  value of the Sector Number Register\r
\r
  @param[in] CylinderLsb\r
  value of the low byte of the Cylinder Register\r
\r
  @param[in] CylinderMsb\r
  value of the high byte of the Cylinder Register\r
\r
  @retval EFI_SUCCESS send out the ATA command and device send required\r
  data successfully.\r
\r
  @retval EFI_DEVICE_ERROR command sent failed.\r
\r
**/\r
EFI_STATUS\r
AtaPioDataIn (\r
  IN  IDE_BLK_IO_DEV  *IdeDev,\r
  IN  VOID            *Buffer,\r
  IN  UINT32          ByteCount,\r
  IN  UINT8           AtaCommand,\r
  IN  UINT8           Head,\r
  IN  UINT8           SectorCount,\r
  IN  UINT8           SectorNumber,\r
  IN  UINT8           CylinderLsb,\r
  IN  UINT8           CylinderMsb\r
  )\r
{\r
  UINTN       WordCount;\r
  UINTN       Increment;\r
  UINT16      *Buffer16;\r
  EFI_STATUS  Status;\r
\r
  Status = WaitForBSYClear (IdeDev, ATATIMEOUT);\r
  if (EFI_ERROR (Status)) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  //\r
  //  e0:1110,0000-- bit7 and bit5 are reserved bits.\r
  //           bit6 set means LBA mode\r
  //\r
  IDEWritePortB (\r
    IdeDev->PciIo,\r
    IdeDev->IoPort->Head,\r
    (UINT8) ((IdeDev->Device << 4) | 0xe0 | Head)\r
    );\r
\r
  //\r
  // All ATAPI device's ATA commands can be issued regardless of the\r
  // state of the DRDY\r
  //\r
  if (IdeDev->Type == IdeHardDisk) {\r
\r
    Status = DRDYReady (IdeDev, ATATIMEOUT);\r
    if (EFI_ERROR (Status)) {\r
      return EFI_DEVICE_ERROR;\r
    }\r
  }\r
  //\r
  // set all the command parameters\r
  // Before write to all the following registers, BSY and DRQ must be 0.\r
  //\r
  Status = DRQClear2 (IdeDev, ATATIMEOUT);\r
  if (EFI_ERROR (Status)) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  if (AtaCommand == SET_FEATURES_CMD) {\r
    IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, 0x03);\r
  }\r
\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, SectorNumber);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, CylinderLsb);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, CylinderMsb);\r
\r
  //\r
  // send command via Command Register\r
  //\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, AtaCommand);\r
\r
  Buffer16 = (UINT16 *) Buffer;\r
\r
  //\r
  // According to PIO data in protocol, host can perform a series of reads to\r
  // the data register after each time device set DRQ ready;\r
  // The data size of "a series of read" is command specific.\r
  // For most ATA command, data size received from device will not exceed\r
  // 1 sector, hence the data size for "a series of read" can be the whole data\r
  // size of one command request.\r
  // For ATA command such as Read Sector command, the data size of one ATA\r
  // command request is often larger than 1 sector, according to the\r
  // Read Sector command, the data size of "a series of read" is exactly 1\r
  // sector.\r
  // Here for simplification reason, we specify the data size for\r
  // "a series of read" to 1 sector (256 words) if data size of one ATA command\r
  // request is larger than 256 words.\r
  //\r
  Increment = 256;\r
\r
  //\r
  // used to record bytes of currently transfered data\r
  //\r
  WordCount = 0;\r
\r
  while (WordCount < ByteCount / 2) {\r
    //\r
    // Poll DRQ bit set, data transfer can be performed only when DRQ is ready.\r
    //\r
    Status = DRQReady2 (IdeDev, ATATIMEOUT);\r
    if (EFI_ERROR (Status)) {\r
      return EFI_DEVICE_ERROR;\r
    }\r
\r
    Status = CheckErrorStatus (IdeDev);\r
    if (EFI_ERROR (Status)) {\r
      return EFI_DEVICE_ERROR;\r
    }\r
\r
    //\r
    // Get the byte count for one series of read\r
    //\r
    if ((WordCount + Increment) > ByteCount / 2) {\r
      Increment = ByteCount / 2 - WordCount;\r
    }\r
\r
    IDEReadPortWMultiple (\r
      IdeDev->PciIo,\r
      IdeDev->IoPort->Data,\r
      Increment,\r
      Buffer16\r
      );\r
\r
    WordCount += Increment;\r
    Buffer16 += Increment;\r
\r
  }\r
\r
  DRQClear (IdeDev, ATATIMEOUT);\r
\r
  return CheckErrorStatus (IdeDev);\r
}\r
\r
/**\r
  This function is used to send out ATA commands conforms to the\r
  PIO Data Out Protocol.\r
\r
  @param *IdeDev\r
  pointer pointing to IDE_BLK_IO_DEV data structure, used\r
  to record all the information of the IDE device.\r
\r
  @param *Buffer      buffer contained data transferred from host to device.\r
  @param ByteCount    data size in byte unit of the buffer.\r
  @param AtaCommand   value of the Command Register\r
  @param Head         value of the Head/Device Register\r
  @param SectorCount  value of the Sector Count Register\r
  @param SectorNumber value of the Sector Number Register\r
  @param CylinderLsb  value of the low byte of the Cylinder Register\r
  @param CylinderMsb  value of the high byte of the Cylinder Register\r
\r
  @retval EFI_SUCCESS send out the ATA command and device received required\r
  data successfully.\r
\r
  @retval EFI_DEVICE_ERROR command sent failed.\r
\r
**/\r
EFI_STATUS\r
AtaPioDataOut (\r
  IN  IDE_BLK_IO_DEV  *IdeDev,\r
  IN  VOID            *Buffer,\r
  IN  UINT32          ByteCount,\r
  IN  UINT8           AtaCommand,\r
  IN  UINT8           Head,\r
  IN  UINT8           SectorCount,\r
  IN  UINT8           SectorNumber,\r
  IN  UINT8           CylinderLsb,\r
  IN  UINT8           CylinderMsb\r
  )\r
{\r
  UINTN       WordCount;\r
  UINTN       Increment;\r
  UINT16      *Buffer16;\r
  EFI_STATUS  Status;\r
\r
  Status = WaitForBSYClear (IdeDev, ATATIMEOUT);\r
  if (EFI_ERROR (Status)) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  //\r
  // select device via Head/Device register.\r
  // Before write Head/Device register, BSY and DRQ must be 0.\r
  //\r
  Status = DRQClear2 (IdeDev, ATATIMEOUT);\r
  if (EFI_ERROR (Status)) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  //\r
  // e0:1110,0000-- bit7 and bit5 are reserved bits.\r
  //          bit6 set means LBA mode\r
  //\r
  IDEWritePortB (\r
    IdeDev->PciIo,\r
    IdeDev->IoPort->Head,\r
    (UINT8) ((IdeDev->Device << 4) | 0xe0 | Head)\r
    );\r
\r
  Status = DRDYReady (IdeDev, ATATIMEOUT);\r
  if (EFI_ERROR (Status)) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  //\r
  // set all the command parameters\r
  // Before write to all the following registers, BSY and DRQ must be 0.\r
  //\r
  Status = DRQClear2 (IdeDev, ATATIMEOUT);\r
  if (EFI_ERROR (Status)) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, SectorNumber);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, CylinderLsb);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, CylinderMsb);\r
\r
  //\r
  // send command via Command Register\r
  //\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, AtaCommand);\r
\r
  Buffer16 = (UINT16 *) Buffer;\r
\r
  //\r
  // According to PIO data out protocol, host can perform a series of\r
  // writes to the data register after each time device set DRQ ready;\r
  // The data size of "a series of read" is command specific.\r
  // For most ATA command, data size written to device will not exceed 1 sector,\r
  // hence the data size for "a series of write" can be the data size of one\r
  // command request.\r
  // For ATA command such as Write Sector command, the data size of one\r
  // ATA command request is often larger than 1 sector, according to the\r
  // Write Sector command, the data size of "a series of read" is exactly\r
  // 1 sector.\r
  // Here for simplification reason, we specify the data size for\r
  // "a series of write" to 1 sector (256 words) if data size of one ATA command\r
  // request is larger than 256 words.\r
  //\r
  Increment = 256;\r
  WordCount = 0;\r
\r
  while (WordCount < ByteCount / 2) {\r
\r
    //\r
    // DRQReady2-- read Alternate Status Register to determine the DRQ bit\r
    // data transfer can be performed only when DRQ is ready.\r
    //\r
    Status = DRQReady2 (IdeDev, ATATIMEOUT);\r
    if (EFI_ERROR (Status)) {\r
      return EFI_DEVICE_ERROR;\r
    }\r
\r
    Status = CheckErrorStatus (IdeDev);\r
    if (EFI_ERROR (Status)) {\r
      return EFI_DEVICE_ERROR;\r
    }\r
\r
   //\r
   // Check the remaining byte count is less than 512 bytes\r
   //\r
   if ((WordCount + Increment) > ByteCount / 2) {\r
      Increment = ByteCount / 2 - WordCount;\r
    }\r
    //\r
    // perform a series of write without check DRQ ready\r
    //\r
\r
    IDEWritePortWMultiple (\r
      IdeDev->PciIo,\r
      IdeDev->IoPort->Data,\r
      Increment,\r
      Buffer16\r
      );\r
    WordCount += Increment;\r
    Buffer16 += Increment;\r
\r
  }\r
\r
  DRQClear (IdeDev, ATATIMEOUT);\r
\r
  return CheckErrorStatus (IdeDev);\r
}\r
\r
/**\r
  This function is used to analyze the Status Register and print out\r
  some debug information and if there is ERR bit set in the Status\r
  Register, the Error Register's value is also be parsed and print out.\r
\r
  @param[in] *IdeDev\r
  pointer pointing to IDE_BLK_IO_DEV data structure, used\r
  to record all the information of the IDE device.\r
\r
  @retval EFI_SUCCESS       No err information in the Status Register.\r
  @retval EFI_DEVICE_ERROR  Any err information in the Status Register.\r
\r
**/\r
EFI_STATUS\r
CheckErrorStatus (\r
  IN  IDE_BLK_IO_DEV  *IdeDev\r
  )\r
{\r
  UINT8 StatusRegister;\r
\r
//#ifdef EFI_DEBUG\r
\r
  UINT8 ErrorRegister;\r
\r
//#endif\r
\r
  StatusRegister = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Status);\r
\r
  DEBUG_CODE_BEGIN ();\r
\r
    if (StatusRegister & DWF) {\r
      DEBUG (\r
        (EFI_D_BLKIO,\r
        "CheckErrorStatus()-- %02x : Error : Write Fault\n",\r
        StatusRegister)\r
        );\r
    }\r
\r
    if (StatusRegister & CORR) {\r
      DEBUG (\r
        (EFI_D_BLKIO,\r
        "CheckErrorStatus()-- %02x : Error : Corrected Data\n",\r
        StatusRegister)\r
        );\r
    }\r
\r
    if (StatusRegister & ERR) {\r
      ErrorRegister = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Error);\r
\r
      if (ErrorRegister & BBK_ERR) {\r
      DEBUG (\r
        (EFI_D_BLKIO,\r
        "CheckErrorStatus()-- %02x : Error : Bad Block Detected\n",\r
        ErrorRegister)\r
        );\r
      }\r
\r
      if (ErrorRegister & UNC_ERR) {\r
        DEBUG (\r
          (EFI_D_BLKIO,\r
          "CheckErrorStatus()-- %02x : Error : Uncorrectable Data\n",\r
          ErrorRegister)\r
          );\r
      }\r
\r
      if (ErrorRegister & MC_ERR) {\r
        DEBUG (\r
          (EFI_D_BLKIO,\r
          "CheckErrorStatus()-- %02x : Error : Media Change\n",\r
          ErrorRegister)\r
          );\r
      }\r
\r
      if (ErrorRegister & ABRT_ERR) {\r
        DEBUG (\r
          (EFI_D_BLKIO,\r
          "CheckErrorStatus()-- %02x : Error : Abort\n",\r
          ErrorRegister)\r
          );\r
      }\r
\r
      if (ErrorRegister & TK0NF_ERR) {\r
        DEBUG (\r
          (EFI_D_BLKIO,\r
          "CheckErrorStatus()-- %02x : Error : Track 0 Not Found\n",\r
          ErrorRegister)\r
          );\r
      }\r
\r
      if (ErrorRegister & AMNF_ERR) {\r
        DEBUG (\r
          (EFI_D_BLKIO,\r
          "CheckErrorStatus()-- %02x : Error : Address Mark Not Found\n",\r
          ErrorRegister)\r
          );\r
      }\r
    }\r
\r
  DEBUG_CODE_END ();\r
\r
  if ((StatusRegister & (ERR | DWF | CORR)) == 0) {\r
    return EFI_SUCCESS;\r
  }\r
\r
  return EFI_DEVICE_ERROR;\r
\r
}\r
\r
/**\r
  This function is called by the AtaBlkIoReadBlocks() to perform\r
  reading from media in block unit.\r
\r
  @param[in] *IdeDev\r
  pointer pointing to IDE_BLK_IO_DEV data structure, used\r
  to record all the information of the IDE device.\r
\r
  @param[in] *DataBuffer\r
  A pointer to the destination buffer for the data.\r
\r
  @param[in] Lba\r
  The starting logical block address to read from\r
  on the device media.\r
\r
  @param[in] NumberOfBlocks\r
  The number of transfer data blocks.\r
\r
  @return return status is fully dependent on the return status\r
  of AtaPioDataIn() function.\r
\r
**/\r
EFI_STATUS\r
AtaReadSectors (\r
  IN  IDE_BLK_IO_DEV  *IdeDev,\r
  IN  VOID            *DataBuffer,\r
  IN  EFI_LBA         Lba,\r
  IN  UINTN           NumberOfBlocks\r
  )\r
{\r
  EFI_STATUS  Status;\r
  UINTN       BlocksRemaining;\r
  UINT32      Lba32;\r
  UINT8       Lba0;\r
  UINT8       Lba1;\r
  UINT8       Lba2;\r
  UINT8       Lba3;\r
  UINT8       AtaCommand;\r
  UINT8       SectorCount8;\r
  UINT16      SectorCount;\r
  UINTN       ByteCount;\r
  VOID        *Buffer;\r
\r
  Buffer = DataBuffer;\r
\r
  //\r
  // Using ATA Read Sector(s) command (opcode=0x20) with PIO DATA IN protocol\r
  //\r
  AtaCommand      = READ_SECTORS_CMD;\r
\r
\r
  BlocksRemaining = NumberOfBlocks;\r
\r
  Lba32           = (UINT32) Lba;\r
\r
  Status          = EFI_SUCCESS;\r
\r
  while (BlocksRemaining > 0) {\r
\r
    //\r
    // in ATA-3 spec, LBA is in 28 bit width\r
    //\r
    Lba0  = (UINT8) Lba32;\r
    Lba1  = (UINT8) (Lba32 >> 8);\r
    Lba2  = (UINT8) (Lba32 >> 16);\r
    //\r
    // low 4 bit of Lba3 stands for LBA bit24~bit27.\r
    //\r
    Lba3 = (UINT8) ((Lba32 >> 24) & 0x0f);\r
\r
    if (BlocksRemaining >= 0x100) {\r
\r
      //\r
      //  SectorCount8 is sent to Sector Count register, 0x00 means 256\r
      //  sectors to be read\r
      //\r
      SectorCount8 = 0x00;\r
      //\r
      //  SectorCount is used to record the number of sectors to be read\r
      //\r
      SectorCount = 256;\r
    } else {\r
\r
      SectorCount8  = (UINT8) BlocksRemaining;\r
      SectorCount   = (UINT16) BlocksRemaining;\r
    }\r
\r
    //\r
    // ByteCount is the number of bytes that will be read\r
    //\r
    ByteCount = SectorCount * (IdeDev->BlkIo.Media->BlockSize);\r
\r
    //\r
    // call AtaPioDataIn() to send Read Sector Command and receive data read\r
    //\r
    Status = AtaPioDataIn (\r
              IdeDev,\r
              Buffer,\r
              (UINT32) ByteCount,\r
              AtaCommand,\r
              Lba3,\r
              SectorCount8,\r
              Lba0,\r
              Lba1,\r
              Lba2\r
              );\r
    if (EFI_ERROR (Status)) {\r
      return Status;\r
    }\r
\r
    Lba32 += SectorCount;\r
    Buffer = ((UINT8 *) Buffer + ByteCount);\r
    BlocksRemaining -= SectorCount;\r
  }\r
\r
  return Status;\r
}\r
\r
/**\r
  This function is called by the AtaBlkIoWriteBlocks() to perform\r
  writing onto media in block unit.\r
\r
  @param[in] *IdeDev\r
  pointer pointing to IDE_BLK_IO_DEV data structure,used\r
  to record all the information of the IDE device.\r
\r
  @param[in] *BufferData\r
  A pointer to the source buffer for the data.\r
\r
  @param[in] Lba\r
  The starting logical block address to write onto\r
  the device media.\r
\r
  @param[in] NumberOfBlocks\r
  The number of transfer data blocks.\r
\r
  @return return status is fully dependent on the return status\r
  of AtaPioDataOut() function.\r
\r
**/\r
EFI_STATUS\r
AtaWriteSectors (\r
  IN  IDE_BLK_IO_DEV  *IdeDev,\r
  IN  VOID            *BufferData,\r
  IN  EFI_LBA         Lba,\r
  IN  UINTN           NumberOfBlocks\r
  )\r
{\r
  EFI_STATUS  Status;\r
  UINTN       BlocksRemaining;\r
  UINT32      Lba32;\r
  UINT8       Lba0;\r
  UINT8       Lba1;\r
  UINT8       Lba2;\r
  UINT8       Lba3;\r
  UINT8       AtaCommand;\r
  UINT8       SectorCount8;\r
  UINT16      SectorCount;\r
  UINTN       ByteCount;\r
  VOID        *Buffer;\r
\r
  Buffer = BufferData;\r
\r
  //\r
  // Using Write Sector(s) command (opcode=0x30) with PIO DATA OUT protocol\r
  //\r
  AtaCommand      = WRITE_SECTORS_CMD;\r
\r
  BlocksRemaining = NumberOfBlocks;\r
\r
  Lba32           = (UINT32) Lba;\r
\r
  Status          = EFI_SUCCESS;\r
\r
  while (BlocksRemaining > 0) {\r
\r
    Lba0  = (UINT8) Lba32;\r
    Lba1  = (UINT8) (Lba32 >> 8);\r
    Lba2  = (UINT8) (Lba32 >> 16);\r
    Lba3  = (UINT8) ((Lba32 >> 24) & 0x0f);\r
\r
    if (BlocksRemaining >= 0x100) {\r
\r
      //\r
      //  SectorCount8 is sent to Sector Count register, 0x00 means 256 sectors\r
      //  to be written\r
      //\r
      SectorCount8 = 0x00;\r
      //\r
      //  SectorCount is used to record the number of sectors to be written\r
      //\r
      SectorCount = 256;\r
    } else {\r
\r
      SectorCount8  = (UINT8) BlocksRemaining;\r
      SectorCount   = (UINT16) BlocksRemaining;\r
    }\r
\r
    ByteCount = SectorCount * (IdeDev->BlkIo.Media->BlockSize);\r
\r
    Status = AtaPioDataOut (\r
              IdeDev,\r
              Buffer,\r
              (UINT32) ByteCount,\r
              AtaCommand,\r
              Lba3,\r
              SectorCount8,\r
              Lba0,\r
              Lba1,\r
              Lba2\r
              );\r
    if (EFI_ERROR (Status)) {\r
      return Status;\r
    }\r
\r
    Lba32 += SectorCount;\r
    Buffer = ((UINT8 *) Buffer + ByteCount);\r
    BlocksRemaining -= SectorCount;\r
  }\r
\r
  return Status;\r
}\r
\r
/**\r
  This function is used to implement the Soft Reset on the specified\r
  device. But, the ATA Soft Reset mechanism is so strong a reset method\r
  that it will force resetting on both devices connected to the\r
  same cable.\r
\r
  It is called by IdeBlkIoReset(), a interface function of Block\r
  I/O protocol.\r
\r
  This function can also be used by the ATAPI device to perform reset when\r
  ATAPI Reset command is failed.\r
\r
  @param[in] *IdeDev\r
  pointer pointing to IDE_BLK_IO_DEV data structure, used\r
  to record all the information of the IDE device.\r
\r
  @retval EFI_SUCCESS       Soft reset completes successfully.\r
  @retval EFI_DEVICE_ERROR  Any step during the reset process is failed.\r
\r
  @note\r
  The registers initial values after ATA soft reset are different\r
  to the ATA device and ATAPI device.\r
\r
**/\r
EFI_STATUS\r
AtaSoftReset (\r
  IN  IDE_BLK_IO_DEV  *IdeDev\r
  )\r
{\r
\r
  UINT8 DeviceControl;\r
\r
  DeviceControl = 0;\r
  //\r
  // set SRST bit to initiate soft reset\r
  //\r
  DeviceControl |= SRST;\r
\r
  //\r
  // disable Interrupt\r
  //\r
  DeviceControl |= bit1;\r
\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);\r
\r
  //\r
  // SRST should assert for at least 5 us, we use 10 us for\r
  // better compatibility\r
  //\r
  gBS->Stall (10);\r
\r
  //\r
  // Enable interrupt to support UDMA, and clear SRST bit\r
  //\r
  DeviceControl = 0;\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);\r
\r
  //\r
  // Wait for at least 2 ms to check BSY status, we use 10 ms\r
  // for better compatibility\r
  //\r
  gBS->Stall(10000);\r
  //\r
  // slave device needs at most 31s to clear BSY\r
  //\r
  if (WaitForBSYClear (IdeDev, 31000) == EFI_TIMEOUT) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  This function is the ATA implementation for ReadBlocks in the\r
  Block I/O Protocol interface.\r
\r
  @param[in] *IdeBlkIoDevice\r
  Indicates the calling context.\r
\r
  @param[in] MediaId\r
  The media id that the read request is for.\r
\r
  @param[in] LBA\r
  The starting logical block address to read from\r
  on the device.\r
\r
  @param[in] BufferSize\r
  The size of the Buffer in bytes. This must be a\r
  multiple of the intrinsic block size of the device.\r
\r
  @param[out] *Buffer\r
  A pointer to the destination buffer for the data.\r
  The caller is responsible for either having implicit\r
  or explicit ownership of the memory that data is read into.\r
\r
  @retval EFI_SUCCESS       Read Blocks successfully.\r
  @retval EFI_DEVICE_ERROR  Read Blocks failed.\r
  @retval EFI_NO_MEDIA      There is no media in the device.\r
  @retval EFI_MEDIA_CHANGE  The MediaId is not for the current media.\r
\r
  @retval EFI_BAD_BUFFER_SIZE\r
  The BufferSize parameter is not a multiple of the\r
  intrinsic block size of the device.\r
\r
  @retval EFI_INVALID_PARAMETER\r
  The read request contains LBAs that are not valid,\r
  or the data buffer is not valid.\r
\r
  @note\r
  If Read Block error because of device error, this function will call\r
  AtaSoftReset() function to reset device.\r
\r
**/\r
EFI_STATUS\r
AtaBlkIoReadBlocks (\r
  IN IDE_BLK_IO_DEV   *IdeBlkIoDevice,\r
  IN UINT32           MediaId,\r
  IN EFI_LBA          LBA,\r
  IN UINTN            BufferSize,\r
  OUT VOID            *Buffer\r
  )\r
{\r
  EFI_BLOCK_IO_MEDIA  *Media;\r
  UINTN               BlockSize;\r
  UINTN               NumberOfBlocks;\r
  EFI_STATUS          Status;\r
\r
  if (Buffer == NULL) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  if (BufferSize == 0) {\r
    return EFI_SUCCESS;\r
  }\r
\r
  Status = EFI_SUCCESS;\r
\r
  //\r
  //  Get the intrinsic block size\r
  //\r
  Media           = IdeBlkIoDevice->BlkIo.Media;\r
  BlockSize       = Media->BlockSize;\r
\r
  NumberOfBlocks  = BufferSize / BlockSize;\r
\r
  if (MediaId != Media->MediaId) {\r
    return EFI_MEDIA_CHANGED;\r
  }\r
\r
  if (BufferSize % BlockSize != 0) {\r
    return EFI_BAD_BUFFER_SIZE;\r
  }\r
\r
  if (!(Media->MediaPresent)) {\r
    return EFI_NO_MEDIA;\r
  }\r
\r
  if (LBA > Media->LastBlock) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  if ((LBA + NumberOfBlocks - 1) > Media->LastBlock) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  if ((Media->IoAlign > 1) && (((UINTN) Buffer & (Media->IoAlign - 1)) != 0)) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  if (IdeBlkIoDevice->Type == Ide48bitAddressingHardDisk) {\r
    //\r
    // For ATA/ATAPI-6 device(capcity > 120GB), use ATA-6 read block mechanism\r
    //\r
    Status = AtaUdmaReadExt (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);\r
    if (EFI_ERROR (Status)) {\r
      Status = AtaReadSectorsExt (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);\r
    }\r
  } else {\r
    //\r
    // For ATA-3 compatible device, use ATA-3 read block mechanism\r
    //\r
    Status = AtaUdmaRead (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);\r
    if (EFI_ERROR (Status)) {\r
      Status = AtaReadSectors (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);\r
    }\r
  }\r
\r
  if (EFI_ERROR (Status)) {\r
    AtaSoftReset (IdeBlkIoDevice);\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  return EFI_SUCCESS;\r
\r
}\r
\r
/**\r
  This function is the ATA implementation for WriteBlocks in the\r
  Block I/O Protocol interface.\r
\r
  @param[in] *IdeBlkIoDevice\r
  Indicates the calling context.\r
\r
  @param[in] MediaId\r
  The media id that the write request is for.\r
\r
  @param[in] LBA\r
  The starting logical block address to write onto\r
  the device.\r
\r
  @param[in] BufferSize\r
  The size of the Buffer in bytes. This must be a\r
  multiple of the intrinsic block size of the device.\r
\r
  @param[out] *Buffer\r
  A pointer to the source buffer for the data.\r
  The caller is responsible for either having implicit\r
  or explicit ownership of the memory that data is\r
  written from.\r
\r
  @retval EFI_SUCCESS       Write Blocks successfully.\r
  @retval EFI_DEVICE_ERROR  Write Blocks failed.\r
  @retval EFI_NO_MEDIA      There is no media in the device.\r
  @retval EFI_MEDIA_CHANGE  The MediaId is not for the current media.\r
\r
  @retval EFI_BAD_BUFFER_SIZE\r
  The BufferSize parameter is not a multiple of the\r
  intrinsic block size of the device.\r
\r
  @retval EFI_INVALID_PARAMETER\r
  The write request contains LBAs that are not valid,\r
  or the data buffer is not valid.\r
\r
  @note\r
  If Write Block error because of device error, this function will call\r
  AtaSoftReset() function to reset device.\r
\r
**/\r
EFI_STATUS\r
AtaBlkIoWriteBlocks (\r
  IN  IDE_BLK_IO_DEV   *IdeBlkIoDevice,\r
  IN  UINT32           MediaId,\r
  IN  EFI_LBA          LBA,\r
  IN  UINTN            BufferSize,\r
  OUT VOID             *Buffer\r
  )\r
{\r
\r
  EFI_BLOCK_IO_MEDIA  *Media;\r
  UINTN               BlockSize;\r
  UINTN               NumberOfBlocks;\r
  EFI_STATUS          Status;\r
\r
  if (Buffer == NULL) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  if (BufferSize == 0) {\r
    return EFI_SUCCESS;\r
  }\r
\r
  Status = EFI_SUCCESS;\r
\r
  //\r
  // Get the intrinsic block size\r
  //\r
  Media           = IdeBlkIoDevice->BlkIo.Media;\r
  BlockSize       = Media->BlockSize;\r
  NumberOfBlocks  = BufferSize / BlockSize;\r
\r
  if (MediaId != Media->MediaId) {\r
    return EFI_MEDIA_CHANGED;\r
  }\r
\r
  if (BufferSize % BlockSize != 0) {\r
    return EFI_BAD_BUFFER_SIZE;\r
  }\r
\r
  if (LBA > Media->LastBlock) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  if ((LBA + NumberOfBlocks - 1) > Media->LastBlock) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  if ((Media->IoAlign > 1) && (((UINTN) Buffer & (Media->IoAlign - 1)) != 0)) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  if (IdeBlkIoDevice->Type == Ide48bitAddressingHardDisk) {\r
    //\r
    // For ATA/ATAPI-6 device(capcity > 120GB), use ATA-6 write block mechanism\r
    //\r
    Status = AtaUdmaWriteExt (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);\r
    if (EFI_ERROR (Status)) {\r
      Status = AtaWriteSectorsExt (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);\r
    }\r
  } else {\r
    //\r
    // For ATA-3 compatible device, use ATA-3 write block mechanism\r
    //\r
    Status = AtaUdmaWrite (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);\r
    if (EFI_ERROR (Status)) {\r
      Status = AtaWriteSectors (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);\r
    }\r
  }\r
\r
  if (EFI_ERROR (Status)) {\r
    AtaSoftReset (IdeBlkIoDevice);\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  This function is called by the AtaBlkIoReadBlocks() to perform\r
  reading from media in block unit. The function has been enhanced to\r
  support >120GB access and transfer at most 65536 blocks per command\r
\r
  @param[in] *IdeDev\r
  pointer pointing to IDE_BLK_IO_DEV data structure, used\r
  to record all the information of the IDE device.\r
\r
  @param[in] *DataBuffer    A pointer to the destination buffer for the data.\r
  @param[in] StartLba       The starting logical block address to read from\r
  on the device media.\r
  @param[in] NumberOfBlocks The number of transfer data blocks.\r
\r
  @return return status is fully dependent on the return status\r
  of AtaPioDataInExt() function.\r
\r
**/\r
EFI_STATUS\r
AtaReadSectorsExt (\r
  IN  IDE_BLK_IO_DEV  *IdeDev,\r
  IN  VOID            *DataBuffer,\r
  IN  EFI_LBA         StartLba,\r
  IN  UINTN           NumberOfBlocks\r
  )\r
{\r
  EFI_STATUS  Status;\r
  UINTN       BlocksRemaining;\r
  EFI_LBA     Lba64;\r
  UINT8       AtaCommand;\r
  UINT16      SectorCount;\r
  UINT32      ByteCount;\r
  VOID        *Buffer;\r
\r
  //\r
  // Using ATA "Read Sectors Ext" command(opcode=0x24) with PIO DATA IN protocol\r
  //\r
  AtaCommand      = READ_SECTORS_EXT_CMD;\r
  Buffer          = DataBuffer;\r
  BlocksRemaining = NumberOfBlocks;\r
  Lba64           = StartLba;\r
  Status          = EFI_SUCCESS;\r
\r
  while (BlocksRemaining > 0) {\r
\r
    if (BlocksRemaining >= 0x10000) {\r
      //\r
      //  SectorCount is used to record the number of sectors to be read\r
      //  Max 65536 sectors can be transfered at a time.\r
      //\r
      SectorCount = 0xffff;\r
    } else {\r
      SectorCount = (UINT16) BlocksRemaining;\r
    }\r
\r
    //\r
    // ByteCount is the number of bytes that will be read\r
    //\r
    ByteCount = SectorCount * (IdeDev->BlkIo.Media->BlockSize);\r
\r
    //\r
    // call AtaPioDataInExt() to send Read Sector Command and receive data read\r
    //\r
    Status = AtaPioDataInExt (\r
              IdeDev,\r
              Buffer,\r
              ByteCount,\r
              AtaCommand,\r
              Lba64,\r
              SectorCount\r
              );\r
    if (EFI_ERROR (Status)) {\r
      return Status;\r
    }\r
\r
    Lba64 += SectorCount;\r
    Buffer = ((UINT8 *) Buffer + ByteCount);\r
    BlocksRemaining -= SectorCount;\r
  }\r
\r
  return Status;\r
}\r
\r
/**\r
  This function is called by the AtaBlkIoWriteBlocks() to perform\r
  writing onto media in block unit. The function has been enhanced to\r
  support >120GB access and transfer at most 65536 blocks per command\r
\r
  @param[in] *IdeDev\r
  pointer pointing to IDE_BLK_IO_DEV data structure,used\r
  to record all the information of the IDE device.\r
\r
  @param[in] *DataBuffer\r
  A pointer to the source buffer for the data.\r
\r
  @param[in] Lba\r
  The starting logical block address to write onto\r
  the device media.\r
\r
  @param[in] NumberOfBlocks\r
  The number of transfer data blocks.\r
\r
  @return status is fully dependent on the return status\r
  of AtaPioDataOutExt() function.\r
\r
**/\r
EFI_STATUS\r
AtaWriteSectorsExt (\r
  IN  IDE_BLK_IO_DEV  *IdeDev,\r
  IN  VOID            *DataBuffer,\r
  IN  EFI_LBA         StartLba,\r
  IN  UINTN           NumberOfBlocks\r
  )\r
{\r
  EFI_STATUS  Status;\r
  EFI_LBA     Lba64;\r
  UINTN       BlocksRemaining;\r
  UINT8       AtaCommand;\r
  UINT16      SectorCount;\r
  UINT32      ByteCount;\r
  VOID        *Buffer;\r
\r
  //\r
  // Using ATA "Write Sectors Ext" cmd(opcode=0x24) with PIO DATA OUT protocol\r
  //\r
  AtaCommand      = WRITE_SECTORS_EXT_CMD;\r
  Lba64           = StartLba;\r
  Buffer          = DataBuffer;\r
  BlocksRemaining = NumberOfBlocks;\r
\r
  Status          = EFI_SUCCESS;\r
\r
  while (BlocksRemaining > 0) {\r
\r
    if (BlocksRemaining >= 0x10000) {\r
      //\r
      //  SectorCount is used to record the number of sectors to be written.\r
      //  Max 65536 sectors can be transfered at a time.\r
      //\r
      SectorCount = 0xffff;\r
    } else {\r
      SectorCount = (UINT16) BlocksRemaining;\r
    }\r
\r
    //\r
    // ByteCount is the number of bytes that will be written\r
    //\r
    ByteCount = SectorCount * (IdeDev->BlkIo.Media->BlockSize);\r
\r
    //\r
    // Call AtaPioDataOutExt() to send "Write Sectors Ext" Command\r
    //\r
    Status = AtaPioDataOutExt (\r
              IdeDev,\r
              Buffer,\r
              ByteCount,\r
              AtaCommand,\r
              Lba64,\r
              SectorCount\r
              );\r
    if (EFI_ERROR (Status)) {\r
      return Status;\r
    }\r
\r
    Lba64 += SectorCount;\r
    Buffer = ((UINT8 *) Buffer + ByteCount);\r
    BlocksRemaining -= SectorCount;\r
  }\r
\r
  return Status;\r
}\r
\r
/**\r
  This function is used to send out ATA commands conforms to the\r
  PIO Data In Protocol, supporting ATA/ATAPI-6 standard\r
\r
  Comparing with ATA-3 data in protocol, we have two differents here:<BR>\r
  1. Do NOT wait for DRQ clear before sending command into IDE device.(the\r
  wait will frequently fail... cause writing function return error)\r
\r
  2. Do NOT wait for DRQ clear after all data readed.(the wait greatly\r
  slow down writing performance by 100 times!)\r
\r
  @param[in] *IdeDev pointer pointing to IDE_BLK_IO_DEV data structure, used\r
  to record all the information of the IDE device.\r
\r
  @param[in,out] *Buffer  buffer contained data transferred from device to host.\r
  @param[in] ByteCount    data size in byte unit of the buffer.\r
  @param[in] AtaCommand   value of the Command Register\r
  @param[in] StartLba     the start LBA of this transaction\r
  @param[in] SectorCount  the count of sectors to be transfered\r
\r
  @retval EFI_SUCCESS send out the ATA command and device send required\r
  data successfully.\r
\r
  @retval EFI_DEVICE_ERROR command sent failed.\r
\r
**/\r
EFI_STATUS\r
AtaPioDataInExt (\r
  IN  IDE_BLK_IO_DEV  *IdeDev,\r
  IN  OUT VOID        *Buffer,\r
  IN  UINT32          ByteCount,\r
  IN  UINT8           AtaCommand,\r
  IN  EFI_LBA         StartLba,\r
  IN  UINT16          SectorCount\r
  )\r
{\r
  UINT8       DevSel;\r
  UINT8       SectorCount8;\r
  UINT8       LbaLow;\r
  UINT8       LbaMid;\r
  UINT8       LbaHigh;\r
  UINTN       WordCount;\r
  UINTN       Increment;\r
  UINT16      *Buffer16;\r
  EFI_STATUS  Status;\r
\r
  Status = WaitForBSYClear (IdeDev, ATATIMEOUT);\r
  if (EFI_ERROR (Status)) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  //\r
  // Select device, set bit6 as 1 to indicate LBA mode is used\r
  //\r
  DevSel = (UINT8) (IdeDev->Device << 4);\r
  DevSel |= 0x40;\r
  IDEWritePortB (\r
    IdeDev->PciIo,\r
    IdeDev->IoPort->Head,\r
    DevSel\r
    );\r
\r
  //\r
  // Wait for DRDY singnal asserting. ATAPI device needn't wait\r
  //\r
  if ( (IdeDev->Type == IdeHardDisk)  ||\r
        (IdeDev->Type == Ide48bitAddressingHardDisk)) {\r
\r
    Status = DRDYReady (IdeDev, ATATIMEOUT);\r
    if (EFI_ERROR (Status)) {\r
      return EFI_DEVICE_ERROR;\r
    }\r
  }\r
\r
  //\r
  // Fill feature register if needed\r
  //\r
  if (AtaCommand == SET_FEATURES_CMD) {\r
    IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, 0x03);\r
  }\r
\r
  //\r
  // Fill the sector count register, which is a two-byte FIFO. Need write twice.\r
  //\r
  SectorCount8 = (UINT8) (SectorCount >> 8);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);\r
\r
  SectorCount8 = (UINT8) SectorCount;\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);\r
\r
  //\r
  // Fill the start LBA registers, which are also two-byte FIFO\r
  //\r
  LbaLow  = (UINT8) RShiftU64 (StartLba, 24);\r
  LbaMid  = (UINT8) RShiftU64 (StartLba, 32);\r
  LbaHigh = (UINT8) RShiftU64 (StartLba, 40);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, LbaLow);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, LbaMid);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, LbaHigh);\r
\r
  LbaLow  = (UINT8) StartLba;\r
  LbaMid  = (UINT8) RShiftU64 (StartLba, 8);\r
  LbaHigh = (UINT8) RShiftU64 (StartLba, 16);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, LbaLow);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, LbaMid);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, LbaHigh);\r
\r
  //\r
  // Send command via Command Register, invoking the processing of this command\r
  //\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, AtaCommand);\r
\r
  Buffer16 = (UINT16 *) Buffer;\r
\r
  //\r
  // According to PIO data in protocol, host can perform a series of reads to\r
  // the data register after each time device set DRQ ready;\r
  //\r
\r
  //\r
  // 256 words\r
  //\r
  Increment = 256;\r
\r
  //\r
  // used to record bytes of currently transfered data\r
  //\r
  WordCount = 0;\r
\r
  while (WordCount < ByteCount / 2) {\r
    //\r
    // Poll DRQ bit set, data transfer can be performed only when DRQ is ready.\r
    //\r
    Status = DRQReady2 (IdeDev, ATATIMEOUT);\r
    if (EFI_ERROR (Status)) {\r
      return EFI_DEVICE_ERROR;\r
    }\r
\r
    Status = CheckErrorStatus (IdeDev);\r
    if (EFI_ERROR (Status)) {\r
      return EFI_DEVICE_ERROR;\r
    }\r
\r
    //\r
    // Get the byte count for one series of read\r
    //\r
    if ((WordCount + Increment) > ByteCount / 2) {\r
      Increment = ByteCount / 2 - WordCount;\r
    }\r
\r
    IDEReadPortWMultiple (\r
      IdeDev->PciIo,\r
      IdeDev->IoPort->Data,\r
      Increment,\r
      Buffer16\r
      );\r
\r
    WordCount += Increment;\r
    Buffer16 += Increment;\r
\r
  }\r
\r
  return CheckErrorStatus (IdeDev);\r
}\r
\r
/**\r
  This function is used to send out ATA commands conforms to the\r
  PIO Data Out Protocol, supporting ATA/ATAPI-6 standard\r
\r
  Comparing with ATA-3 data out protocol, we have two differents here:<BR>\r
  1. Do NOT wait for DRQ clear before sending command into IDE device.(the\r
  wait will frequently fail... cause writing function return error)\r
\r
  2. Do NOT wait for DRQ clear after all data readed.(the wait greatly\r
  slow down writing performance by 100 times!)\r
\r
  @param[in] *IdeDev\r
  pointer pointing to IDE_BLK_IO_DEV data structure, used\r
  to record all the information of the IDE device.\r
\r
  @param[in] *Buffer      buffer contained data transferred from host to device.\r
  @param[in] ByteCount    data size in byte unit of the buffer.\r
  @param[in] AtaCommand   value of the Command Register\r
  @param[in] StartLba     the start LBA of this transaction\r
  @param[in] SectorCount  the count of sectors to be transfered\r
\r
  @retval EFI_SUCCESS send out the ATA command and device receive required\r
  data successfully.\r
\r
  @retval EFI_DEVICE_ERROR command sent failed.\r
\r
**/\r
EFI_STATUS\r
AtaPioDataOutExt (\r
  IN  IDE_BLK_IO_DEV  *IdeDev,\r
  IN  VOID            *Buffer,\r
  IN  UINT32          ByteCount,\r
  IN  UINT8           AtaCommand,\r
  IN  EFI_LBA         StartLba,\r
  IN  UINT16          SectorCount\r
  )\r
{\r
  UINT8       DevSel;\r
  UINT8       SectorCount8;\r
  UINT8       LbaLow;\r
  UINT8       LbaMid;\r
  UINT8       LbaHigh;\r
  UINTN       WordCount;\r
  UINTN       Increment;\r
  UINT16      *Buffer16;\r
  EFI_STATUS  Status;\r
\r
  Status = WaitForBSYClear (IdeDev, ATATIMEOUT);\r
  if (EFI_ERROR (Status)) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  //\r
  // Select device. Set bit6 as 1 to indicate LBA mode is used\r
  //\r
  DevSel = (UINT8) (IdeDev->Device << 4);\r
  DevSel |= 0x40;\r
  IDEWritePortB (\r
    IdeDev->PciIo,\r
    IdeDev->IoPort->Head,\r
    DevSel\r
    );\r
\r
  //\r
  // Wait for DRDY singnal asserting.\r
  //\r
  Status = DRDYReady (IdeDev, ATATIMEOUT);\r
  if (EFI_ERROR (Status)) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  //\r
  // Fill feature register if needed\r
  //\r
  if (AtaCommand == SET_FEATURES_CMD) {\r
    IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, 0x03);\r
  }\r
\r
  //\r
  // Fill the sector count register, which is a two-byte FIFO. Need write twice.\r
  //\r
  SectorCount8 = (UINT8) (SectorCount >> 8);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);\r
\r
  SectorCount8 = (UINT8) SectorCount;\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);\r
\r
  //\r
  // Fill the start LBA registers, which are also two-byte FIFO\r
  //\r
  LbaLow  = (UINT8) RShiftU64 (StartLba, 24);\r
  LbaMid  = (UINT8) RShiftU64 (StartLba, 32);\r
  LbaHigh = (UINT8) RShiftU64 (StartLba, 40);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, LbaLow);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, LbaMid);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, LbaHigh);\r
\r
  LbaLow  = (UINT8) StartLba;\r
  LbaMid  = (UINT8) RShiftU64 (StartLba, 8);\r
  LbaHigh = (UINT8) RShiftU64 (StartLba, 16);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, LbaLow);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, LbaMid);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, LbaHigh);\r
\r
  //\r
  // Send command via Command Register, invoking the processing of this command\r
  //\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, AtaCommand);\r
\r
  Buffer16 = (UINT16 *) Buffer;\r
\r
  //\r
  // According to PIO Data Out protocol, host can perform a series of writes to\r
  // the data register after each time device set DRQ ready;\r
  //\r
  Increment = 256;\r
\r
  //\r
  // used to record bytes of currently transfered data\r
  //\r
  WordCount = 0;\r
\r
  while (WordCount < ByteCount / 2) {\r
    //\r
    // Poll DRQ bit set, data transfer can be performed only when DRQ is ready.\r
    //\r
    Status = DRQReady2 (IdeDev, ATATIMEOUT);\r
    if (EFI_ERROR (Status)) {\r
      return EFI_DEVICE_ERROR;\r
    }\r
\r
    Status = CheckErrorStatus (IdeDev);\r
    if (EFI_ERROR (Status)) {\r
      return EFI_DEVICE_ERROR;\r
    }\r
\r
    //\r
    // Write data into device by one series of writing to data register\r
    //\r
    if ((WordCount + Increment) > ByteCount / 2) {\r
      Increment = ByteCount / 2 - WordCount;\r
    }\r
\r
    IDEWritePortWMultiple (\r
      IdeDev->PciIo,\r
      IdeDev->IoPort->Data,\r
      Increment,\r
      Buffer16\r
      );\r
\r
    WordCount += Increment;\r
    Buffer16 += Increment;\r
\r
  }\r
  //\r
  // while\r
  //\r
\r
  return CheckErrorStatus (IdeDev);\r
}\r
\r
\r
/**\r
  Enable SMART of the disk if supported\r
\r
  @param[in] *IdeDev\r
  pointer pointing to IDE_BLK_IO_DEV data structure,used\r
  to record all the information of the IDE device.\r
\r
**/\r
VOID\r
AtaSMARTSupport (\r
  IN  IDE_BLK_IO_DEV  *IdeDev\r
  )\r
{\r
  EFI_STATUS        Status;\r
  BOOLEAN           SMARTSupported;\r
  UINT8             Device;\r
  EFI_IDENTIFY_DATA *TmpAtaIdentifyPointer;\r
  UINT8             DeviceSelect;\r
  UINT8             LBAMid;\r
  UINT8             LBAHigh;\r
\r
  //\r
  // Detect if the device supports S.M.A.R.T.\r
  //\r
  if ((IdeDev->pIdData->AtaData.command_set_supported_83 & 0xc000) != 0x4000) {\r
    //\r
    // Data in word 82 is not valid (bit15 shall be zero and bit14 shall be to one)\r
    //\r
    return ;\r
  } else {\r
    if ((IdeDev->pIdData->AtaData.command_set_supported_82 & 0x0001) != 0x0001) {\r
      //\r
      // S.M.A.R.T is not supported by the device\r
      //\r
      SMARTSupported = FALSE;\r
    } else {\r
      SMARTSupported = TRUE;\r
    }\r
  }\r
\r
  if (!SMARTSupported) {\r
    //\r
    // Report nonsupport status code\r
    //\r
    REPORT_STATUS_CODE (\r
      EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
      (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_NOTSUPPORTED)\r
      );\r
  } else {\r
    //\r
    // Enable this feature\r
    //\r
    REPORT_STATUS_CODE (\r
      EFI_PROGRESS_CODE,\r
      (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_ENABLE)\r
      );\r
\r
    Device = (UINT8) ((IdeDev->Device << 4) | 0xe0);\r
    Status = AtaNonDataCommandIn (\r
              IdeDev,\r
              ATA_SMART_CMD,\r
              Device,\r
              ATA_SMART_ENABLE_OPERATION,\r
              0,\r
              0,\r
              ATA_CONSTANT_4F,\r
              ATA_CONSTANT_C2\r
              );\r
    //\r
    // Detect if this feature is enabled\r
    //\r
    TmpAtaIdentifyPointer = (EFI_IDENTIFY_DATA *) AllocateZeroPool (sizeof (EFI_IDENTIFY_DATA));\r
\r
    DeviceSelect          = (UINT8) ((IdeDev->Device) << 4);\r
    Status = AtaPioDataIn (\r
              IdeDev,\r
              (VOID *) TmpAtaIdentifyPointer,\r
              sizeof (EFI_IDENTIFY_DATA),\r
              IDENTIFY_DRIVE_CMD,\r
              DeviceSelect,\r
              0,\r
              0,\r
              0,\r
              0\r
              );\r
    if (EFI_ERROR (Status)) {\r
      gBS->FreePool (TmpAtaIdentifyPointer);\r
      return ;\r
    }\r
\r
    //\r
    // Check if the feature is enabled\r
    //\r
    if ((TmpAtaIdentifyPointer->AtaData.command_set_feature_enb_85 & 0x0001) == 0x0001) {\r
      //\r
      // Read status data\r
      //\r
      AtaNonDataCommandIn (\r
        IdeDev,\r
        ATA_SMART_CMD,\r
        Device,\r
        ATA_SMART_RETURN_STATUS,\r
        0,\r
        0,\r
        ATA_CONSTANT_4F,\r
        ATA_CONSTANT_C2\r
        );\r
      LBAMid  = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb);\r
      LBAHigh = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb);\r
\r
      if ((LBAMid == 0x4f) && (LBAHigh == 0xc2)) {\r
        //\r
        // The threshold exceeded condition is not detected by the device\r
        //\r
        REPORT_STATUS_CODE (\r
              EFI_PROGRESS_CODE,\r
              (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_UNDERTHRESHOLD)\r
              );\r
\r
      } else if ((LBAMid == 0xf4) && (LBAHigh == 0x2c)) {\r
        //\r
        // The threshold exceeded condition is  detected by the device\r
        //\r
        REPORT_STATUS_CODE (\r
              EFI_PROGRESS_CODE,\r
              (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD)\r
              );\r
      }\r
\r
    } else {\r
      //\r
      // Report disabled status code\r
      //\r
      REPORT_STATUS_CODE (\r
            EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
            (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_DISABLED)\r
            );\r
    }\r
\r
    gBS->FreePool (TmpAtaIdentifyPointer);\r
  }\r
\r
  return ;\r
}\r
\r
/**\r
  Send ATA Ext command into device with NON_DATA protocol\r
\r
  @param  IdeDev Standard IDE device private data structure\r
  @param  AtaCommand The ATA command to be sent\r
  @param  Device The value in Device register\r
  @param  Feature The value in Feature register\r
  @param  SectorCount The value in SectorCount register\r
  @param  LbaAddress The LBA address in 48-bit mode\r
\r
  @retval  EFI_SUCCESS Reading succeed\r
  @retval  EFI_DEVICE_ERROR Error executing commands on this device\r
\r
**/\r
EFI_STATUS\r
AtaCommandIssueExt (\r
  IN  IDE_BLK_IO_DEV  *IdeDev,\r
  IN  UINT8           AtaCommand,\r
  IN  UINT8           Device,\r
  IN  UINT16          Feature,\r
  IN  UINT16          SectorCount,\r
  IN  EFI_LBA         LbaAddress\r
  )\r
{\r
  EFI_STATUS  Status;\r
  UINT8       SectorCount8;\r
  UINT8       Feature8;\r
  UINT8       LbaLow;\r
  UINT8       LbaMid;\r
  UINT8       LbaHigh;\r
\r
  Status = WaitForBSYClear (IdeDev, ATATIMEOUT);\r
  if (EFI_ERROR (Status)) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  //\r
  // Select device (bit4), set LBA mode(bit6) (use 0xe0 for compatibility)\r
  //\r
  IDEWritePortB (\r
    IdeDev->PciIo,\r
    IdeDev->IoPort->Head,\r
    (UINT8) ((IdeDev->Device << 4) | 0xe0)\r
    );\r
\r
  //\r
  // ATA commands for ATA device must be issued when DRDY is set\r
  //\r
  Status = DRDYReady (IdeDev, ATATIMEOUT);\r
  if (EFI_ERROR (Status)) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  //\r
  // Pass parameter into device register block\r
  //\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Head, Device);\r
\r
  //\r
  // Fill the feature register, which is a two-byte FIFO. Need write twice.\r
  //\r
  Feature8 = (UINT8) (Feature >> 8);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, Feature8);\r
\r
  Feature8 = (UINT8) Feature;\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, Feature8);\r
\r
  //\r
  // Fill the sector count register, which is a two-byte FIFO. Need write twice.\r
  //\r
  SectorCount8 = (UINT8) (SectorCount >> 8);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);\r
\r
  SectorCount8 = (UINT8) SectorCount;\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);\r
\r
  //\r
  // Fill the start LBA registers, which are also two-byte FIFO\r
  //\r
  LbaLow = (UINT8) RShiftU64 (LbaAddress, 24);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, LbaLow);\r
  LbaLow = (UINT8) LbaAddress;\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, LbaLow);\r
\r
  LbaMid = (UINT8) RShiftU64 (LbaAddress, 32);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, LbaMid);\r
  LbaMid = (UINT8) RShiftU64 (LbaAddress, 8);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, LbaMid);\r
\r
  LbaHigh = (UINT8) RShiftU64 (LbaAddress, 40);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, LbaHigh);\r
  LbaHigh = (UINT8) RShiftU64 (LbaAddress, 16);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, LbaHigh);\r
\r
  //\r
  // Work around for Segate 160G disk writing\r
  //\r
  gBS->Stall (1800);\r
\r
  //\r
  // Send command via Command Register\r
  //\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, AtaCommand);\r
\r
  //\r
  // Stall at least 400ns\r
  //\r
  gBS->Stall (100);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Send ATA Ext command into device with NON_DATA protocol\r
\r
  @param  IdeDev Standard IDE device private data structure\r
  @param  AtaCommand The ATA command to be sent\r
  @param  Device The value in Device register\r
  @param  Feature The value in Feature register\r
  @param  SectorCount The value in SectorCount register\r
  @param  LbaAddress The LBA address in 48-bit mode\r
\r
  @retval  EFI_SUCCESS Reading succeed\r
  @retval  EFI_DEVICE_ERROR Error executing commands on this device\r
\r
**/\r
EFI_STATUS\r
AtaCommandIssue (\r
  IN  IDE_BLK_IO_DEV  *IdeDev,\r
  IN  UINT8           AtaCommand,\r
  IN  UINT8           Device,\r
  IN  UINT16          Feature,\r
  IN  UINT16          SectorCount,\r
  IN  EFI_LBA         LbaAddress\r
  )\r
{\r
  EFI_STATUS  Status;\r
  UINT8       SectorCount8;\r
  UINT8       Feature8;\r
  UINT8       Lba0;\r
  UINT8       Lba1;\r
  UINT8       Lba2;\r
  UINT8       Lba3;\r
\r
  Status = WaitForBSYClear (IdeDev, ATATIMEOUT);\r
  if (EFI_ERROR (Status)) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  //\r
  // Select device (bit4), set LBA mode(bit6) (use 0xe0 for compatibility)\r
  //\r
  IDEWritePortB (\r
    IdeDev->PciIo,\r
    IdeDev->IoPort->Head,\r
    (UINT8) ((IdeDev->Device << 4) | 0xe0)\r
    );\r
\r
  //\r
  // ATA commands for ATA device must be issued when DRDY is set\r
  //\r
  Status = DRDYReady (IdeDev, ATATIMEOUT);\r
  if (EFI_ERROR (Status)) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  Lba0  = (UINT8) LbaAddress;\r
  Lba1  = (UINT8) RShiftU64 (LbaAddress, 8);\r
  Lba2  = (UINT8) RShiftU64 (LbaAddress, 16);\r
  Lba3  = (UINT8) RShiftU64 (LbaAddress, 24);\r
  Device |= Lba3;\r
\r
  //\r
  // Pass parameter into device register block\r
  //\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Head, Device);\r
\r
  //\r
  // Fill the feature register, which is a two-byte FIFO. Need write twice.\r
  //\r
  Feature8 = (UINT8) Feature;\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, Feature8);\r
\r
  //\r
  // Fill the sector count register, which is a two-byte FIFO. Need write twice.\r
  //\r
  SectorCount8 = (UINT8) SectorCount;\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);\r
\r
  //\r
  // Fill the start LBA registers, which are also two-byte FIFO\r
  //\r
\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, Lba0);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, Lba1);\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, Lba2);\r
\r
  //\r
  // Send command via Command Register\r
  //\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, AtaCommand);\r
\r
  //\r
  // Stall at least 400ns\r
  //\r
  gBS->Stall (100);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  This function is called by the AtaBlkIoReadBlocks() to perform\r
  reading from media in block unit. The function has been enhanced to\r
  support >120GB access and transfer at most 65536 blocks per command\r
\r
  @param[in] *IdeDev pointer pointing to IDE_BLK_IO_DEV data structure, used\r
  to record all the information of the IDE device.\r
\r
  @param[in] *DataBuffer A pointer to the destination buffer for the data.\r
\r
  @param[in] StartLba The starting logical block address to read from\r
  on the device media.\r
\r
  @param[in] NumberOfBlocks The number of transfer data blocks.\r
\r
  @return The device status of UDMA operation. If the operation is\r
  successful, return EFI_SUCCESS.\r
\r
  TODO:    EFI_UNSUPPORTED - add return value to function comment\r
  TODO:    EFI_DEVICE_ERROR - add return value to function comment\r
  TODO:    EFI_DEVICE_ERROR - add return value to function comment\r
  TODO:    EFI_DEVICE_ERROR - add return value to function comment\r
**/\r
EFI_STATUS\r
AtaUdmaReadExt (\r
  IN  IDE_BLK_IO_DEV  *IdeDev,\r
  IN  VOID            *DataBuffer,\r
  IN  EFI_LBA         StartLba,\r
  IN  UINTN           NumberOfBlocks\r
  )\r
{\r
  IDE_DMA_PRD                *PrdAddr;\r
  IDE_DMA_PRD                *UsedPrdAddr;\r
  IDE_DMA_PRD                *TempPrdAddr;\r
  UINT8                      RegisterValue;\r
  UINT8                      Device;\r
  UINT64                     IoPortForBmic;\r
  UINT64                     IoPortForBmis;\r
  UINT64                     IoPortForBmid;\r
  EFI_STATUS                 Status;\r
  UINTN                      PrdTableNum;\r
  UINTN                      ByteCount;\r
  UINTN                      ByteAvailable;\r
  UINT8                      *PrdBuffer;\r
  UINTN                      RemainBlockNum;\r
  UINT8                      DeviceControl;\r
  UINT32                     Count;\r
  UINTN                      PageCount;\r
  VOID                       *Map;\r
  VOID                       *MemPage;\r
  EFI_PHYSICAL_ADDRESS       DeviceAddress;\r
\r
  //\r
  // Channel and device differential. Select device.\r
  //\r
  Device = (UINT8) ((IdeDev->Device << 4) | 0xe0);\r
\r
  //\r
  // Enable interrupt to support UDMA and Select device\r
  //\r
  DeviceControl = 0;\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);\r
\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Head, Device);\r
\r
  if (IdePrimary == IdeDev->Channel) {\r
    IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICP_OFFSET;\r
    IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISP_OFFSET;\r
    IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDP_OFFSET;\r
  } else {\r
    if (IdeSecondary == IdeDev->Channel) {\r
      IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICS_OFFSET;\r
      IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISS_OFFSET;\r
      IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDS_OFFSET;\r
    } else {\r
      return EFI_UNSUPPORTED;\r
    }\r
  }\r
\r
  RemainBlockNum = NumberOfBlocks;\r
  while (RemainBlockNum > 0) {\r
\r
    if (RemainBlockNum >= MAX_DMA_EXT_COMMAND_SECTORS) {\r
      //\r
      //  SectorCount is used to record the number of sectors to be read\r
      //  Max 65536 sectors can be transfered at a time.\r
      //\r
      NumberOfBlocks = MAX_DMA_EXT_COMMAND_SECTORS;\r
      RemainBlockNum -= MAX_DMA_EXT_COMMAND_SECTORS;\r
    } else {\r
      NumberOfBlocks  = (UINT16) RemainBlockNum;\r
      RemainBlockNum  = 0;\r
    }\r
\r
    //\r
    // Calculate the number of PRD table to make sure the memory region\r
    // not cross 64K boundary\r
    //\r
    ByteCount   = NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;\r
    PrdTableNum = ((ByteCount >> 16) + 1) + 1;\r
\r
    //\r
    // Build PRD table\r
    //\r
    PageCount = EFI_SIZE_TO_PAGES (2 * PrdTableNum * sizeof (IDE_DMA_PRD));\r
    Status = IdeDev->PciIo->AllocateBuffer (\r
                       IdeDev->PciIo,\r
                       AllocateAnyPages,\r
                       EfiBootServicesData,\r
                       PageCount,\r
                       &MemPage,\r
                       0\r
                       );\r
    if (EFI_ERROR (Status)) {\r
      return EFI_OUT_OF_RESOURCES;\r
    }\r
    ZeroMem ((VOID *) ((UINTN) MemPage), EFI_PAGES_TO_SIZE (PageCount));\r
\r
    PrdAddr = (IDE_DMA_PRD *) ((UINTN) MemPage);\r
\r
    //\r
    // To make sure PRD is allocated in one 64K page\r
    //\r
    if (((UINTN) PrdAddr & 0x0FFFF) > (((UINTN) PrdAddr + PrdTableNum * sizeof (IDE_DMA_PRD) - 1) & 0x0FFFF)) {\r
      UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x10000) & 0xFFFF0000);\r
    } else {\r
      if ((UINTN) PrdAddr & 0x03) {\r
        UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x04) & 0xFFFFFFFC);\r
      } else {\r
        UsedPrdAddr = PrdAddr;\r
      }\r
    }\r
\r
    //\r
    // Build the PRD table\r
    //\r
    Status = IdeDev->PciIo->Map (\r
                       IdeDev->PciIo,\r
                       EfiPciIoOperationBusMasterWrite,\r
                       DataBuffer,\r
                       &ByteCount,\r
                       &DeviceAddress,\r
                       &Map\r
                       );\r
    if (EFI_ERROR (Status)) {\r
      IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);\r
      return EFI_OUT_OF_RESOURCES;\r
    }\r
    PrdBuffer   = (VOID *) ((UINTN) DeviceAddress);\r
    TempPrdAddr = UsedPrdAddr;\r
    while (TRUE) {\r
\r
      ByteAvailable = 0x10000 - ((UINTN) PrdBuffer & 0xFFFF);\r
\r
      if (ByteCount <= ByteAvailable) {\r
        TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);\r
        TempPrdAddr->ByteCount      = (UINT16) ByteCount;\r
        TempPrdAddr->EndOfTable     = 0x8000;\r
        break;\r
      }\r
\r
      TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);\r
      TempPrdAddr->ByteCount      = (UINT16) ByteAvailable;\r
\r
      ByteCount -= ByteAvailable;\r
      PrdBuffer += ByteAvailable;\r
      TempPrdAddr++;\r
    }\r
\r
    //\r
    // Set the base address to BMID register\r
    //\r
    IdeDev->PciIo->Io.Write (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint32,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmid,\r
                        1,\r
                        &UsedPrdAddr\r
                        );\r
\r
    //\r
    // Set BMIC register to identify the operation direction\r
    //\r
    IdeDev->PciIo->Io.Read (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    RegisterValue |= BMIC_nREAD;\r
\r
    IdeDev->PciIo->Io.Write (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    //\r
    // Read BMIS register and clear ERROR and INTR bit\r
    //\r
    IdeDev->PciIo->Io.Read (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmis,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    RegisterValue |= BMIS_INTERRUPT | BMIS_ERROR;\r
\r
    IdeDev->PciIo->Io.Write (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmis,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    //\r
    // Issue READ DMA EXT command\r
    //\r
    Status = AtaCommandIssueExt (\r
               IdeDev,\r
               READ_DMA_EXT_CMD,\r
               Device,\r
               0,\r
               (UINT16) NumberOfBlocks,\r
               StartLba\r
               );\r
    if (EFI_ERROR (Status)) {\r
      IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);\r
      IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);\r
      return EFI_DEVICE_ERROR;\r
    }\r
\r
    //\r
    // Set START bit of BMIC register\r
    //\r
    IdeDev->PciIo->Io.Read (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    RegisterValue |= BMIC_START;\r
\r
    IdeDev->PciIo->Io.Write (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    //\r
    // Check the INTERRUPT and ERROR bit of BMIS\r
    // Max transfer number of sectors for one command is 65536(32Mbyte),\r
    // it will cost 1 second to transfer these data in UDMA mode 2(33.3MBps).\r
    // So set the variable Count to 2000, for about 2 second timeout time.\r
    //\r
    Count = 2000;\r
    while (TRUE) {\r
\r
      IdeDev->PciIo->Io.Read (\r
                          IdeDev->PciIo,\r
                          EfiPciIoWidthUint8,\r
                          EFI_PCI_IO_PASS_THROUGH_BAR,\r
                          IoPortForBmis,\r
                          1,\r
                          &RegisterValue\r
                          );\r
      if ((RegisterValue & (BMIS_INTERRUPT | BMIS_ERROR)) || (Count == 0)) {\r
        if ((RegisterValue & BMIS_ERROR) || (Count == 0)) {\r
          //\r
          // Clear START bit of BMIC register before return EFI_DEVICE_ERROR\r
          //\r
          IdeDev->PciIo->Io.Read (\r
                              IdeDev->PciIo,\r
                              EfiPciIoWidthUint8,\r
                              EFI_PCI_IO_PASS_THROUGH_BAR,\r
                              IoPortForBmic,\r
                              1,\r
                              &RegisterValue\r
                              );\r
\r
          RegisterValue &= ~((UINT8)BMIC_START);\r
\r
          IdeDev->PciIo->Io.Write (\r
                              IdeDev->PciIo,\r
                              EfiPciIoWidthUint8,\r
                              EFI_PCI_IO_PASS_THROUGH_BAR,\r
                              IoPortForBmic,\r
                              1,\r
                              &RegisterValue\r
                              );\r
          IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);\r
          IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);\r
          return EFI_DEVICE_ERROR;\r
        }\r
        break;\r
      }\r
\r
      gBS->Stall (1000);\r
      Count --;\r
    }\r
\r
    IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);\r
    IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);\r
    //\r
    // Read Status Register of IDE device to clear interrupt\r
    //\r
    RegisterValue = IDEReadPortB(IdeDev->PciIo,IdeDev->IoPort->Reg.Status);\r
    //\r
    // Clear START bit of BMIC register\r
    //\r
    IdeDev->PciIo->Io.Read (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    RegisterValue &= ~((UINT8) BMIC_START);\r
\r
    IdeDev->PciIo->Io.Write (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    if (RegisterValue & BMIS_ERROR) {\r
      return EFI_DEVICE_ERROR;\r
    }\r
\r
    DataBuffer = (UINT8 *) DataBuffer + NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;\r
    StartLba += NumberOfBlocks;\r
  }\r
\r
  //\r
  // Disable interrupt of Select device\r
  //\r
  IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl);\r
  DeviceControl |= IEN_L;\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  This function is called by the AtaBlkIoReadBlocks() to perform\r
  reading from media in block unit. The function has been enhanced to\r
  support >120GB access and transfer at most 65536 blocks per command\r
\r
  @param[in] *IdeDev\r
  pointer pointing to IDE_BLK_IO_DEV data structure, used\r
  to record all the information of the IDE device.\r
\r
  @param[in] *DataBuffer    A pointer to the destination buffer for the data.\r
  @param[in] StartLba       The starting logical block address to read from\r
  on the device media.\r
  @param[in] NumberOfBlocks The number of transfer data blocks.\r
\r
  @return The device status of UDMA operation. If the operation is\r
  successful, return EFI_SUCCESS.\r
\r
  TODO:    EFI_UNSUPPORTED - add return value to function comment\r
  TODO:    EFI_DEVICE_ERROR - add return value to function comment\r
  TODO:    EFI_DEVICE_ERROR - add return value to function comment\r
  TODO:    EFI_DEVICE_ERROR - add return value to function comment\r
**/\r
EFI_STATUS\r
AtaUdmaRead (\r
  IN  IDE_BLK_IO_DEV  *IdeDev,\r
  IN  VOID            *DataBuffer,\r
  IN  EFI_LBA         StartLba,\r
  IN  UINTN           NumberOfBlocks\r
  )\r
{\r
  IDE_DMA_PRD                *PrdAddr;\r
  IDE_DMA_PRD                *UsedPrdAddr;\r
  IDE_DMA_PRD                *TempPrdAddr;\r
  UINT8                      RegisterValue;\r
  UINT8                      Device;\r
  UINT64                     IoPortForBmic;\r
  UINT64                     IoPortForBmis;\r
  UINT64                     IoPortForBmid;\r
  EFI_STATUS                 Status;\r
  UINTN                      PrdTableNum;\r
  UINTN                      ByteCount;\r
  UINTN                      ByteAvailable;\r
  UINT8                      *PrdBuffer;\r
  UINTN                      RemainBlockNum;\r
  UINT8                      DeviceControl;\r
  UINT32                     Count;\r
  UINTN                      PageCount;\r
  VOID                       *Map;\r
  VOID                       *MemPage;\r
  EFI_PHYSICAL_ADDRESS       DeviceAddress;\r
\r
  //\r
  // Channel and device differential\r
  //\r
  Device = (UINT8) ((IdeDev->Device << 4) | 0xe0);\r
\r
  //\r
  // Enable interrupt to support UDMA and Select device\r
  //\r
  DeviceControl = 0;\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);\r
\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Head, Device);\r
\r
  if (IdePrimary == IdeDev->Channel) {\r
    IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICP_OFFSET;\r
    IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISP_OFFSET;\r
    IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDP_OFFSET;\r
  } else {\r
    if (IdeSecondary == IdeDev->Channel) {\r
      IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICS_OFFSET;\r
      IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISS_OFFSET;\r
      IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDS_OFFSET;\r
    } else {\r
      return EFI_UNSUPPORTED;\r
    }\r
  }\r
\r
  RemainBlockNum = NumberOfBlocks;\r
  while (RemainBlockNum > 0) {\r
\r
    if (RemainBlockNum >= MAX_DMA_COMMAND_SECTORS) {\r
      //\r
      //  SectorCount is used to record the number of sectors to be read\r
      //  Max 256 sectors can be transfered at a time.\r
      //\r
      NumberOfBlocks = MAX_DMA_COMMAND_SECTORS;\r
      RemainBlockNum -= MAX_DMA_COMMAND_SECTORS;\r
    } else {\r
      NumberOfBlocks  = (UINT16) RemainBlockNum;\r
      RemainBlockNum  = 0;\r
    }\r
\r
    //\r
    // Calculate the number of PRD table to make sure the memory region\r
    // not cross 64K boundary\r
    //\r
    ByteCount   = NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;\r
    PrdTableNum = ((ByteCount >> 16) + 1) + 1;\r
\r
    //\r
    // Build PRD table\r
    //\r
    PageCount = EFI_SIZE_TO_PAGES (2 * PrdTableNum * sizeof (IDE_DMA_PRD));\r
    Status = IdeDev->PciIo->AllocateBuffer (\r
                       IdeDev->PciIo,\r
                       AllocateAnyPages,\r
                       EfiBootServicesData,\r
                       PageCount,\r
                       &MemPage,\r
                       0\r
                       );\r
    if (EFI_ERROR (Status)) {\r
      return EFI_OUT_OF_RESOURCES;\r
    }\r
    ZeroMem ((VOID *) ((UINTN) MemPage), EFI_PAGES_TO_SIZE (PageCount));\r
\r
    PrdAddr = (IDE_DMA_PRD *) ((UINTN) MemPage);\r
    //\r
    // To make sure PRD is allocated in one 64K page\r
    //\r
    if (((UINTN) PrdAddr & 0x0FFFF) > (((UINTN) PrdAddr + PrdTableNum * sizeof (IDE_DMA_PRD) - 1) & 0x0FFFF)) {\r
      UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x10000) & 0xFFFF0000);\r
    } else {\r
      if ((UINTN) PrdAddr & 0x03) {\r
        UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x04) & 0xFFFFFFFC);\r
      } else {\r
        UsedPrdAddr = PrdAddr;\r
      }\r
    }\r
\r
    //\r
    // Build the PRD table\r
    //\r
    Status = IdeDev->PciIo->Map (\r
                       IdeDev->PciIo,\r
                       EfiPciIoOperationBusMasterWrite,\r
                       DataBuffer,\r
                       &ByteCount,\r
                       &DeviceAddress,\r
                       &Map\r
                       );\r
    if (EFI_ERROR (Status)) {\r
      IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);\r
      return EFI_OUT_OF_RESOURCES;\r
    }\r
    PrdBuffer   = (UINT8 *) ((UINTN) DeviceAddress);\r
    TempPrdAddr = UsedPrdAddr;\r
    while (TRUE) {\r
\r
      ByteAvailable = 0x10000 - ((UINTN) PrdBuffer & 0xFFFF);\r
\r
      if (ByteCount <= ByteAvailable) {\r
        TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);\r
        TempPrdAddr->ByteCount      = (UINT16) ByteCount;\r
        TempPrdAddr->EndOfTable     = 0x8000;\r
        break;\r
      }\r
\r
      TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);\r
      TempPrdAddr->ByteCount      = (UINT16) ByteAvailable;\r
\r
      ByteCount -= ByteAvailable;\r
      PrdBuffer += ByteAvailable;\r
      TempPrdAddr++;\r
    }\r
\r
    //\r
    // Set the base address to BMID register\r
    //\r
    IdeDev->PciIo->Io.Write (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint32,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmid,\r
                        1,\r
                        &UsedPrdAddr\r
                        );\r
\r
    //\r
    // Set BMIC register to identify the operation direction\r
    //\r
    IdeDev->PciIo->Io.Read (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    RegisterValue |= BMIC_nREAD;\r
\r
    IdeDev->PciIo->Io.Write (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    //\r
    // Read BMIS register and clear ERROR and INTR bit\r
    //\r
    IdeDev->PciIo->Io.Read (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmis,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    RegisterValue |= (BMIS_INTERRUPT | BMIS_ERROR);\r
\r
    IdeDev->PciIo->Io.Write (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmis,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    //\r
    // Issue READ DMA command\r
    //\r
    Status = AtaCommandIssue (\r
               IdeDev,\r
               READ_DMA_CMD,\r
               Device,\r
               0,\r
               (UINT16) NumberOfBlocks,\r
               StartLba\r
               );\r
    if (EFI_ERROR (Status)) {\r
      IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);\r
      IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);\r
      return EFI_DEVICE_ERROR;\r
    }\r
\r
    //\r
    // Set START bit of BMIC register\r
    //\r
    IdeDev->PciIo->Io.Read (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    RegisterValue |= BMIC_START;\r
\r
    IdeDev->PciIo->Io.Write (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    //\r
    // Check the INTERRUPT and ERROR bit of BMIS\r
    // Max transfer number of sectors for one command is 65536(32Mbyte),\r
    // it will cost 1 second to transfer these data in UDMA mode 2(33.3MBps).\r
    // So set the variable Count to 2000, for about 2 second timeout time.\r
    //\r
    Count = 2000;\r
    while (TRUE) {\r
\r
      IdeDev->PciIo->Io.Read (\r
                          IdeDev->PciIo,\r
                          EfiPciIoWidthUint8,\r
                          EFI_PCI_IO_PASS_THROUGH_BAR,\r
                          IoPortForBmis,\r
                          1,\r
                          &RegisterValue\r
                          );\r
      if ((RegisterValue & (BMIS_INTERRUPT | BMIS_ERROR)) || (Count == 0)) {\r
        if ((RegisterValue & BMIS_ERROR) || (Count == 0)) {\r
          //\r
          // Clear START bit of BMIC register before return EFI_DEVICE_ERROR\r
          //\r
          IdeDev->PciIo->Io.Read (\r
                              IdeDev->PciIo,\r
                              EfiPciIoWidthUint8,\r
                              EFI_PCI_IO_PASS_THROUGH_BAR,\r
                              IoPortForBmic,\r
                              1,\r
                              &RegisterValue\r
                              );\r
\r
          RegisterValue &= ~((UINT8)BMIC_START);\r
\r
          IdeDev->PciIo->Io.Write (\r
                              IdeDev->PciIo,\r
                              EfiPciIoWidthUint8,\r
                              EFI_PCI_IO_PASS_THROUGH_BAR,\r
                              IoPortForBmic,\r
                              1,\r
                              &RegisterValue\r
                              );\r
          IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);\r
          IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);\r
          return EFI_DEVICE_ERROR;\r
        }\r
        break;\r
      }\r
\r
      gBS->Stall (1000);\r
      Count --;\r
    }\r
\r
    IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);\r
    IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);\r
    //\r
    // Read Status Register of IDE device to clear interrupt\r
    //\r
    RegisterValue = IDEReadPortB(IdeDev->PciIo,IdeDev->IoPort->Reg.Status);\r
    //\r
    // Clear START bit of BMIC register\r
    //\r
    IdeDev->PciIo->Io.Read (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    RegisterValue &= ~((UINT8) BMIC_START);\r
\r
    IdeDev->PciIo->Io.Write (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    if (RegisterValue & BMIS_ERROR) {\r
      return EFI_DEVICE_ERROR;\r
    }\r
\r
    DataBuffer = (UINT8 *) DataBuffer + NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;\r
    StartLba += NumberOfBlocks;\r
  }\r
\r
  //\r
  // Disable interrupt of Select device\r
  //\r
  IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl);\r
  DeviceControl |= IEN_L;\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  This function is called by the AtaBlkIoWriteBlocks() to perform\r
  writing to media in block unit. The function has been enhanced to\r
  support >120GB access and transfer at most 65536 blocks per command\r
\r
  @param[in] *IdeDev pointer pointing to IDE_BLK_IO_DEV data structure, used\r
  to record all the information of the IDE device.\r
\r
  @param[in] *DataBuffer A pointer to the source buffer for the data.\r
\r
  @param[in] StartLba The starting logical block address to write to\r
  on the device media.\r
\r
  @param[in] NumberOfBlocks The number of transfer data blocks.\r
\r
  @return The device status of UDMA operation. If the operation is\r
  successful, return EFI_SUCCESS.\r
\r
  TODO:    EFI_UNSUPPORTED - add return value to function comment\r
  TODO:    EFI_DEVICE_ERROR - add return value to function comment\r
  TODO:    EFI_DEVICE_ERROR - add return value to function comment\r
**/\r
EFI_STATUS\r
AtaUdmaWriteExt (\r
  IN  IDE_BLK_IO_DEV  *IdeDev,\r
  IN  VOID            *DataBuffer,\r
  IN  EFI_LBA         StartLba,\r
  IN  UINTN           NumberOfBlocks\r
  )\r
{\r
  IDE_DMA_PRD                *PrdAddr;\r
  IDE_DMA_PRD                *UsedPrdAddr;\r
  IDE_DMA_PRD                *TempPrdAddr;\r
  UINT8                      RegisterValue;\r
  UINT8                      Device;\r
  UINT64                     IoPortForBmic;\r
  UINT64                     IoPortForBmis;\r
  UINT64                     IoPortForBmid;\r
  EFI_STATUS                 Status;\r
  UINTN                      PrdTableNum;\r
  UINTN                      ByteCount;\r
  UINTN                      ByteAvailable;\r
  UINT8                      *PrdBuffer;\r
  UINTN                      RemainBlockNum;\r
  UINT8                      DeviceControl;\r
  UINT32                     Count;\r
  UINTN                      PageCount;\r
  VOID                       *Map;\r
  VOID                       *MemPage;\r
  EFI_PHYSICAL_ADDRESS       DeviceAddress;\r
\r
  //\r
  // Channel and device differential\r
  //\r
  Device = (UINT8) ((IdeDev->Device << 4) | 0xe0);\r
\r
  //\r
  // Enable interrupt to support UDMA and Select device\r
  //\r
  DeviceControl = 0;\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);\r
\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Head, Device);\r
\r
  if (IdePrimary == IdeDev->Channel) {\r
    IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICP_OFFSET;\r
    IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISP_OFFSET;\r
    IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDP_OFFSET;\r
  } else {\r
    if (IdeSecondary == IdeDev->Channel) {\r
      IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICS_OFFSET;\r
      IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISS_OFFSET;\r
      IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDS_OFFSET;\r
    } else {\r
      return EFI_UNSUPPORTED;\r
    }\r
  }\r
\r
  RemainBlockNum = NumberOfBlocks;\r
  while (RemainBlockNum > 0) {\r
\r
    if (RemainBlockNum >= MAX_DMA_EXT_COMMAND_SECTORS) {\r
      //\r
      //  SectorCount is used to record the number of sectors to be read\r
      //  Max 65536 sectors can be transfered at a time.\r
      //\r
      NumberOfBlocks = MAX_DMA_EXT_COMMAND_SECTORS;\r
      RemainBlockNum -= MAX_DMA_EXT_COMMAND_SECTORS;\r
    } else {\r
      NumberOfBlocks  = (UINT16) RemainBlockNum;\r
      RemainBlockNum  = 0;\r
    }\r
\r
    //\r
    // Calculate the number of PRD table to make sure the memory region\r
    // not cross 64K boundary\r
    //\r
    ByteCount   = NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;\r
    PrdTableNum = ((ByteCount >> 16) + 1) + 1;\r
\r
    //\r
    // Build PRD table\r
    //\r
    PageCount = EFI_SIZE_TO_PAGES (2 * PrdTableNum * sizeof (IDE_DMA_PRD));\r
    Status = IdeDev->PciIo->AllocateBuffer (\r
                       IdeDev->PciIo,\r
                       AllocateAnyPages,\r
                       EfiBootServicesData,\r
                       PageCount,\r
                       &MemPage,\r
                       0\r
                       );\r
    if (EFI_ERROR (Status)) {\r
      return EFI_OUT_OF_RESOURCES;\r
    }\r
    ZeroMem ((VOID *) ((UINTN) MemPage), EFI_PAGES_TO_SIZE (PageCount));\r
\r
    PrdAddr = (IDE_DMA_PRD *) ((UINTN) MemPage);\r
    //\r
    // To make sure PRD is allocated in one 64K page\r
    //\r
    if (((UINTN) PrdAddr & 0x0FFFF) > (((UINTN) PrdAddr + PrdTableNum * sizeof (IDE_DMA_PRD) - 1) & 0x0FFFF)) {\r
      UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x10000) & 0xFFFF0000);\r
    } else {\r
      if ((UINTN) PrdAddr & 0x03) {\r
        UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x04) & 0xFFFFFFFC);\r
      } else {\r
        UsedPrdAddr = PrdAddr;\r
      }\r
    }\r
\r
    //\r
    // Build the PRD table\r
    //\r
    Status = IdeDev->PciIo->Map (\r
                       IdeDev->PciIo,\r
                       EfiPciIoOperationBusMasterRead,\r
                       DataBuffer,\r
                       &ByteCount,\r
                       &DeviceAddress,\r
                       &Map\r
                       );\r
    if (EFI_ERROR (Status)) {\r
      IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);\r
      return EFI_OUT_OF_RESOURCES;\r
    }\r
    PrdBuffer   = (UINT8 *) ((UINTN) DeviceAddress);\r
    TempPrdAddr = UsedPrdAddr;\r
    while (TRUE) {\r
\r
      ByteAvailable = 0x10000 - ((UINTN) PrdBuffer & 0xFFFF);\r
\r
      if (ByteCount <= ByteAvailable) {\r
        TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);\r
        TempPrdAddr->ByteCount      = (UINT16) ByteCount;\r
        TempPrdAddr->EndOfTable     = 0x8000;\r
        break;\r
      }\r
\r
      TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);\r
      TempPrdAddr->ByteCount      = (UINT16) ByteAvailable;\r
\r
      ByteCount -= ByteAvailable;\r
      PrdBuffer += ByteAvailable;\r
      TempPrdAddr++;\r
    }\r
\r
    //\r
    // Set the base address to BMID register\r
    //\r
    IdeDev->PciIo->Io.Write (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint32,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmid,\r
                        1,\r
                        &UsedPrdAddr\r
                        );\r
\r
    //\r
    // Set BMIC register to identify the operation direction\r
    //\r
    IdeDev->PciIo->Io.Read (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
    //\r
    // 0000 1000\r
    //\r
    RegisterValue &= ~((UINT8) BMIC_nREAD);\r
\r
    IdeDev->PciIo->Io.Write (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    //\r
    // Read BMIS register and clear ERROR and INTR bit\r
    //\r
    IdeDev->PciIo->Io.Read (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmis,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    RegisterValue |= (BMIS_INTERRUPT | BMIS_ERROR);\r
\r
    IdeDev->PciIo->Io.Write (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmis,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    //\r
    // Issue WRITE DMA EXT command\r
    //\r
    Status = AtaCommandIssueExt (\r
               IdeDev,\r
               WRITE_DMA_EXT_CMD,\r
               Device,\r
               0,\r
               (UINT16) NumberOfBlocks,\r
               StartLba\r
               );\r
    if (EFI_ERROR (Status)) {\r
      IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);\r
      IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);\r
      return EFI_DEVICE_ERROR;\r
    }\r
\r
    //\r
    // Set START bit of BMIC register\r
    //\r
    IdeDev->PciIo->Io.Read (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    RegisterValue |= BMIC_START;\r
\r
    IdeDev->PciIo->Io.Write (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    //\r
    // Check the INTERRUPT and ERROR bit of BMIS\r
    // Max transfer number of sectors for one command is 65536(32Mbyte),\r
    // it will cost 1 second to transfer these data in UDMA mode 2(33.3MBps).\r
    // So set the variable Count to 2000, for about 2 second timeout time.\r
    //\r
    Count = 2000;\r
    while (TRUE) {\r
\r
      IdeDev->PciIo->Io.Read (\r
                          IdeDev->PciIo,\r
                          EfiPciIoWidthUint8,\r
                          EFI_PCI_IO_PASS_THROUGH_BAR,\r
                          IoPortForBmis,\r
                          1,\r
                          &RegisterValue\r
                          );\r
      if ((RegisterValue & (BMIS_INTERRUPT | BMIS_ERROR)) || (Count == 0)) {\r
        if ((RegisterValue & BMIS_ERROR) || (Count == 0)) {\r
          //\r
          // Clear START bit of BMIC register before return EFI_DEVICE_ERROR\r
          //\r
          IdeDev->PciIo->Io.Read (\r
                              IdeDev->PciIo,\r
                              EfiPciIoWidthUint8,\r
                              EFI_PCI_IO_PASS_THROUGH_BAR,\r
                              IoPortForBmic,\r
                              1,\r
                              &RegisterValue\r
                              );\r
\r
          RegisterValue &= ~((UINT8)BMIC_START);\r
\r
          IdeDev->PciIo->Io.Write (\r
                              IdeDev->PciIo,\r
                              EfiPciIoWidthUint8,\r
                              EFI_PCI_IO_PASS_THROUGH_BAR,\r
                              IoPortForBmic,\r
                              1,\r
                              &RegisterValue\r
                              );\r
          IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);\r
          IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);\r
          return EFI_DEVICE_ERROR;\r
        }\r
        break;\r
      }\r
\r
      gBS->Stall (1000);\r
      Count --;\r
    }\r
\r
    IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);\r
    IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);\r
    //\r
    // Read Status Register of IDE device to clear interrupt\r
    //\r
    RegisterValue = IDEReadPortB(IdeDev->PciIo,IdeDev->IoPort->Reg.Status);\r
    //\r
    // Clear START bit of BMIC register\r
    //\r
    IdeDev->PciIo->Io.Read (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    RegisterValue &= ~((UINT8) BMIC_START);\r
\r
    IdeDev->PciIo->Io.Write (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    DataBuffer = (UINT8 *) DataBuffer + NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;\r
    StartLba += NumberOfBlocks;\r
  }\r
\r
  //\r
  // Disable interrupt of Select device\r
  //\r
  IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl);\r
  DeviceControl |= IEN_L;\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  This function is called by the AtaBlkIoWriteBlocks() to perform\r
  writing to media in block unit. The function has been enhanced to\r
  support >120GB access and transfer at most 65536 blocks per command\r
\r
  @param[in] *IdeDev\r
  pointer pointing to IDE_BLK_IO_DEV data structure, used\r
  to record all the information of the IDE device.\r
\r
  @param[in] *DataBuffer\r
  A pointer to the source buffer for the data.\r
\r
  @param[in] StartLba\r
  The starting logical block address to write to\r
  on the device media.\r
\r
  @param[in] NumberOfBlocks\r
  The number of transfer data blocks.\r
\r
  @return The device status of UDMA operation. If the operation is\r
  successful, return EFI_SUCCESS.\r
\r
  TODO:    EFI_UNSUPPORTED - add return value to function comment\r
  TODO:    EFI_DEVICE_ERROR - add return value to function comment\r
  TODO:    EFI_DEVICE_ERROR - add return value to function comment\r
**/\r
EFI_STATUS\r
AtaUdmaWrite (\r
  IN  IDE_BLK_IO_DEV  *IdeDev,\r
  IN  VOID            *DataBuffer,\r
  IN  EFI_LBA         StartLba,\r
  IN  UINTN           NumberOfBlocks\r
  )\r
{\r
  IDE_DMA_PRD                *PrdAddr;\r
  IDE_DMA_PRD                *UsedPrdAddr;\r
  IDE_DMA_PRD                *TempPrdAddr;\r
  UINT8                      RegisterValue;\r
  UINT8                      Device;\r
  UINT64                     IoPortForBmic;\r
  UINT64                     IoPortForBmis;\r
  UINT64                     IoPortForBmid;\r
  EFI_STATUS                 Status;\r
  UINTN                      PrdTableNum;\r
  UINTN                      ByteCount;\r
  UINTN                      ByteAvailable;\r
  UINT8                      *PrdBuffer;\r
  UINTN                      RemainBlockNum;\r
  UINT8                      DeviceControl;\r
  UINT32                     Count;\r
  UINTN                      PageCount;\r
  VOID                       *Map;\r
  VOID                       *MemPage;\r
  EFI_PHYSICAL_ADDRESS       DeviceAddress;\r
\r
  //\r
  // Channel and device differential\r
  //\r
  Device = (UINT8) ((IdeDev->Device << 4) | 0xe0);\r
\r
  //\r
  // Enable interrupt to support UDMA\r
  //\r
  DeviceControl = 0;\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);\r
\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Head, Device);\r
\r
  if (IdePrimary == IdeDev->Channel) {\r
    IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICP_OFFSET;\r
    IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISP_OFFSET;\r
    IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDP_OFFSET;\r
  } else {\r
    if (IdeSecondary == IdeDev->Channel) {\r
      IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICS_OFFSET;\r
      IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISS_OFFSET;\r
      IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDS_OFFSET;\r
    } else {\r
      return EFI_UNSUPPORTED;\r
    }\r
  }\r
\r
  RemainBlockNum = NumberOfBlocks;\r
  while (RemainBlockNum > 0) {\r
\r
    if (RemainBlockNum >= MAX_DMA_COMMAND_SECTORS) {\r
      //\r
      //  SectorCount is used to record the number of sectors to be read\r
      //  Max 256 sectors can be transfered at a time.\r
      //\r
      NumberOfBlocks = MAX_DMA_COMMAND_SECTORS;\r
      RemainBlockNum -= MAX_DMA_COMMAND_SECTORS;\r
    } else {\r
      NumberOfBlocks  = (UINT16) RemainBlockNum;\r
      RemainBlockNum  = 0;\r
    }\r
\r
    //\r
    // Calculate the number of PRD table to make sure the memory region\r
    // not cross 64K boundary\r
    //\r
    ByteCount   = NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;\r
    PrdTableNum = ((ByteCount >> 16) + 1) + 1;\r
\r
    //\r
    // Build PRD table\r
    //\r
    PageCount = EFI_SIZE_TO_PAGES (2 * PrdTableNum * sizeof (IDE_DMA_PRD));\r
    Status = IdeDev->PciIo->AllocateBuffer (\r
                       IdeDev->PciIo,\r
                       AllocateAnyPages,\r
                       EfiBootServicesData,\r
                       PageCount,\r
                       &MemPage,\r
                       0\r
                       );\r
    if (EFI_ERROR (Status)) {\r
      return EFI_OUT_OF_RESOURCES;\r
    }\r
    ZeroMem ((VOID *) ((UINTN) MemPage), EFI_PAGES_TO_SIZE (PageCount));\r
\r
    PrdAddr = (IDE_DMA_PRD *) ((UINTN) MemPage);\r
\r
    //\r
    // To make sure PRD is allocated in one 64K page\r
    //\r
    if (((UINTN) PrdAddr & 0x0FFFF) > (((UINTN) PrdAddr + PrdTableNum * sizeof (IDE_DMA_PRD) - 1) & 0x0FFFF)) {\r
      UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x10000) & 0xFFFF0000);\r
    } else {\r
      if ((UINTN) PrdAddr & 0x03) {\r
        UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x04) & 0xFFFFFFFC);\r
      } else {\r
        UsedPrdAddr = PrdAddr;\r
      }\r
    }\r
\r
    //\r
    // Build the PRD table\r
    //\r
    Status = IdeDev->PciIo->Map (\r
                       IdeDev->PciIo,\r
                       EfiPciIoOperationBusMasterRead,\r
                       DataBuffer,\r
                       &ByteCount,\r
                       &DeviceAddress,\r
                       &Map\r
                       );\r
    if (EFI_ERROR (Status)) {\r
      IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);\r
      return EFI_OUT_OF_RESOURCES;\r
    }\r
    PrdBuffer   = (UINT8 *) ((UINTN) DeviceAddress);\r
    TempPrdAddr = UsedPrdAddr;\r
    while (TRUE) {\r
\r
      ByteAvailable = 0x10000 - ((UINTN) PrdBuffer & 0xFFFF);\r
\r
      if (ByteCount <= ByteAvailable) {\r
        TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);\r
        TempPrdAddr->ByteCount      = (UINT16) ByteCount;\r
        TempPrdAddr->EndOfTable     = 0x8000;\r
        break;\r
      }\r
\r
      TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);\r
      TempPrdAddr->ByteCount      = (UINT16) ByteAvailable;\r
\r
      ByteCount -= ByteAvailable;\r
      PrdBuffer += ByteAvailable;\r
      TempPrdAddr++;\r
    }\r
\r
    //\r
    // Set the base address to BMID register\r
    //\r
    IdeDev->PciIo->Io.Write (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint32,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmid,\r
                        1,\r
                        &UsedPrdAddr\r
                        );\r
\r
    //\r
    // Set BMIC register to identify the operation direction\r
    //\r
    IdeDev->PciIo->Io.Read (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
    //\r
    // 0000 1000\r
    //\r
    RegisterValue &= ~((UINT8) BMIC_nREAD);\r
\r
    IdeDev->PciIo->Io.Write (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    //\r
    // Read BMIS register and clear ERROR and INTR bit\r
    //\r
    IdeDev->PciIo->Io.Read (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmis,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    RegisterValue |= (BMIS_INTERRUPT | BMIS_ERROR);\r
\r
    IdeDev->PciIo->Io.Write (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmis,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    //\r
    // Issue WRITE DMA command\r
    //\r
    Status = AtaCommandIssue (\r
               IdeDev,\r
               WRITE_DMA_CMD,\r
               Device,\r
               0,\r
               (UINT16) NumberOfBlocks,\r
               StartLba\r
               );\r
    if (EFI_ERROR (Status)) {\r
      IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);\r
      IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);\r
      return EFI_DEVICE_ERROR;\r
    }\r
\r
    //\r
    // Set START bit of BMIC register\r
    //\r
    IdeDev->PciIo->Io.Read (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    RegisterValue |= BMIC_START;\r
\r
    IdeDev->PciIo->Io.Write (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    //\r
    // Check the INTERRUPT and ERROR bit of BMIS\r
    // Max transfer number of sectors for one command is 65536(32Mbyte),\r
    // it will cost 1 second to transfer these data in UDMA mode 2(33.3MBps).\r
    // So set the variable Count to 2000, for about 2 second timeout time.\r
    //\r
    Count = 2000;\r
    while (TRUE) {\r
\r
      IdeDev->PciIo->Io.Read (\r
                          IdeDev->PciIo,\r
                          EfiPciIoWidthUint8,\r
                          EFI_PCI_IO_PASS_THROUGH_BAR,\r
                          IoPortForBmis,\r
                          1,\r
                          &RegisterValue\r
                          );\r
      if ((RegisterValue & (BMIS_INTERRUPT | BMIS_ERROR)) || (Count == 0)) {\r
        if ((RegisterValue & BMIS_ERROR) || (Count == 0)) {\r
          //\r
          // Clear START bit of BMIC register before return EFI_DEVICE_ERROR\r
          //\r
          IdeDev->PciIo->Io.Read (\r
                              IdeDev->PciIo,\r
                              EfiPciIoWidthUint8,\r
                              EFI_PCI_IO_PASS_THROUGH_BAR,\r
                              IoPortForBmic,\r
                              1,\r
                              &RegisterValue\r
                              );\r
\r
          RegisterValue &= ~((UINT8)BMIC_START);\r
\r
          IdeDev->PciIo->Io.Write (\r
                              IdeDev->PciIo,\r
                              EfiPciIoWidthUint8,\r
                              EFI_PCI_IO_PASS_THROUGH_BAR,\r
                              IoPortForBmic,\r
                              1,\r
                              &RegisterValue\r
                              );\r
          IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);\r
          IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);\r
          return EFI_DEVICE_ERROR;\r
        }\r
        break;\r
      }\r
\r
      gBS->Stall (1000);\r
      Count --;\r
    }\r
\r
    IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);\r
    IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);\r
\r
    //\r
    // Read Status Register of IDE device to clear interrupt\r
    //\r
    RegisterValue = IDEReadPortB(IdeDev->PciIo,IdeDev->IoPort->Reg.Status);\r
    //\r
    // Clear START bit of BMIC register\r
    //\r
    IdeDev->PciIo->Io.Read (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    RegisterValue &= ~((UINT8) BMIC_START);\r
\r
    IdeDev->PciIo->Io.Write (\r
                        IdeDev->PciIo,\r
                        EfiPciIoWidthUint8,\r
                        EFI_PCI_IO_PASS_THROUGH_BAR,\r
                        IoPortForBmic,\r
                        1,\r
                        &RegisterValue\r
                        );\r
\r
    DataBuffer = (UINT8 *) DataBuffer + NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;\r
    StartLba += NumberOfBlocks;\r
  }\r
\r
  //\r
  // Disable interrupt of Select device\r
  //\r
  IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl);\r
  DeviceControl |= IEN_L;\r
  IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);\r
\r
  return EFI_SUCCESS;\r
}\r