]> git.proxmox.com Git - mirror_edk2.git/blame - EdkModulePkg/Bus/Pci/PciBus/Dxe/PciCommand.c
1) Use FeatureFlag PcdPciBusHotplugDeviceSupport to merge LightPciLib.c with PcdLib.c.
[mirror_edk2.git] / EdkModulePkg / Bus / Pci / PciBus / Dxe / PciCommand.c
CommitLineData
878ddf1f 1/*++\r
2\r
3Copyright (c) 2006, Intel Corporation \r
4All rights reserved. This program and the accompanying materials \r
5are licensed and made available under the terms and conditions of the BSD License \r
6which accompanies this distribution. The full text of the license may be found at \r
7http://opensource.org/licenses/bsd-license.php \r
8 \r
9THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
10WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
11\r
12Module Name:\r
13\r
14 PciCommand.c\r
15 \r
16Abstract:\r
17\r
18 PCI Bus Driver\r
19\r
20Revision History\r
21\r
22--*/\r
23\r
f0ec738d 24#include "pcibus.h"\r
878ddf1f 25\r
26EFI_STATUS\r
27PciOperateRegister (\r
28 IN PCI_IO_DEVICE *PciIoDevice,\r
29 IN UINT16 Command,\r
30 IN UINT8 Offset,\r
31 IN UINT8 Operation,\r
32 OUT UINT16 *PtrCommand\r
33 )\r
34/*++\r
35\r
36Routine Description:\r
37\r
38Arguments:\r
39\r
40Returns:\r
41\r
42 None\r
43\r
44--*/\r
45// TODO: PciIoDevice - add argument and description to function comment\r
46// TODO: Command - add argument and description to function comment\r
47// TODO: Offset - add argument and description to function comment\r
48// TODO: Operation - add argument and description to function comment\r
49// TODO: PtrCommand - add argument and description to function comment\r
50{\r
51 UINT16 OldCommand;\r
52 EFI_STATUS Status;\r
53 EFI_PCI_IO_PROTOCOL *PciIo;\r
54\r
55 OldCommand = 0;\r
56 PciIo = &PciIoDevice->PciIo;\r
57\r
58 if (Operation != EFI_SET_REGISTER) {\r
59 Status = PciIo->Pci.Read (\r
60 PciIo,\r
61 EfiPciIoWidthUint16,\r
62 Offset,\r
63 1,\r
64 &OldCommand\r
65 );\r
66\r
67 if (Operation == EFI_GET_REGISTER) {\r
68 *PtrCommand = OldCommand;\r
69 return Status;\r
70 }\r
71 }\r
72\r
73 if (Operation == EFI_ENABLE_REGISTER) {\r
74 OldCommand |= Command;\r
75 } else if (Operation == EFI_DISABLE_REGISTER) {\r
76 OldCommand &= ~(Command);\r
77 } else {\r
78 OldCommand = Command;\r
79 }\r
80\r
81 return PciIo->Pci.Write (\r
82 PciIo,\r
83 EfiPciIoWidthUint16,\r
84 Offset,\r
85 1,\r
86 &OldCommand\r
87 );\r
88}\r
89\r
90BOOLEAN\r
91PciCapabilitySupport (\r
92 IN PCI_IO_DEVICE *PciIoDevice\r
93 )\r
94/*++\r
95\r
96Routine Description:\r
97\r
98Arguments:\r
99\r
100Returns:\r
101 \r
102 None\r
103\r
104--*/\r
105// TODO: PciIoDevice - add argument and description to function comment\r
106{\r
107\r
108 if (PciIoDevice->Pci.Hdr.Status & EFI_PCI_STATUS_CAPABILITY) {\r
109 return TRUE;\r
110 }\r
111\r
112 return FALSE;\r
113}\r
114\r
115EFI_STATUS\r
116LocateCapabilityRegBlock (\r
117 IN PCI_IO_DEVICE *PciIoDevice,\r
118 IN UINT8 CapId,\r
119 IN OUT UINT8 *Offset,\r
120 OUT UINT8 *NextRegBlock OPTIONAL\r
121 )\r
122/*++\r
123\r
124Routine Description:\r
125 Locate cap reg.\r
126\r
127Arguments:\r
128 PciIoDevice - A pointer to the PCI_IO_DEVICE.\r
129 CapId - The cap ID.\r
130 Offset - A pointer to the offset.\r
131 NextRegBlock - A pointer to the next block.\r
132\r
133Returns:\r
134 \r
135 None\r
136\r
137--*/\r
138// TODO: EFI_UNSUPPORTED - add return value to function comment\r
139// TODO: EFI_SUCCESS - add return value to function comment\r
140// TODO: EFI_NOT_FOUND - add return value to function comment\r
141{\r
142 UINT8 CapabilityPtr;\r
143 UINT16 CapabilityEntry;\r
144 UINT8 CapabilityID;\r
145\r
146 //\r
147 // To check the cpability of this device supports\r
148 //\r
149 if (!PciCapabilitySupport (PciIoDevice)) {\r
150 return EFI_UNSUPPORTED;\r
151 }\r
152\r
153 if (*Offset != 0) {\r
154 CapabilityPtr = *Offset;\r
155 } else {\r
156\r
157 CapabilityPtr = 0;\r
158 if (IS_CARDBUS_BRIDGE (&PciIoDevice->Pci)) {\r
159\r
160 PciIoDevice->PciIo.Pci.Read (\r
161 &PciIoDevice->PciIo,\r
162 EfiPciIoWidthUint8,\r
163 EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR,\r
164 1,\r
165 &CapabilityPtr\r
166 );\r
167 } else {\r
168\r
169 PciIoDevice->PciIo.Pci.Read (\r
170 &PciIoDevice->PciIo,\r
171 EfiPciIoWidthUint8,\r
172 EFI_PCI_CAPABILITY_PTR,\r
173 1,\r
174 &CapabilityPtr\r
175 );\r
176 }\r
177 }\r
178\r
179 while (CapabilityPtr > 0x3F) {\r
180 //\r
181 // Mask it to DWORD alignment per PCI spec\r
182 //\r
183 CapabilityPtr &= 0xFC;\r
184 PciIoDevice->PciIo.Pci.Read (\r
185 &PciIoDevice->PciIo,\r
186 EfiPciIoWidthUint16,\r
187 CapabilityPtr,\r
188 1,\r
189 &CapabilityEntry\r
190 );\r
191\r
192 CapabilityID = (UINT8) CapabilityEntry;\r
193\r
194 if (CapabilityID == CapId) {\r
195 *Offset = CapabilityPtr;\r
196 if (NextRegBlock != NULL) {\r
197 *NextRegBlock = (UINT8) (CapabilityEntry >> 8);\r
198 }\r
199\r
200 return EFI_SUCCESS;\r
201 }\r
202\r
203 CapabilityPtr = (UINT8) (CapabilityEntry >> 8);\r
204 }\r
205\r
206 return EFI_NOT_FOUND;\r
207}\r