878ddf1f |
1 | /*++\r |
2 | \r |
3 | Copyright (c) 2006, Intel Corporation \r |
4 | All rights reserved. This program and the accompanying materials \r |
5 | are licensed and made available under the terms and conditions of the BSD License \r |
6 | which accompanies this distribution. The full text of the license may be found at \r |
7 | http://opensource.org/licenses/bsd-license.php \r |
8 | \r |
9 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r |
10 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r |
11 | \r |
12 | Module Name:\r |
13 | \r |
14 | Uhci.h\r |
15 | \r |
16 | Abstract: \r |
17 | \r |
18 | \r |
19 | Revision History\r |
20 | --*/\r |
21 | \r |
22 | #ifndef _UHCI_H\r |
23 | #define _UHCI_H\r |
24 | \r |
25 | /*\r |
26 | * Universal Host Controller Interface data structures and defines\r |
27 | */\r |
28 | \r |
f0ec738d |
29 | #include <IndustryStandard/pci22.h>\r |
878ddf1f |
30 | \r |
562d2849 |
31 | #define EFI_D_UHCI EFI_D_INFO\r |
878ddf1f |
32 | \r |
33 | //\r |
34 | // stall time\r |
35 | //\r |
36 | #define STALL_1_MILLI_SECOND 1000\r |
37 | #define STALL_1_SECOND 1000 * STALL_1_MILLI_SECOND\r |
38 | \r |
39 | #define FORCE_GLOBAL_RESUME_TIME 20 * STALL_1_MILLI_SECOND\r |
40 | \r |
41 | #define ROOT_PORT_REST_TIME 50 * STALL_1_MILLI_SECOND\r |
42 | \r |
43 | #define PORT_RESET_RECOVERY_TIME 10 * STALL_1_MILLI_SECOND\r |
44 | \r |
45 | //\r |
46 | // 50 ms\r |
47 | //\r |
562d2849 |
48 | #define INTERRUPT_POLLING_TIME 50 * 1000 * 10\r |
878ddf1f |
49 | \r |
50 | //\r |
51 | // UHCI IO Space Address Register Register locates at\r |
52 | // offset 20 ~ 23h of PCI Configuration Space (UHCI spec, Revision 1.1),\r |
53 | // so, its BAR Index is 4.\r |
54 | //\r |
562d2849 |
55 | #define USB_BAR_INDEX 4\r |
878ddf1f |
56 | \r |
57 | //\r |
58 | // One memory block uses 1 page (common buffer for QH,TD use.)\r |
59 | //\r |
60 | #define NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES 1\r |
61 | \r |
878ddf1f |
62 | #define bit(a) 1 << (a)\r |
63 | \r |
64 | //\r |
65 | // ////////////////////////////////////////////////////////////////////////\r |
66 | //\r |
67 | // Universal Host Controller Registers Definitions\r |
68 | //\r |
69 | //////////////////////////////////////////////////////////////////////////\r |
70 | extern UINT16 USBBaseAddr;\r |
71 | \r |
72 | /* Command register */\r |
73 | #define USBCMD 0 /* Command Register Offset 00-01h */\r |
74 | #define USBCMD_RS bit (0) /* Run/Stop */\r |
75 | #define USBCMD_HCRESET bit (1) /* Host reset */\r |
76 | #define USBCMD_GRESET bit (2) /* Global reset */\r |
77 | #define USBCMD_EGSM bit (3) /* Global Suspend Mode */\r |
78 | #define USBCMD_FGR bit (4) /* Force Global Resume */\r |
79 | #define USBCMD_SWDBG bit (5) /* SW Debug mode */\r |
80 | #define USBCMD_CF bit (6) /* Config Flag (sw only) */\r |
81 | #define USBCMD_MAXP bit (7) /* Max Packet (0 = 32, 1 = 64) */\r |
82 | \r |
83 | /* Status register */\r |
562d2849 |
84 | #define USBSTS 2 /* Status Register Offset 02-03h */\r |
85 | #define USBSTS_USBINT bit (0) /* Interrupt due to IOC */\r |
86 | #define USBSTS_ERROR bit (1) /* Interrupt due to error */\r |
87 | #define USBSTS_RD bit (2) /* Resume Detect */\r |
88 | #define USBSTS_HSE bit (3) /* Host System Error*/\r |
89 | #define USBSTS_HCPE bit (4) /* Host Controller Process Error*/\r |
90 | #define USBSTS_HCH bit (5) /* HC Halted */\r |
878ddf1f |
91 | \r |
92 | /* Interrupt enable register */\r |
93 | #define USBINTR 4 /* Interrupt Enable Register 04-05h */\r |
94 | #define USBINTR_TIMEOUT bit (0) /* Timeout/CRC error enable */\r |
95 | #define USBINTR_RESUME bit (1) /* Resume interrupt enable */\r |
96 | #define USBINTR_IOC bit (2) /* Interrupt On Complete enable */\r |
97 | #define USBINTR_SP bit (3) /* Short packet interrupt enable */\r |
98 | \r |
99 | /* Frame Number Register Offset 06-08h */\r |
562d2849 |
100 | #define USBFRNUM 6\r |
878ddf1f |
101 | \r |
102 | /* Frame List Base Address Register Offset 08-0Bh */\r |
562d2849 |
103 | #define USBFLBASEADD 8\r |
878ddf1f |
104 | \r |
105 | /* Start of Frame Modify Register Offset 0Ch */\r |
562d2849 |
106 | #define USBSOF 0x0c\r |
878ddf1f |
107 | \r |
108 | /* USB port status and control registers */\r |
109 | #define USBPORTSC1 0x10 /*Port 1 offset 10-11h */\r |
110 | #define USBPORTSC2 0x12 /*Port 2 offset 12-13h */\r |
111 | \r |
112 | #define USBPORTSC_CCS bit (0) /* Current Connect Status*/\r |
113 | #define USBPORTSC_CSC bit (1) /* Connect Status Change */\r |
114 | #define USBPORTSC_PED bit (2) /* Port Enable / Disable */\r |
115 | #define USBPORTSC_PEDC bit (3) /* Port Enable / Disable Change */\r |
116 | #define USBPORTSC_LSL bit (4) /* Line Status Low bit*/\r |
117 | #define USBPORTSC_LSH bit (5) /* Line Status High bit*/\r |
118 | #define USBPORTSC_RD bit (6) /* Resume Detect */\r |
119 | #define USBPORTSC_LSDA bit (8) /* Low Speed Device Attached */\r |
120 | #define USBPORTSC_PR bit (9) /* Port Reset */\r |
121 | #define USBPORTSC_SUSP bit (12) /* Suspend */\r |
122 | \r |
123 | /* PCI Configuration Registers for USB */\r |
124 | \r |
125 | //\r |
126 | // Class Code Register offset\r |
127 | //\r |
562d2849 |
128 | #define CLASSC 0x09\r |
878ddf1f |
129 | //\r |
130 | // USB IO Space Base Address Register offset\r |
131 | //\r |
562d2849 |
132 | #define USBBASE 0x20\r |
878ddf1f |
133 | \r |
134 | //\r |
135 | // USB legacy Support\r |
136 | //\r |
562d2849 |
137 | #define USB_EMULATION 0xc0\r |
878ddf1f |
138 | \r |
139 | //\r |
140 | // USB Base Class Code,Sub-Class Code and Programming Interface.\r |
141 | //\r |
142 | #define PCI_CLASSC_PI_UHCI 0x00\r |
143 | \r |
144 | #define SETUP_PACKET_ID 0x2D\r |
145 | #define INPUT_PACKET_ID 0x69\r |
146 | #define OUTPUT_PACKET_ID 0xE1\r |
147 | #define ERROR_PACKET_ID 0x55\r |
148 | \r |
149 | //\r |
150 | // ////////////////////////////////////////////////////////////////////////\r |
151 | //\r |
152 | // USB Transfer Mechanism Data Structures\r |
153 | //\r |
154 | //////////////////////////////////////////////////////////////////////////\r |
155 | #pragma pack(1)\r |
156 | //\r |
157 | // USB Class Code structure\r |
158 | //\r |
159 | typedef struct {\r |
160 | UINT8 PI;\r |
161 | UINT8 SubClassCode;\r |
162 | UINT8 BaseCode;\r |
163 | } USB_CLASSC;\r |
164 | \r |
165 | typedef struct {\r |
166 | UINT32 QHHorizontalTerminate : 1;\r |
167 | UINT32 QHHorizontalQSelect : 1;\r |
168 | UINT32 QHHorizontalRsvd : 2;\r |
169 | UINT32 QHHorizontalPtr : 28;\r |
170 | UINT32 QHVerticalTerminate : 1;\r |
171 | UINT32 QHVerticalQSelect : 1;\r |
172 | UINT32 QHVerticalRsvd : 2;\r |
173 | UINT32 QHVerticalPtr : 28;\r |
174 | } QUEUE_HEAD;\r |
175 | \r |
176 | typedef struct {\r |
177 | UINT32 TDLinkPtrTerminate : 1;\r |
178 | UINT32 TDLinkPtrQSelect : 1;\r |
179 | UINT32 TDLinkPtrDepthSelect : 1;\r |
180 | UINT32 TDLinkPtrRsvd : 1;\r |
181 | UINT32 TDLinkPtr : 28;\r |
182 | UINT32 TDStatusActualLength : 11;\r |
183 | UINT32 TDStatusRsvd : 5;\r |
184 | UINT32 TDStatus : 8;\r |
185 | UINT32 TDStatusIOC : 1;\r |
186 | UINT32 TDStatusIOS : 1;\r |
187 | UINT32 TDStatusLS : 1;\r |
188 | UINT32 TDStatusErr : 2;\r |
189 | UINT32 TDStatusSPD : 1;\r |
190 | UINT32 TDStatusRsvd2 : 2;\r |
191 | UINT32 TDTokenPID : 8;\r |
192 | UINT32 TDTokenDevAddr : 7;\r |
193 | UINT32 TDTokenEndPt : 4;\r |
194 | UINT32 TDTokenDataToggle : 1;\r |
195 | UINT32 TDTokenRsvd : 1;\r |
196 | UINT32 TDTokenMaxLen : 11;\r |
197 | UINT32 TDBufferPtr;\r |
198 | } TD;\r |
199 | \r |
200 | #pragma pack()\r |
201 | \r |
202 | typedef struct {\r |
203 | QUEUE_HEAD QH;\r |
204 | VOID *ptrNext;\r |
205 | VOID *ptrDown;\r |
206 | VOID *ptrNextIntQH; // for interrupt transfer's special use\r |
207 | VOID *LoopPtr;\r |
208 | } QH_STRUCT;\r |
209 | \r |
210 | typedef struct {\r |
211 | TD TDData;\r |
212 | UINT8 *pTDBuffer;\r |
213 | VOID *ptrNextTD;\r |
214 | VOID *ptrNextQH;\r |
215 | UINT16 TDBufferLength;\r |
216 | UINT16 reserved;\r |
217 | } TD_STRUCT;\r |
218 | \r |
219 | //\r |
220 | // ////////////////////////////////////////////////////////////////////////\r |
221 | //\r |
222 | // Universal Host Controller Device Data Structure\r |
223 | //\r |
224 | //////////////////////////////////////////////////////////////////////////\r |
225 | #define USB_HC_DEV_FROM_THIS(a) CR (a, USB_HC_DEV, UsbHc, USB_HC_DEV_SIGNATURE)\r |
562d2849 |
226 | #define USB2_HC_DEV_FROM_THIS(a) CR (a, USB_HC_DEV, Usb2Hc, USB_HC_DEV_SIGNATURE)\r |
878ddf1f |
227 | \r |
228 | #define USB_HC_DEV_SIGNATURE EFI_SIGNATURE_32 ('u', 'h', 'c', 'i')\r |
229 | #define INTERRUPT_LIST_SIGNATURE EFI_SIGNATURE_32 ('i', 'n', 't', 's')\r |
230 | typedef struct {\r |
231 | UINTN Signature;\r |
232 | \r |
233 | LIST_ENTRY Link;\r |
234 | UINT8 DevAddr;\r |
235 | UINT8 EndPoint;\r |
236 | UINT8 DataToggle;\r |
237 | UINT8 Reserved[5];\r |
238 | TD_STRUCT *PtrFirstTD;\r |
239 | QH_STRUCT *PtrQH;\r |
240 | UINTN DataLen;\r |
241 | UINTN PollInterval;\r |
242 | VOID *Mapping;\r |
243 | UINT8 *DataBuffer; // allocated host memory, not mapped memory\r |
244 | EFI_ASYNC_USB_TRANSFER_CALLBACK InterruptCallBack;\r |
245 | VOID *InterruptContext;\r |
246 | } INTERRUPT_LIST;\r |
247 | \r |
248 | #define INTERRUPT_LIST_FROM_LINK(a) CR (a, INTERRUPT_LIST, Link, INTERRUPT_LIST_SIGNATURE)\r |
249 | \r |
250 | typedef struct {\r |
251 | UINT32 FrameListPtrTerminate : 1;\r |
252 | UINT32 FrameListPtrQSelect : 1;\r |
253 | UINT32 FrameListRsvd : 2;\r |
254 | UINT32 FrameListPtr : 28;\r |
255 | \r |
256 | } FRAMELIST_ENTRY;\r |
257 | \r |
258 | typedef struct _MEMORY_MANAGE_HEADER {\r |
259 | UINT8 *BitArrayPtr;\r |
260 | UINTN BitArraySizeInBytes;\r |
261 | UINT8 *MemoryBlockPtr;\r |
262 | UINTN MemoryBlockSizeInBytes;\r |
263 | VOID *Mapping;\r |
264 | struct _MEMORY_MANAGE_HEADER *Next;\r |
265 | } MEMORY_MANAGE_HEADER;\r |
266 | \r |
267 | typedef struct {\r |
268 | UINTN Signature;\r |
269 | EFI_USB_HC_PROTOCOL UsbHc;\r |
562d2849 |
270 | EFI_USB2_HC_PROTOCOL Usb2Hc;\r |
878ddf1f |
271 | EFI_PCI_IO_PROTOCOL *PciIo;\r |
272 | \r |
273 | //\r |
274 | // local data\r |
275 | //\r |
276 | LIST_ENTRY InterruptListHead;\r |
277 | FRAMELIST_ENTRY *FrameListEntry;\r |
278 | VOID *FrameListMapping;\r |
279 | MEMORY_MANAGE_HEADER *MemoryHeader;\r |
280 | EFI_EVENT InterruptTransTimer;\r |
281 | EFI_UNICODE_STRING_TABLE *ControllerNameTable;\r |
282 | \r |
283 | } USB_HC_DEV;\r |
284 | \r |
285 | extern EFI_DRIVER_BINDING_PROTOCOL gUhciDriverBinding;\r |
286 | extern EFI_COMPONENT_NAME_PROTOCOL gUhciComponentName;\r |
287 | \r |
288 | EFI_STATUS\r |
289 | WriteUHCCommandReg (\r |
290 | IN EFI_PCI_IO_PROTOCOL *PciIo,\r |
291 | IN UINT32 CmdAddrOffset,\r |
292 | IN UINT16 UsbCmd\r |
562d2849 |
293 | )\r |
294 | /*++\r |
295 | \r |
296 | Routine Description:\r |
297 | \r |
298 | Write UHCI Command Register\r |
299 | \r |
300 | Arguments:\r |
301 | \r |
302 | PciIo - EFI_PCI_IO_PROTOCOL\r |
303 | CmdAddrOffset - Command address offset\r |
304 | UsbCmd - Data to write\r |
305 | \r |
306 | Returns:\r |
307 | \r |
308 | EFI_SUCCESS\r |
309 | \r |
310 | --*/\r |
311 | ;\r |
878ddf1f |
312 | \r |
313 | EFI_STATUS\r |
314 | ReadUHCCommandReg (\r |
315 | IN EFI_PCI_IO_PROTOCOL *PciIo,\r |
316 | IN UINT32 CmdAddrOffset,\r |
317 | IN OUT UINT16 *Data\r |
562d2849 |
318 | )\r |
319 | /*++\r |
320 | \r |
321 | Routine Description:\r |
322 | \r |
323 | Read UHCI Command Register\r |
324 | \r |
325 | Arguments:\r |
326 | \r |
327 | PciIo - EFI_PCI_IO_PROTOCOL\r |
328 | CmdAddrOffset - Command address offset\r |
329 | Data - Data to return\r |
330 | \r |
331 | Returns:\r |
332 | \r |
333 | EFI_SUCCESS\r |
334 | \r |
335 | --*/\r |
336 | ;\r |
878ddf1f |
337 | \r |
338 | EFI_STATUS\r |
339 | WriteUHCStatusReg (\r |
340 | IN EFI_PCI_IO_PROTOCOL *PciIo,\r |
341 | IN UINT32 StatusAddrOffset,\r |
342 | IN UINT16 UsbSts\r |
562d2849 |
343 | )\r |
344 | /*++\r |
345 | \r |
346 | Routine Description:\r |
347 | \r |
348 | Write UHCI Staus Register\r |
349 | \r |
350 | Arguments:\r |
351 | \r |
352 | PciIo - EFI_PCI_IO_PROTOCOL\r |
353 | StatusAddrOffset - Status address offset\r |
354 | UsbSts - Data to write\r |
355 | \r |
356 | Returns:\r |
357 | \r |
358 | EFI_SUCCESS\r |
359 | \r |
360 | --*/\r |
361 | ;\r |
878ddf1f |
362 | \r |
363 | EFI_STATUS\r |
364 | ReadUHCStatusReg (\r |
365 | IN EFI_PCI_IO_PROTOCOL *PciIo,\r |
366 | IN UINT32 StatusAddrOffset,\r |
367 | IN OUT UINT16 *Data\r |
562d2849 |
368 | )\r |
369 | /*++\r |
370 | \r |
371 | Routine Description:\r |
372 | \r |
373 | Read UHCI Staus Register\r |
374 | \r |
375 | Arguments:\r |
376 | \r |
377 | PciIo - EFI_PCI_IO_PROTOCOL\r |
378 | StatusAddrOffset - Status address offset\r |
379 | UsbSts - Data to return\r |
380 | \r |
381 | Returns:\r |
382 | \r |
383 | EFI_SUCCESS\r |
384 | \r |
385 | --*/\r |
386 | ;\r |
878ddf1f |
387 | \r |
388 | EFI_STATUS\r |
389 | ClearStatusReg (\r |
390 | IN EFI_PCI_IO_PROTOCOL *PciIo,\r |
391 | IN UINT32 StatusAddrOffset\r |
562d2849 |
392 | )\r |
393 | /*++\r |
394 | \r |
395 | Routine Description:\r |
396 | \r |
397 | Clear the content of UHC's Status Register\r |
398 | \r |
399 | Arguments:\r |
400 | \r |
401 | PciIo - EFI_PCI_IO_PROTOCOL\r |
402 | StatusAddrOffset - Status address offset\r |
403 | \r |
404 | Returns:\r |
405 | \r |
406 | EFI_SUCCESS\r |
407 | \r |
408 | --*/\r |
409 | ;\r |
878ddf1f |
410 | \r |
411 | EFI_STATUS\r |
412 | ReadUHCFrameNumberReg (\r |
413 | IN EFI_PCI_IO_PROTOCOL *PciIo,\r |
414 | IN UINT32 FrameNumAddrOffset,\r |
415 | IN OUT UINT16 *Data\r |
562d2849 |
416 | )\r |
417 | /*++\r |
418 | \r |
419 | Routine Description:\r |
420 | \r |
421 | Read from UHC's Frame Number Register\r |
422 | \r |
423 | Arguments:\r |
424 | \r |
425 | PciIo - EFI_PCI_IO_PROTOCOL\r |
426 | FrameNumAddrOffset - Frame number register offset\r |
427 | Data - Data to return \r |
428 | Returns:\r |
429 | \r |
430 | EFI_SUCCESS\r |
431 | \r |
432 | --*/\r |
433 | ;\r |
878ddf1f |
434 | \r |
435 | EFI_STATUS\r |
436 | WriteUHCFrameListBaseReg (\r |
437 | IN EFI_PCI_IO_PROTOCOL *PciIo,\r |
438 | IN UINT32 FlBaseAddrOffset,\r |
439 | IN UINT32 UsbFrameListBaseAddr\r |
562d2849 |
440 | )\r |
441 | /*++\r |
442 | \r |
443 | Routine Description:\r |
444 | \r |
445 | Write to UHC's Frame List Base Register\r |
446 | \r |
447 | Arguments:\r |
448 | \r |
449 | PciIo - EFI_PCI_IO_PROTOCOL\r |
450 | FlBaseAddrOffset - Frame Base address register\r |
451 | UsbFrameListBaseAddr - Address to write\r |
452 | \r |
453 | Returns:\r |
454 | \r |
455 | EFI_SUCCESS\r |
456 | \r |
457 | --*/\r |
458 | ;\r |
878ddf1f |
459 | \r |
460 | EFI_STATUS\r |
461 | ReadRootPortReg (\r |
462 | IN EFI_PCI_IO_PROTOCOL *PciIo,\r |
463 | IN UINT32 PortAddrOffset,\r |
464 | IN OUT UINT16 *Data\r |
562d2849 |
465 | )\r |
466 | /*++\r |
467 | \r |
468 | Routine Description:\r |
469 | \r |
470 | Read from UHC's Root Port Register\r |
471 | \r |
472 | Arguments:\r |
473 | \r |
474 | PciIo - EFI_PCI_IO_PROTOCOL\r |
475 | PortAddrOffset - Port Addrress Offset,\r |
476 | Data - Data to return\r |
477 | Returns:\r |
478 | \r |
479 | EFI_SUCCESS\r |
480 | \r |
481 | --*/\r |
482 | ;\r |
878ddf1f |
483 | \r |
484 | EFI_STATUS\r |
485 | WriteRootPortReg (\r |
486 | IN EFI_PCI_IO_PROTOCOL *PciIo,\r |
487 | IN UINT32 PortAddrOffset,\r |
488 | IN UINT16 ControlBits\r |
562d2849 |
489 | )\r |
490 | /*++\r |
491 | \r |
492 | Routine Description:\r |
493 | \r |
494 | Write to UHC's Root Port Register\r |
495 | \r |
496 | Arguments:\r |
497 | \r |
498 | PciIo - EFI_PCI_IO_PROTOCOL\r |
499 | PortAddrOffset - Port Addrress Offset,\r |
500 | ControlBits - Data to write\r |
501 | Returns:\r |
502 | \r |
503 | EFI_SUCCESS\r |
504 | \r |
505 | --*/\r |
506 | ;\r |
878ddf1f |
507 | \r |
508 | EFI_STATUS\r |
509 | WaitForUHCHalt (\r |
510 | IN EFI_PCI_IO_PROTOCOL *PciIo,\r |
511 | IN UINT32 StatusRegAddr,\r |
512 | IN UINTN Timeout\r |
562d2849 |
513 | )\r |
514 | /*++\r |
515 | \r |
516 | Routine Description:\r |
517 | \r |
518 | Wait until UHCI halt or timeout\r |
519 | \r |
520 | Arguments:\r |
521 | \r |
522 | PciIo - EFI_PCI_IO_PROTOCOL\r |
523 | StatusRegAddr - Status Register Address\r |
524 | Timeout - Time out value in us\r |
525 | \r |
526 | Returns:\r |
527 | \r |
528 | EFI_DEVICE_ERROR - Unable to read the status register\r |
529 | EFI_TIMEOUT - Time out\r |
530 | EFI_SUCCESS - Success\r |
531 | \r |
532 | --*/\r |
533 | ;\r |
878ddf1f |
534 | \r |
535 | BOOLEAN\r |
536 | IsStatusOK (\r |
537 | IN EFI_PCI_IO_PROTOCOL *PciIo,\r |
538 | IN UINT32 StatusRegAddr\r |
562d2849 |
539 | )\r |
540 | /*++\r |
541 | \r |
542 | Routine Description:\r |
543 | \r |
544 | Judge whether the host controller operates well\r |
545 | \r |
546 | Arguments:\r |
547 | \r |
548 | PciIo - EFI_PCI_IO_PROTOCOL\r |
549 | StatusRegAddr - Status register address\r |
550 | \r |
551 | Returns:\r |
552 | \r |
553 | TRUE - Status is good\r |
554 | FALSE - Status is bad\r |
555 | \r |
556 | --*/\r |
557 | ;\r |
878ddf1f |
558 | \r |
559 | BOOLEAN\r |
560 | IsHostSysOrProcessErr (\r |
561 | IN EFI_PCI_IO_PROTOCOL *PciIo,\r |
562 | IN UINT32 StatusRegAddr\r |
562d2849 |
563 | )\r |
564 | /*++\r |
878ddf1f |
565 | \r |
562d2849 |
566 | Routine Description:\r |
567 | \r |
568 | Judge the status is HostSys,ProcessErr error or good\r |
569 | \r |
570 | Arguments:\r |
571 | \r |
572 | PciIo - EFI_PCI_IO_PROTOCOL\r |
573 | StatusRegAddr - Status register address\r |
574 | \r |
575 | Returns:\r |
576 | \r |
577 | TRUE - Status is good\r |
578 | FALSE - Status is bad\r |
579 | \r |
580 | --*/\r |
581 | ;\r |
878ddf1f |
582 | \r |
583 | UINT16\r |
584 | GetCurrentFrameNumber (\r |
585 | IN EFI_PCI_IO_PROTOCOL *PciIo,\r |
562d2849 |
586 | IN UINT32 FrameNumAddrOffset\r |
587 | )\r |
588 | /*++\r |
589 | \r |
590 | Routine Description:\r |
591 | \r |
592 | Get Current Frame Number\r |
593 | \r |
594 | Arguments:\r |
595 | \r |
596 | PciIo - EFI_PCI_IO_PROTOCOL\r |
597 | FrameNumAddrOffset - FrameNum register AddrOffset\r |
598 | \r |
599 | Returns:\r |
600 | \r |
601 | Frame number \r |
602 | \r |
603 | --*/\r |
604 | ;\r |
878ddf1f |
605 | \r |
606 | EFI_STATUS\r |
607 | SetFrameListBaseAddress (\r |
608 | IN EFI_PCI_IO_PROTOCOL *PciIo,\r |
609 | IN UINT32 FLBASEADDRReg,\r |
610 | IN UINT32 Addr\r |
562d2849 |
611 | )\r |
612 | /*++\r |
878ddf1f |
613 | \r |
562d2849 |
614 | Routine Description:\r |
878ddf1f |
615 | \r |
562d2849 |
616 | Set FrameListBase Address\r |
878ddf1f |
617 | \r |
562d2849 |
618 | Arguments:\r |
878ddf1f |
619 | \r |
562d2849 |
620 | PciIo - EFI_PCI_IO_PROTOCOL\r |
621 | FlBaseAddrReg - FrameListBase register\r |
622 | Addr - Address to set\r |
878ddf1f |
623 | \r |
562d2849 |
624 | Returns:\r |
878ddf1f |
625 | \r |
562d2849 |
626 | EFI_SUCCESS\r |
878ddf1f |
627 | \r |
562d2849 |
628 | --*/\r |
629 | ;\r |
878ddf1f |
630 | \r |
562d2849 |
631 | UINT32\r |
632 | GetFrameListBaseAddress (\r |
633 | IN EFI_PCI_IO_PROTOCOL *PciIo,\r |
634 | IN UINT32 FLBAddr\r |
635 | )\r |
636 | /*++\r |
878ddf1f |
637 | \r |
562d2849 |
638 | Routine Description:\r |
878ddf1f |
639 | \r |
562d2849 |
640 | Get Current Frame Number\r |
878ddf1f |
641 | \r |
562d2849 |
642 | Arguments:\r |
878ddf1f |
643 | \r |
562d2849 |
644 | PciIo - EFI_PCI_IO_PROTOCOL\r |
645 | FrameNumAddrOffset - FrameNum register AddrOffset\r |
878ddf1f |
646 | \r |
562d2849 |
647 | Returns:\r |
878ddf1f |
648 | \r |
562d2849 |
649 | Frame number \r |
878ddf1f |
650 | \r |
562d2849 |
651 | --*/\r |
652 | ;\r |
878ddf1f |
653 | \r |
654 | EFI_STATUS\r |
562d2849 |
655 | CreateFrameList (\r |
656 | IN USB_HC_DEV *HcDev,\r |
657 | IN UINT32 FLBASEADDRReg\r |
658 | )\r |
878ddf1f |
659 | /*++\r |
660 | \r |
661 | Routine Description:\r |
662 | \r |
562d2849 |
663 | CreateFrameList\r |
878ddf1f |
664 | \r |
665 | Arguments:\r |
666 | \r |
562d2849 |
667 | HcDev - USB_HC_DEV\r |
668 | FlBaseAddrReg - Frame List register\r |
669 | \r |
878ddf1f |
670 | Returns:\r |
671 | \r |
562d2849 |
672 | EFI_OUT_OF_RESOURCES - Can't allocate memory resources\r |
673 | EFI_UNSUPPORTED - Map memory fail\r |
674 | EFI_SUCCESS - Success\r |
878ddf1f |
675 | \r |
676 | --*/\r |
562d2849 |
677 | ;\r |
878ddf1f |
678 | \r |
679 | EFI_STATUS\r |
562d2849 |
680 | FreeFrameListEntry (\r |
681 | IN USB_HC_DEV *UhcDev\r |
682 | )\r |
878ddf1f |
683 | /*++\r |
684 | \r |
685 | Routine Description:\r |
686 | \r |
562d2849 |
687 | Free FrameList buffer\r |
878ddf1f |
688 | \r |
689 | Arguments:\r |
690 | \r |
562d2849 |
691 | HcDev - USB_HC_DEV\r |
878ddf1f |
692 | \r |
693 | Returns:\r |
694 | \r |
562d2849 |
695 | EFI_SUCCESS - success\r |
878ddf1f |
696 | \r |
697 | --*/\r |
562d2849 |
698 | ;\r |
699 | \r |
700 | VOID\r |
701 | InitFrameList (\r |
702 | IN USB_HC_DEV *HcDev\r |
703 | )\r |
704 | /*++\r |
705 | \r |
706 | Routine Description:\r |
707 | \r |
708 | Initialize FrameList\r |
709 | \r |
710 | Arguments:\r |
711 | \r |
712 | HcDev - USB_HC_DEV\r |
713 | \r |
714 | Returns:\r |
715 | VOID\r |
716 | \r |
717 | --*/\r |
718 | ;\r |
719 | \r |
720 | EFI_STATUS\r |
721 | CreateQH (\r |
722 | IN USB_HC_DEV *HcDev,\r |
723 | OUT QH_STRUCT **pptrQH\r |
724 | )\r |
725 | /*++\r |
726 | \r |
727 | Routine Description:\r |
728 | \r |
729 | CreateQH\r |
730 | \r |
731 | Arguments:\r |
732 | \r |
733 | HcDev - USB_HC_DEV\r |
734 | pptrQH - QH_STRUCT content to return\r |
735 | Returns:\r |
736 | \r |
737 | EFI_SUCCESS - Success\r |
738 | EFI_OUT_OF_RESOURCES - Can't allocate memory\r |
739 | \r |
740 | --*/\r |
741 | ;\r |
742 | \r |
743 | VOID\r |
744 | SetQHHorizontalLinkPtr (\r |
745 | IN QH_STRUCT *ptrQH,\r |
746 | IN VOID *ptrNext\r |
747 | )\r |
748 | /*++\r |
749 | \r |
750 | Routine Description:\r |
751 | \r |
752 | Set QH Horizontal Link Pointer\r |
753 | \r |
754 | Arguments:\r |
755 | \r |
756 | PtrQH - QH_STRUCT\r |
757 | ptrNext - Data to write \r |
758 | \r |
759 | Returns:\r |
760 | \r |
761 | VOID\r |
762 | \r |
763 | --*/\r |
764 | ;\r |
765 | \r |
766 | VOID *\r |
767 | GetQHHorizontalLinkPtr (\r |
768 | IN QH_STRUCT *ptrQH\r |
769 | )\r |
770 | /*++\r |
771 | \r |
772 | Routine Description:\r |
773 | \r |
774 | Get QH Horizontal Link Pointer\r |
775 | \r |
776 | Arguments:\r |
777 | \r |
778 | PtrQH - QH_STRUCT\r |
779 | \r |
780 | \r |
781 | Returns:\r |
782 | \r |
783 | Data to return \r |
784 | \r |
785 | --*/\r |
786 | ;\r |
787 | \r |
788 | VOID\r |
789 | SetQHHorizontalQHorTDSelect (\r |
790 | IN QH_STRUCT *ptrQH,\r |
791 | IN BOOLEAN bQH\r |
792 | )\r |
793 | /*++\r |
794 | \r |
795 | Routine Description:\r |
796 | \r |
797 | Set QH Horizontal QH or TD \r |
798 | \r |
799 | Arguments:\r |
800 | \r |
801 | PtrQH - QH_STRUCT\r |
802 | bQH - TRUE is QH FALSE is TD\r |
803 | \r |
804 | Returns:\r |
805 | VOID\r |
806 | \r |
807 | --*/\r |
808 | ;\r |
809 | \r |
810 | VOID\r |
811 | SetQHHorizontalValidorInvalid (\r |
812 | IN QH_STRUCT *ptrQH,\r |
813 | IN BOOLEAN bValid\r |
814 | )\r |
815 | /*++\r |
816 | \r |
817 | Routine Description:\r |
818 | \r |
819 | Set QH Horizontal Valid or Invalid\r |
820 | \r |
821 | Arguments:\r |
822 | \r |
823 | PtrQH - QH_STRUCT\r |
824 | bValid - TRUE is Valid FALSE is Invalid\r |
825 | \r |
826 | Returns:\r |
827 | VOID\r |
828 | \r |
829 | --*/\r |
830 | ;\r |
831 | \r |
832 | VOID\r |
833 | SetQHVerticalLinkPtr (\r |
834 | IN QH_STRUCT *ptrQH,\r |
835 | IN VOID *ptrNext\r |
836 | )\r |
837 | /*++\r |
838 | \r |
839 | Routine Description:\r |
840 | \r |
841 | Set QH Vertical Link Pointer\r |
842 | \r |
843 | Arguments:\r |
844 | \r |
845 | PtrQH - QH_STRUCT\r |
846 | ptrNext - Data to write\r |
847 | Returns:\r |
848 | \r |
849 | VOID\r |
850 | \r |
851 | --*/\r |
852 | ;\r |
853 | \r |
854 | VOID *\r |
855 | GetQHVerticalLinkPtr (\r |
856 | IN QH_STRUCT *ptrQH\r |
857 | )\r |
858 | /*++\r |
859 | \r |
860 | Routine Description:\r |
861 | \r |
862 | Get QH Vertical Link Pointer\r |
863 | \r |
864 | Arguments:\r |
865 | \r |
866 | PtrQH - QH_STRUCT\r |
867 | \r |
868 | Returns:\r |
869 | \r |
870 | Data to return\r |
871 | \r |
872 | --*/\r |
873 | ;\r |
874 | \r |
875 | VOID\r |
876 | SetQHVerticalQHorTDSelect (\r |
877 | IN QH_STRUCT *ptrQH,\r |
878 | IN BOOLEAN bQH\r |
879 | )\r |
880 | /*++\r |
881 | \r |
882 | Routine Description:\r |
883 | \r |
884 | Set QH Vertical QH or TD\r |
885 | \r |
886 | Arguments:\r |
887 | \r |
888 | PtrQH - QH_STRUCT\r |
889 | bQH - TRUE is QH FALSE is TD\r |
890 | \r |
891 | Returns:\r |
892 | \r |
893 | VOID\r |
894 | \r |
895 | --*/\r |
896 | ;\r |
897 | \r |
898 | BOOLEAN\r |
899 | IsQHHorizontalQHSelect (\r |
900 | IN QH_STRUCT *ptrQH\r |
901 | )\r |
902 | /*++\r |
903 | \r |
904 | Routine Description:\r |
905 | \r |
906 | Is QH Horizontal QH Select\r |
907 | \r |
908 | Arguments:\r |
909 | \r |
910 | PtrQH - QH_STRUCT\r |
911 | \r |
912 | Returns:\r |
913 | \r |
914 | TRUE - QH\r |
915 | FALSE - TD\r |
916 | \r |
917 | --*/\r |
918 | ;\r |
919 | \r |
920 | VOID\r |
921 | SetQHVerticalValidorInvalid (\r |
922 | IN QH_STRUCT *ptrQH,\r |
923 | IN BOOLEAN bValid\r |
924 | )\r |
925 | /*++\r |
926 | \r |
927 | Routine Description:\r |
928 | \r |
929 | Set QH Vertical Valid or Invalid\r |
930 | \r |
931 | Arguments:\r |
932 | \r |
933 | PtrQH - QH_STRUCT\r |
934 | IsValid - TRUE is valid FALSE is invalid\r |
935 | \r |
936 | Returns:\r |
937 | \r |
938 | VOID\r |
939 | \r |
940 | --*/\r |
941 | ;\r |
942 | \r |
943 | BOOLEAN\r |
944 | GetQHVerticalValidorInvalid (\r |
945 | IN QH_STRUCT *ptrQH\r |
946 | )\r |
947 | /*++\r |
948 | \r |
949 | Routine Description:\r |
950 | \r |
951 | Get QH Vertical Valid or Invalid\r |
952 | \r |
953 | Arguments:\r |
954 | \r |
955 | PtrQH - QH_STRUCT\r |
956 | \r |
957 | Returns:\r |
958 | \r |
959 | TRUE - Valid\r |
960 | FALSE - Invalid\r |
961 | \r |
962 | --*/\r |
963 | ;\r |
964 | \r |
965 | EFI_STATUS\r |
966 | AllocateTDStruct (\r |
967 | IN USB_HC_DEV *HcDev,\r |
968 | OUT TD_STRUCT **ppTDStruct\r |
969 | )\r |
970 | /*++\r |
971 | \r |
972 | Routine Description:\r |
973 | \r |
974 | Allocate TD Struct\r |
975 | \r |
976 | Arguments:\r |
977 | \r |
978 | HcDev - USB_HC_DEV\r |
979 | ppTDStruct - place to store TD_STRUCT pointer\r |
980 | Returns:\r |
981 | \r |
982 | EFI_SUCCESS\r |
983 | \r |
984 | --*/\r |
985 | ;\r |
986 | \r |
987 | EFI_STATUS\r |
988 | CreateTD (\r |
989 | IN USB_HC_DEV *HcDev,\r |
990 | OUT TD_STRUCT **pptrTD\r |
991 | )\r |
992 | /*++\r |
993 | \r |
994 | Routine Description:\r |
995 | \r |
996 | Create TD\r |
997 | \r |
998 | Arguments:\r |
999 | \r |
1000 | HcDev - USB_HC_DEV\r |
1001 | pptrTD - TD_STRUCT pointer to store\r |
1002 | \r |
1003 | Returns:\r |
1004 | \r |
1005 | EFI_OUT_OF_RESOURCES - Can't allocate resources\r |
1006 | EFI_SUCCESS - Success\r |
1007 | \r |
1008 | --*/\r |
1009 | ;\r |
878ddf1f |
1010 | \r |
1011 | \r |
1012 | EFI_STATUS\r |
1013 | GenSetupStageTD (\r |
1014 | IN USB_HC_DEV *HcDev,\r |
1015 | IN UINT8 DevAddr,\r |
1016 | IN UINT8 Endpoint,\r |
1017 | IN BOOLEAN bSlow,\r |
1018 | IN UINT8 *pDevReq,\r |
1019 | IN UINT8 RequestLen,\r |
1020 | OUT TD_STRUCT **ppTD\r |
562d2849 |
1021 | )\r |
878ddf1f |
1022 | /*++\r |
1023 | \r |
1024 | Routine Description:\r |
1025 | \r |
1026 | Generate Setup Stage TD\r |
1027 | \r |
1028 | Arguments:\r |
1029 | \r |
1030 | HcDev - USB_HC_DEV\r |
1031 | DevAddr - Device address\r |
1032 | Endpoint - Endpoint number \r |
1033 | bSlow - Full speed or low speed\r |
1034 | pDevReq - Device request\r |
1035 | RequestLen - Request length\r |
1036 | ppTD - TD_STRUCT to return\r |
1037 | Returns:\r |
1038 | \r |
1039 | EFI_OUT_OF_RESOURCES - Can't allocate memory\r |
1040 | EFI_SUCCESS - Success\r |
1041 | \r |
1042 | --*/\r |
562d2849 |
1043 | ;\r |
878ddf1f |
1044 | \r |
1045 | EFI_STATUS\r |
1046 | GenDataTD (\r |
1047 | IN USB_HC_DEV *HcDev,\r |
1048 | IN UINT8 DevAddr,\r |
1049 | IN UINT8 Endpoint,\r |
1050 | IN UINT8 *pData,\r |
1051 | IN UINT8 Len,\r |
1052 | IN UINT8 PktID,\r |
1053 | IN UINT8 Toggle,\r |
1054 | IN BOOLEAN bSlow,\r |
1055 | OUT TD_STRUCT **ppTD\r |
562d2849 |
1056 | )\r |
878ddf1f |
1057 | /*++\r |
1058 | \r |
1059 | Routine Description:\r |
1060 | \r |
1061 | Generate Data Stage TD\r |
1062 | \r |
1063 | Arguments:\r |
1064 | \r |
1065 | HcDev - USB_HC_DEV\r |
1066 | DevAddr - Device address\r |
1067 | Endpoint - Endpoint number \r |
1068 | pData - Data buffer \r |
1069 | Len - Data length\r |
1070 | PktID - Packet ID\r |
1071 | Toggle - Data toggle value\r |
1072 | bSlow - Full speed or low speed\r |
1073 | ppTD - TD_STRUCT to return\r |
1074 | Returns:\r |
1075 | \r |
1076 | EFI_OUT_OF_RESOURCES - Can't allocate memory\r |
1077 | EFI_SUCCESS - Success\r |
1078 | \r |
1079 | --*/\r |
562d2849 |
1080 | ;\r |
878ddf1f |
1081 | \r |
1082 | EFI_STATUS\r |
1083 | CreateStatusTD (\r |
1084 | IN USB_HC_DEV *HcDev,\r |
1085 | IN UINT8 DevAddr,\r |
1086 | IN UINT8 Endpoint,\r |
1087 | IN UINT8 PktID,\r |
1088 | IN BOOLEAN bSlow,\r |
1089 | OUT TD_STRUCT **ppTD\r |
562d2849 |
1090 | )\r |
878ddf1f |
1091 | /*++\r |
1092 | \r |
1093 | Routine Description:\r |
1094 | \r |
1095 | Generate Setup Stage TD\r |
1096 | \r |
1097 | Arguments:\r |
1098 | \r |
1099 | HcDev - USB_HC_DEV\r |
1100 | DevAddr - Device address\r |
1101 | Endpoint - Endpoint number \r |
1102 | bSlow - Full speed or low speed\r |
1103 | pDevReq - Device request\r |
1104 | RequestLen - Request length\r |
1105 | ppTD - TD_STRUCT to return\r |
1106 | Returns:\r |
1107 | \r |
1108 | EFI_OUT_OF_RESOURCES - Can't allocate memory\r |
1109 | EFI_SUCCESS - Success\r |
1110 | \r |
1111 | --*/\r |
562d2849 |
1112 | ;\r |
878ddf1f |
1113 | \r |
1114 | VOID\r |
1115 | SetTDLinkPtrValidorInvalid (\r |
1116 | IN TD_STRUCT *ptrTDStruct,\r |
1117 | IN BOOLEAN bValid\r |
562d2849 |
1118 | )\r |
1119 | /*++\r |
1120 | \r |
1121 | Routine Description:\r |
1122 | \r |
1123 | Set TD Link Pointer Valid or Invalid\r |
1124 | \r |
1125 | Arguments:\r |
1126 | \r |
1127 | ptrTDStruct - TD_STRUCT\r |
1128 | bValid - TRUE is valid FALSE is invalid\r |
1129 | \r |
1130 | Returns:\r |
1131 | \r |
1132 | VOID\r |
1133 | \r |
1134 | --*/\r |
1135 | ;\r |
878ddf1f |
1136 | \r |
1137 | VOID\r |
1138 | SetTDLinkPtrQHorTDSelect (\r |
1139 | IN TD_STRUCT *ptrTDStruct,\r |
1140 | IN BOOLEAN bQH\r |
562d2849 |
1141 | )\r |
1142 | /*++\r |
1143 | \r |
1144 | Routine Description:\r |
1145 | \r |
1146 | Set TD Link Pointer QH or TD Select\r |
1147 | \r |
1148 | Arguments:\r |
1149 | \r |
1150 | ptrTDStruct - TD_STRUCT\r |
1151 | bQH - TRUE is QH FALSE is TD\r |
1152 | \r |
1153 | Returns:\r |
1154 | \r |
1155 | VOID\r |
1156 | \r |
1157 | --*/\r |
1158 | ;\r |
878ddf1f |
1159 | \r |
1160 | VOID\r |
1161 | SetTDLinkPtrDepthorBreadth (\r |
1162 | IN TD_STRUCT *ptrTDStruct,\r |
1163 | IN BOOLEAN bDepth\r |
562d2849 |
1164 | )\r |
1165 | /*++\r |
1166 | \r |
1167 | Routine Description:\r |
1168 | \r |
1169 | Set TD Link Pointer depth or bread priority\r |
1170 | \r |
1171 | Arguments:\r |
1172 | \r |
1173 | ptrTDStruct - TD_STRUCT\r |
1174 | bDepth - TRUE is Depth FALSE is Breadth\r |
1175 | \r |
1176 | Returns:\r |
1177 | \r |
1178 | VOID\r |
1179 | \r |
1180 | --*/\r |
1181 | ;\r |
878ddf1f |
1182 | \r |
1183 | VOID\r |
1184 | SetTDLinkPtr (\r |
1185 | IN TD_STRUCT *ptrTDStruct,\r |
1186 | IN VOID *ptrNext\r |
562d2849 |
1187 | )\r |
1188 | /*++\r |
1189 | \r |
1190 | Routine Description:\r |
1191 | \r |
1192 | Set TD Link Pointer\r |
878ddf1f |
1193 | \r |
562d2849 |
1194 | Arguments:\r |
1195 | \r |
1196 | ptrTDStruct - TD_STRUCT\r |
1197 | ptrNext - Pointer to set\r |
1198 | \r |
1199 | Returns:\r |
1200 | \r |
1201 | VOID\r |
1202 | \r |
1203 | --*/\r |
1204 | ;\r |
1205 | \r |
1206 | VOID *\r |
878ddf1f |
1207 | GetTDLinkPtr (\r |
1208 | IN TD_STRUCT *ptrTDStruct\r |
562d2849 |
1209 | )\r |
1210 | /*++\r |
1211 | \r |
1212 | Routine Description:\r |
1213 | \r |
1214 | Get TD Link Pointer\r |
1215 | \r |
1216 | Arguments:\r |
1217 | \r |
1218 | ptrTDStruct - TD_STRUCT\r |
1219 | \r |
1220 | Returns:\r |
1221 | \r |
1222 | Pointer to get\r |
1223 | \r |
1224 | --*/\r |
1225 | ;\r |
878ddf1f |
1226 | \r |
1227 | VOID\r |
1228 | EnableorDisableTDShortPacket (\r |
1229 | IN TD_STRUCT *ptrTDStruct,\r |
1230 | IN BOOLEAN bEnable\r |
562d2849 |
1231 | )\r |
1232 | /*++\r |
1233 | \r |
1234 | Routine Description:\r |
1235 | \r |
1236 | Enable or Disable TD ShortPacket\r |
1237 | \r |
1238 | Arguments:\r |
1239 | \r |
1240 | ptrTDStruct - TD_STRUCT\r |
1241 | bEnable - TRUE is Enanble FALSE is Disable\r |
1242 | \r |
1243 | Returns:\r |
1244 | \r |
1245 | VOID\r |
1246 | \r |
1247 | --*/\r |
1248 | ;\r |
878ddf1f |
1249 | \r |
1250 | VOID\r |
1251 | SetTDControlErrorCounter (\r |
1252 | IN TD_STRUCT *ptrTDStruct,\r |
1253 | IN UINT8 nMaxErrors\r |
562d2849 |
1254 | )\r |
1255 | /*++\r |
1256 | \r |
1257 | Routine Description:\r |
1258 | \r |
1259 | Set TD Control ErrorCounter\r |
1260 | \r |
1261 | Arguments:\r |
1262 | \r |
1263 | ptrTDStruct - TD_STRUCT\r |
1264 | nMaxErrors - Error counter number\r |
1265 | \r |
1266 | Returns:\r |
1267 | \r |
1268 | VOID\r |
1269 | \r |
1270 | --*/\r |
1271 | ;\r |
878ddf1f |
1272 | \r |
1273 | VOID\r |
1274 | SetTDLoworFullSpeedDevice (\r |
1275 | IN TD_STRUCT *ptrTDStruct,\r |
1276 | IN BOOLEAN bLowSpeedDevice\r |
562d2849 |
1277 | )\r |
1278 | /*++\r |
1279 | \r |
1280 | Routine Description:\r |
1281 | \r |
1282 | Set TD status low speed or full speed\r |
1283 | \r |
1284 | Arguments:\r |
1285 | \r |
1286 | ptrTDStruct - A point to TD_STRUCT\r |
1287 | bLowSpeedDevice - Show low speed or full speed\r |
1288 | \r |
1289 | Returns:\r |
1290 | \r |
1291 | VOID\r |
1292 | \r |
1293 | --*/\r |
1294 | ;\r |
878ddf1f |
1295 | \r |
1296 | VOID\r |
1297 | SetTDControlIsochronousorNot (\r |
1298 | IN TD_STRUCT *ptrTDStruct,\r |
1299 | IN BOOLEAN bIsochronous\r |
562d2849 |
1300 | )\r |
1301 | /*++\r |
1302 | \r |
1303 | Routine Description:\r |
1304 | \r |
1305 | Set TD status Isochronous or not\r |
1306 | \r |
1307 | Arguments:\r |
1308 | \r |
1309 | ptrTDStruct - A point to TD_STRUCT\r |
1310 | IsIsochronous - Show Isochronous or not\r |
1311 | \r |
1312 | Returns:\r |
1313 | \r |
1314 | VOID\r |
1315 | \r |
1316 | --*/\r |
1317 | ;\r |
878ddf1f |
1318 | \r |
1319 | VOID\r |
1320 | SetorClearTDControlIOC (\r |
1321 | IN TD_STRUCT *ptrTDStruct,\r |
1322 | IN BOOLEAN bSet\r |
562d2849 |
1323 | )\r |
1324 | /*++\r |
1325 | \r |
1326 | Routine Description:\r |
1327 | \r |
1328 | Set TD status IOC IsSet\r |
1329 | \r |
1330 | Arguments:\r |
1331 | \r |
1332 | ptrTDStruct - A point to TD_STRUCT\r |
1333 | IsSet - Show IOC set or not\r |
1334 | \r |
1335 | Returns:\r |
1336 | \r |
1337 | VOID\r |
1338 | \r |
1339 | --*/\r |
1340 | ;\r |
878ddf1f |
1341 | \r |
1342 | VOID\r |
1343 | SetTDStatusActiveorInactive (\r |
1344 | IN TD_STRUCT *ptrTDStruct,\r |
1345 | IN BOOLEAN bActive\r |
562d2849 |
1346 | )\r |
1347 | /*++\r |
1348 | \r |
1349 | Routine Description:\r |
1350 | \r |
1351 | Set TD status active or not\r |
1352 | Arguments:\r |
1353 | \r |
1354 | ptrTDStruct - A point to TD_STRUCT\r |
1355 | IsActive - Active or not\r |
1356 | \r |
1357 | Returns:\r |
1358 | \r |
1359 | VOID\r |
1360 | \r |
1361 | --*/\r |
1362 | ;\r |
878ddf1f |
1363 | \r |
1364 | UINT16\r |
1365 | SetTDTokenMaxLength (\r |
1366 | IN TD_STRUCT *ptrTDStruct,\r |
1367 | IN UINT16 nMaxLen\r |
562d2849 |
1368 | )\r |
1369 | /*++\r |
1370 | \r |
1371 | Routine Description:\r |
1372 | \r |
1373 | Set TD Token maxlength\r |
1374 | \r |
1375 | Arguments:\r |
1376 | \r |
1377 | ptrTDStruct - A point to TD_STRUCT\r |
1378 | MaximumLength - Maximum length of TD Token\r |
1379 | \r |
1380 | Returns:\r |
1381 | \r |
1382 | Real maximum length set to TD Token\r |
1383 | \r |
1384 | --*/\r |
1385 | ;\r |
878ddf1f |
1386 | \r |
1387 | VOID\r |
1388 | SetTDTokenDataToggle1 (\r |
1389 | IN TD_STRUCT *ptrTDStruct\r |
562d2849 |
1390 | )\r |
1391 | /*++\r |
1392 | \r |
1393 | Routine Description:\r |
1394 | \r |
1395 | Set TD Token data toggle1\r |
1396 | \r |
1397 | Arguments:\r |
1398 | \r |
1399 | ptrTDStruct - A point to TD_STRUCT\r |
1400 | \r |
1401 | Returns:\r |
1402 | \r |
1403 | VOID\r |
1404 | \r |
1405 | --*/\r |
1406 | ;\r |
878ddf1f |
1407 | \r |
1408 | VOID\r |
1409 | SetTDTokenDataToggle0 (\r |
1410 | IN TD_STRUCT *ptrTDStruct\r |
562d2849 |
1411 | )\r |
1412 | /*++\r |
1413 | \r |
1414 | Routine Description:\r |
1415 | \r |
1416 | Set TD Token data toggle0\r |
1417 | \r |
1418 | Arguments:\r |
1419 | \r |
1420 | ptrTDStruct - A point to TD_STRUCT\r |
1421 | \r |
1422 | Returns:\r |
1423 | \r |
1424 | VOID\r |
1425 | \r |
1426 | --*/\r |
1427 | ;\r |
878ddf1f |
1428 | \r |
1429 | UINT8\r |
1430 | GetTDTokenDataToggle (\r |
1431 | IN TD_STRUCT *ptrTDStruct\r |
562d2849 |
1432 | )\r |
1433 | /*++\r |
1434 | \r |
1435 | Routine Description:\r |
1436 | \r |
1437 | Get TD Token data toggle\r |
1438 | \r |
1439 | Arguments:\r |
1440 | \r |
1441 | ptrTDStruct - A point to TD_STRUCT\r |
1442 | \r |
1443 | Returns:\r |
1444 | \r |
1445 | data toggle value\r |
1446 | \r |
1447 | --*/\r |
1448 | ;\r |
878ddf1f |
1449 | \r |
1450 | VOID\r |
1451 | SetTDTokenEndPoint (\r |
1452 | IN TD_STRUCT *ptrTDStruct,\r |
1453 | IN UINTN nEndPoint\r |
562d2849 |
1454 | )\r |
1455 | /*++\r |
1456 | \r |
1457 | Routine Description:\r |
1458 | \r |
1459 | Set Data Token endpoint number\r |
1460 | \r |
1461 | Arguments:\r |
1462 | \r |
1463 | ptrTDStruct - A point to TD_STRUCT\r |
1464 | EndPoint - End point number\r |
1465 | \r |
1466 | Returns:\r |
1467 | \r |
1468 | VOID\r |
1469 | \r |
1470 | --*/\r |
1471 | ;\r |
878ddf1f |
1472 | \r |
1473 | VOID\r |
1474 | SetTDTokenDeviceAddress (\r |
1475 | IN TD_STRUCT *ptrTDStruct,\r |
1476 | IN UINTN nDevAddr\r |
562d2849 |
1477 | )\r |
1478 | /*++\r |
1479 | \r |
1480 | Routine Description:\r |
1481 | \r |
1482 | Set TD Token device address\r |
1483 | \r |
1484 | Arguments:\r |
1485 | \r |
1486 | ptrTDStruct - A point to TD_STRUCT\r |
1487 | DeviceAddress - Device address\r |
1488 | \r |
1489 | Returns:\r |
1490 | \r |
1491 | VOID\r |
1492 | \r |
1493 | --*/\r |
1494 | ;\r |
878ddf1f |
1495 | \r |
1496 | VOID\r |
1497 | SetTDTokenPacketID (\r |
1498 | IN TD_STRUCT *ptrTDStruct,\r |
1499 | IN UINT8 nPID\r |
562d2849 |
1500 | )\r |
1501 | /*++\r |
1502 | \r |
1503 | Routine Description:\r |
1504 | \r |
1505 | Set TD Token packet ID\r |
1506 | \r |
1507 | Arguments:\r |
1508 | \r |
1509 | ptrTDStruct - A point to TD_STRUCT\r |
1510 | PID - Packet ID\r |
1511 | \r |
1512 | Returns:\r |
1513 | \r |
1514 | VOID\r |
1515 | \r |
1516 | --*/\r |
1517 | ;\r |
878ddf1f |
1518 | \r |
1519 | VOID\r |
1520 | SetTDDataBuffer (\r |
1521 | IN TD_STRUCT *ptrTDStruct\r |
562d2849 |
1522 | )\r |
1523 | /*++\r |
1524 | \r |
1525 | Routine Description:\r |
1526 | \r |
1527 | Set TD data buffer\r |
1528 | \r |
1529 | Arguments:\r |
1530 | \r |
1531 | ptrTDStruct - A point to TD_STRUCT\r |
1532 | \r |
1533 | Returns:\r |
1534 | \r |
1535 | VOID\r |
1536 | \r |
1537 | --*/\r |
1538 | ;\r |
878ddf1f |
1539 | \r |
1540 | BOOLEAN\r |
1541 | IsTDStatusActive (\r |
1542 | IN TD_STRUCT *ptrTDStruct\r |
562d2849 |
1543 | )\r |
1544 | /*++\r |
1545 | \r |
1546 | Routine Description:\r |
1547 | \r |
1548 | Indicate whether TD status active or not\r |
1549 | \r |
1550 | Arguments:\r |
1551 | \r |
1552 | ptrTDStruct - A point to TD_STRUCT\r |
1553 | \r |
1554 | Returns:\r |
1555 | \r |
1556 | TRUE - Active\r |
1557 | FALSE - Inactive \r |
1558 | \r |
1559 | --*/\r |
1560 | ;\r |
878ddf1f |
1561 | \r |
1562 | BOOLEAN\r |
1563 | IsTDStatusStalled (\r |
1564 | IN TD_STRUCT *ptrTDStruct\r |
562d2849 |
1565 | )\r |
1566 | /*++\r |
1567 | \r |
1568 | Routine Description:\r |
1569 | \r |
1570 | Indicate whether TD status stalled or not\r |
1571 | \r |
1572 | Arguments:\r |
1573 | \r |
1574 | ptrTDStruct - A point to TD_STRUCT\r |
1575 | \r |
1576 | Returns:\r |
1577 | \r |
1578 | TRUE - Stalled\r |
1579 | FALSE - not stalled\r |
1580 | \r |
1581 | --*/\r |
1582 | ;\r |
878ddf1f |
1583 | \r |
1584 | BOOLEAN\r |
1585 | IsTDStatusBufferError (\r |
1586 | IN TD_STRUCT *ptrTDStruct\r |
562d2849 |
1587 | )\r |
1588 | /*++\r |
1589 | \r |
1590 | Routine Description:\r |
1591 | \r |
1592 | Indicate whether TD status buffer error or not\r |
1593 | \r |
1594 | Arguments:\r |
1595 | \r |
1596 | ptrTDStruct - A point to TD_STRUCT\r |
1597 | \r |
1598 | Returns:\r |
1599 | \r |
1600 | TRUE - Buffer error\r |
1601 | FALSE - No error\r |
1602 | \r |
1603 | --*/\r |
1604 | ;\r |
878ddf1f |
1605 | \r |
1606 | BOOLEAN\r |
1607 | IsTDStatusBabbleError (\r |
1608 | IN TD_STRUCT *ptrTDStruct\r |
562d2849 |
1609 | )\r |
1610 | /*++\r |
1611 | \r |
1612 | Routine Description:\r |
1613 | \r |
1614 | Indicate whether TD status babble error or not\r |
1615 | \r |
1616 | Arguments:\r |
1617 | \r |
1618 | ptrTDStruct - A point to TD_STRUCT\r |
1619 | \r |
1620 | Returns:\r |
1621 | \r |
1622 | TRUE - Babble error\r |
1623 | FALSE - No error\r |
1624 | \r |
1625 | --*/\r |
1626 | ;\r |
878ddf1f |
1627 | \r |
1628 | BOOLEAN\r |
1629 | IsTDStatusNAKReceived (\r |
1630 | IN TD_STRUCT *ptrTDStruct\r |
562d2849 |
1631 | )\r |
1632 | /*++\r |
1633 | \r |
1634 | Routine Description:\r |
1635 | \r |
1636 | Indicate whether TD status NAK received\r |
1637 | Arguments:\r |
1638 | \r |
1639 | ptrTDStruct - A point to TD_STRUCT\r |
1640 | \r |
1641 | Returns:\r |
1642 | \r |
1643 | TRUE - NAK received\r |
1644 | FALSE - NAK not received\r |
1645 | \r |
1646 | --*/\r |
1647 | ;\r |
878ddf1f |
1648 | \r |
1649 | BOOLEAN\r |
1650 | IsTDStatusCRCTimeOutError (\r |
1651 | IN TD_STRUCT *ptrTDStruct\r |
562d2849 |
1652 | )\r |
1653 | /*++\r |
1654 | \r |
1655 | Routine Description:\r |
1656 | \r |
1657 | Indicate whether TD status CRC timeout error or not\r |
1658 | \r |
1659 | Arguments:\r |
1660 | \r |
1661 | ptrTDStruct - A point to TD_STRUCT\r |
1662 | \r |
1663 | Returns:\r |
1664 | \r |
1665 | TRUE - CRC timeout error\r |
1666 | FALSE - CRC timeout no error\r |
1667 | \r |
1668 | --*/\r |
1669 | ;\r |
878ddf1f |
1670 | \r |
1671 | BOOLEAN\r |
1672 | IsTDStatusBitStuffError (\r |
1673 | IN TD_STRUCT *ptrTDStruct\r |
562d2849 |
1674 | )\r |
1675 | /*++\r |
1676 | \r |
1677 | Routine Description:\r |
1678 | \r |
1679 | Indicate whether TD status bit stuff error or not\r |
1680 | \r |
1681 | Arguments:\r |
1682 | \r |
1683 | ptrTDStruct - A point to TD_STRUCT\r |
1684 | \r |
1685 | Returns:\r |
1686 | \r |
1687 | TRUE - Bit stuff error\r |
1688 | FALSE - Bit stuff no error\r |
1689 | \r |
1690 | --*/\r |
1691 | ;\r |
878ddf1f |
1692 | \r |
1693 | UINT16\r |
1694 | GetTDStatusActualLength (\r |
1695 | IN TD_STRUCT *ptrTDStruct\r |
562d2849 |
1696 | )\r |
1697 | /*++\r |
1698 | \r |
1699 | Routine Description:\r |
1700 | \r |
1701 | Get TD status length\r |
1702 | \r |
1703 | Arguments:\r |
1704 | \r |
1705 | ptrTDStruct - A point to TD_STRUCT\r |
1706 | \r |
1707 | Returns:\r |
1708 | \r |
1709 | Return Td status length\r |
1710 | \r |
1711 | --*/\r |
1712 | ;\r |
878ddf1f |
1713 | \r |
1714 | UINT16\r |
1715 | GetTDTokenMaxLength (\r |
1716 | IN TD_STRUCT *ptrTDStruct\r |
562d2849 |
1717 | )\r |
1718 | /*++\r |
1719 | \r |
1720 | Routine Description:\r |
1721 | \r |
1722 | Get TD Token maximum length\r |
1723 | \r |
1724 | Arguments:\r |
1725 | \r |
1726 | ptrTDStruct - A point to TD_STRUCT\r |
1727 | \r |
1728 | Returns:\r |
1729 | \r |
1730 | Return TD token maximum length\r |
1731 | \r |
1732 | --*/\r |
1733 | ;\r |
878ddf1f |
1734 | \r |
1735 | UINT8\r |
1736 | GetTDTokenEndPoint (\r |
1737 | IN TD_STRUCT *ptrTDStruct\r |
562d2849 |
1738 | )\r |
1739 | /*++\r |
1740 | \r |
1741 | Routine Description:\r |
1742 | \r |
1743 | Get TD Token endpoint number\r |
1744 | \r |
1745 | Arguments:\r |
1746 | \r |
1747 | ptrTDStruct - A point to TD_STRUCT\r |
1748 | \r |
1749 | Returns:\r |
1750 | \r |
1751 | Return TD Token endpoint number\r |
1752 | \r |
1753 | --*/\r |
1754 | ;\r |
878ddf1f |
1755 | \r |
1756 | UINT8\r |
1757 | GetTDTokenDeviceAddress (\r |
1758 | IN TD_STRUCT *ptrTDStruct\r |
562d2849 |
1759 | )\r |
1760 | /*++\r |
1761 | \r |
1762 | Routine Description:\r |
1763 | \r |
1764 | Get TD Token device address\r |
1765 | \r |
1766 | Arguments:\r |
1767 | \r |
1768 | ptrTDStruct - A point to TD_STRUCT\r |
1769 | \r |
1770 | Returns:\r |
1771 | \r |
1772 | Return TD Token device address\r |
1773 | \r |
1774 | --*/\r |
1775 | ;\r |
878ddf1f |
1776 | \r |
1777 | UINT8\r |
1778 | GetTDTokenPacketID (\r |
1779 | IN TD_STRUCT *ptrTDStruct\r |
562d2849 |
1780 | )\r |
1781 | /*++\r |
1782 | \r |
1783 | Routine Description:\r |
1784 | \r |
1785 | Get TD Token packet ID\r |
1786 | \r |
1787 | Arguments:\r |
1788 | \r |
1789 | ptrTDStruct - A point to TD_STRUCT\r |
878ddf1f |
1790 | \r |
562d2849 |
1791 | Returns:\r |
1792 | \r |
1793 | Return TD Token packet ID\r |
1794 | \r |
1795 | --*/\r |
1796 | ;\r |
1797 | \r |
1798 | UINT8 *\r |
878ddf1f |
1799 | GetTDDataBuffer (\r |
1800 | IN TD_STRUCT *ptrTDStruct\r |
562d2849 |
1801 | )\r |
1802 | /*++\r |
1803 | \r |
1804 | Routine Description:\r |
1805 | \r |
1806 | Get the point to TD data buffer\r |
1807 | \r |
1808 | Arguments:\r |
1809 | \r |
1810 | ptrTDStruct - A point to TD_STRUCT\r |
1811 | \r |
1812 | Returns:\r |
1813 | \r |
1814 | Return a point to TD data buffer\r |
1815 | \r |
1816 | --*/\r |
1817 | ;\r |
878ddf1f |
1818 | \r |
1819 | BOOLEAN\r |
1820 | GetTDLinkPtrValidorInvalid (\r |
1821 | IN TD_STRUCT *ptrTDStruct\r |
562d2849 |
1822 | )\r |
1823 | /*++\r |
1824 | \r |
1825 | Routine Description:\r |
1826 | \r |
1827 | Get TD LinkPtr valid or not\r |
1828 | \r |
1829 | Arguments:\r |
1830 | \r |
1831 | ptrTDStruct - A point to TD_STRUCT\r |
1832 | \r |
1833 | Returns:\r |
1834 | \r |
1835 | TRUE - Invalid\r |
1836 | FALSE - Valid\r |
1837 | \r |
1838 | --*/\r |
1839 | ;\r |
878ddf1f |
1840 | \r |
1841 | UINTN\r |
1842 | CountTDsNumber (\r |
1843 | IN TD_STRUCT *ptrFirstTD\r |
562d2849 |
1844 | )\r |
1845 | /*++\r |
1846 | \r |
1847 | Routine Description:\r |
1848 | \r |
1849 | Get the number of TDs\r |
1850 | \r |
1851 | Arguments:\r |
1852 | \r |
1853 | PtrFirstTD - A point to the first TD_STRUCT\r |
1854 | \r |
1855 | Returns:\r |
1856 | \r |
1857 | Return the number of TDs\r |
1858 | \r |
1859 | --*/\r |
1860 | ;\r |
878ddf1f |
1861 | \r |
1862 | VOID\r |
1863 | LinkTDToQH (\r |
1864 | IN QH_STRUCT *ptrQH,\r |
1865 | IN TD_STRUCT *ptrTD\r |
562d2849 |
1866 | )\r |
1867 | /*++\r |
1868 | \r |
1869 | Routine Description:\r |
1870 | \r |
1871 | Link TD To QH\r |
1872 | \r |
1873 | Arguments:\r |
1874 | \r |
1875 | PtrQH - QH_STRUCT\r |
1876 | PtrTD - TD_STRUCT\r |
1877 | Returns:\r |
1878 | \r |
1879 | VOID\r |
1880 | \r |
1881 | --*/\r |
1882 | ;\r |
878ddf1f |
1883 | \r |
1884 | VOID\r |
1885 | LinkTDToTD (\r |
1886 | IN TD_STRUCT *ptrPreTD,\r |
1887 | IN TD_STRUCT *ptrTD\r |
562d2849 |
1888 | )\r |
1889 | /*++\r |
1890 | \r |
1891 | Routine Description:\r |
1892 | \r |
1893 | Link TD To TD\r |
1894 | \r |
1895 | Arguments:\r |
1896 | \r |
1897 | ptrPreTD - Previous TD_STRUCT to be linked\r |
1898 | PtrTD - TD_STRUCT to link\r |
1899 | Returns:\r |
1900 | \r |
1901 | VOID\r |
1902 | \r |
1903 | --*/\r |
1904 | ;\r |
878ddf1f |
1905 | \r |
1906 | VOID\r |
1907 | SetorClearCurFrameListTerminate (\r |
1908 | IN FRAMELIST_ENTRY *pCurEntry,\r |
1909 | IN BOOLEAN bSet\r |
562d2849 |
1910 | )\r |
1911 | /*++\r |
1912 | \r |
1913 | Routine Description:\r |
1914 | \r |
1915 | Set or clear current framelist terminate\r |
1916 | \r |
1917 | Arguments:\r |
1918 | \r |
1919 | pCurEntry - A point to FRAMELIST_ENTITY\r |
1920 | IsSet - TRUE to empty the frame and indicate the Pointer field is valid\r |
1921 | \r |
1922 | Returns:\r |
1923 | \r |
1924 | VOID\r |
1925 | \r |
1926 | --*/\r |
1927 | ;\r |
1928 | \r |
1929 | VOID\r |
1930 | SetCurFrameListQHorTD (\r |
1931 | IN FRAMELIST_ENTRY *pCurEntry,\r |
1932 | IN BOOLEAN bQH\r |
1933 | )\r |
1934 | /*++\r |
1935 | \r |
1936 | Routine Description:\r |
1937 | \r |
1938 | Set current framelist QH or TD\r |
1939 | \r |
1940 | Arguments:\r |
1941 | \r |
1942 | pCurEntry - A point to FRAMELIST_ENTITY\r |
1943 | IsQH - TRUE to set QH and FALSE to set TD\r |
1944 | \r |
1945 | Returns:\r |
878ddf1f |
1946 | \r |
562d2849 |
1947 | VOID\r |
1948 | \r |
1949 | --*/\r |
1950 | ;\r |
878ddf1f |
1951 | \r |
1952 | BOOLEAN\r |
1953 | GetCurFrameListTerminate (\r |
1954 | IN FRAMELIST_ENTRY *pCurEntry\r |
562d2849 |
1955 | )\r |
1956 | /*++\r |
1957 | \r |
1958 | Routine Description:\r |
1959 | \r |
1960 | Get current framelist terminate\r |
1961 | \r |
1962 | Arguments:\r |
1963 | \r |
1964 | pCurEntry - A point to FRAMELIST_ENTITY\r |
1965 | \r |
1966 | Returns:\r |
1967 | \r |
1968 | TRUE - Terminate\r |
1969 | FALSE - Not terminate\r |
1970 | \r |
1971 | --*/\r |
1972 | ;\r |
878ddf1f |
1973 | \r |
1974 | VOID\r |
1975 | SetCurFrameListPointer (\r |
1976 | IN FRAMELIST_ENTRY *pCurEntry,\r |
1977 | IN UINT8 *ptr\r |
562d2849 |
1978 | )\r |
1979 | /*++\r |
1980 | \r |
1981 | Routine Description:\r |
1982 | \r |
1983 | Set current framelist pointer\r |
1984 | \r |
1985 | Arguments:\r |
1986 | \r |
1987 | pCurEntry - A point to FRAMELIST_ENTITY\r |
1988 | ptr - A point to FrameListPtr point to\r |
1989 | \r |
1990 | Returns:\r |
1991 | \r |
1992 | VOID\r |
1993 | \r |
1994 | --*/\r |
1995 | ;\r |
878ddf1f |
1996 | \r |
562d2849 |
1997 | VOID *\r |
878ddf1f |
1998 | GetCurFrameListPointer (\r |
1999 | IN FRAMELIST_ENTRY *pCurEntry\r |
562d2849 |
2000 | )\r |
2001 | /*++\r |
2002 | \r |
2003 | Routine Description:\r |
2004 | \r |
2005 | Get current framelist pointer\r |
2006 | \r |
2007 | Arguments:\r |
2008 | \r |
2009 | pCurEntry - A point to FRAMELIST_ENTITY\r |
2010 | \r |
2011 | Returns:\r |
2012 | \r |
2013 | A point FrameListPtr point to\r |
2014 | \r |
2015 | --*/\r |
2016 | ;\r |
878ddf1f |
2017 | \r |
2018 | VOID\r |
2019 | LinkQHToFrameList (\r |
2020 | IN FRAMELIST_ENTRY *pEntry,\r |
2021 | IN UINT16 FrameListIndex,\r |
2022 | IN QH_STRUCT *ptrQH\r |
562d2849 |
2023 | )\r |
878ddf1f |
2024 | /*++\r |
2025 | \r |
2026 | Routine Description:\r |
2027 | \r |
2028 | Link QH To Frame List\r |
2029 | \r |
2030 | Arguments:\r |
2031 | \r |
2032 | pEntry - FRAMELIST_ENTRY\r |
2033 | FrameListIndex - Frame List Index\r |
2034 | PtrQH - QH to link \r |
2035 | Returns:\r |
2036 | \r |
2037 | VOID\r |
2038 | \r |
2039 | --*/\r |
562d2849 |
2040 | ;\r |
878ddf1f |
2041 | \r |
2042 | VOID\r |
2043 | DelLinkSingleQH (\r |
2044 | IN USB_HC_DEV *HcDev,\r |
2045 | IN QH_STRUCT *ptrQH,\r |
2046 | IN UINT16 FrameListIndex,\r |
2047 | IN BOOLEAN SearchOther,\r |
2048 | IN BOOLEAN Delete\r |
562d2849 |
2049 | )\r |
2050 | /*++\r |
2051 | \r |
2052 | Routine Description:\r |
2053 | \r |
2054 | Unlink from frame list and delete single QH\r |
2055 | \r |
2056 | Arguments:\r |
2057 | \r |
2058 | HcDev - USB_HC_DEV\r |
2059 | PtrQH - QH_STRUCT\r |
2060 | FrameListIndex - Frame List Index\r |
2061 | SearchOther - Search Other QH\r |
2062 | Delete - TRUE is to delete the QH\r |
2063 | \r |
2064 | Returns:\r |
2065 | \r |
2066 | VOID\r |
2067 | \r |
2068 | --*/\r |
2069 | ;\r |
878ddf1f |
2070 | \r |
2071 | VOID\r |
2072 | DeleteQueuedTDs (\r |
2073 | IN USB_HC_DEV *HcDev,\r |
2074 | IN TD_STRUCT *ptrFirstTD\r |
562d2849 |
2075 | )\r |
2076 | /*++\r |
2077 | \r |
2078 | Routine Description:\r |
2079 | \r |
2080 | Delete Queued TDs\r |
2081 | \r |
2082 | Arguments:\r |
2083 | \r |
2084 | HcDev - USB_HC_DEV\r |
2085 | PtrFirstTD - TD link list head\r |
2086 | \r |
2087 | Returns:\r |
2088 | \r |
2089 | VOID\r |
2090 | \r |
2091 | --*/\r |
2092 | ;\r |
878ddf1f |
2093 | \r |
2094 | VOID\r |
2095 | InsertQHTDToINTList (\r |
2096 | IN USB_HC_DEV *HcDev,\r |
2097 | IN QH_STRUCT *ptrQH,\r |
2098 | IN TD_STRUCT *ptrFirstTD,\r |
2099 | IN UINT8 DeviceAddress,\r |
2100 | IN UINT8 EndPointAddress,\r |
2101 | IN UINT8 DataToggle,\r |
2102 | IN UINTN DataLength,\r |
2103 | IN UINTN PollingInterval,\r |
2104 | IN VOID *Mapping,\r |
2105 | IN UINT8 *DataBuffer,\r |
2106 | IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,\r |
2107 | IN VOID *Context\r |
562d2849 |
2108 | )\r |
878ddf1f |
2109 | /*++\r |
2110 | Routine Description:\r |
562d2849 |
2111 | \r |
878ddf1f |
2112 | Insert QH and TD To Interrupt List\r |
562d2849 |
2113 | \r |
878ddf1f |
2114 | Arguments:\r |
2115 | \r |
2116 | HcDev - USB_HC_DEV\r |
2117 | PtrQH - QH_STRUCT\r |
2118 | PtrFirstTD - First TD_STRUCT\r |
2119 | DeviceAddress - Device Address\r |
2120 | EndPointAddress - EndPoint Address\r |
2121 | DataToggle - Data Toggle\r |
2122 | DataLength - Data length \r |
2123 | PollingInterval - Polling Interval when inserted to frame list\r |
2124 | Mapping - Mapping alue \r |
2125 | DataBuffer - Data buffer\r |
2126 | CallBackFunction- CallBackFunction after interrupt transfeer\r |
2127 | Context - CallBackFunction Context passed as function parameter\r |
562d2849 |
2128 | \r |
878ddf1f |
2129 | Returns:\r |
562d2849 |
2130 | \r |
878ddf1f |
2131 | EFI_SUCCESS - Sucess\r |
2132 | EFI_INVALID_PARAMETER - Paremeter is error \r |
2133 | \r |
2134 | --*/\r |
562d2849 |
2135 | ;\r |
878ddf1f |
2136 | \r |
2137 | EFI_STATUS\r |
2138 | DeleteAsyncINTQHTDs (\r |
2139 | IN USB_HC_DEV *HcDev,\r |
2140 | IN UINT8 DeviceAddress,\r |
2141 | IN UINT8 EndPointAddress,\r |
2142 | OUT UINT8 *DataToggle\r |
562d2849 |
2143 | )\r |
878ddf1f |
2144 | /*++\r |
2145 | Routine Description:\r |
2146 | \r |
2147 | Delete Async INT QH and TDs\r |
562d2849 |
2148 | \r |
878ddf1f |
2149 | Arguments:\r |
2150 | \r |
2151 | HcDev - USB_HC_DEV\r |
2152 | DeviceAddress - Device Address\r |
2153 | EndPointAddress - EndPoint Address\r |
2154 | DataToggle - Data Toggle\r |
2155 | \r |
2156 | Returns:\r |
562d2849 |
2157 | \r |
878ddf1f |
2158 | EFI_SUCCESS - Sucess\r |
2159 | EFI_INVALID_PARAMETER - Paremeter is error \r |
2160 | \r |
2161 | --*/\r |
562d2849 |
2162 | ;\r |
2163 | \r |
878ddf1f |
2164 | BOOLEAN\r |
2165 | CheckTDsResults (\r |
2166 | IN TD_STRUCT *ptrTD,\r |
2167 | IN UINTN RequiredLen,\r |
2168 | OUT UINT32 *Result,\r |
2169 | OUT UINTN *ErrTDPos,\r |
2170 | OUT UINTN *ActualTransferSize\r |
562d2849 |
2171 | )\r |
878ddf1f |
2172 | /*++\r |
2173 | \r |
2174 | Routine Description:\r |
2175 | \r |
2176 | Check TDs Results\r |
2177 | \r |
2178 | Arguments:\r |
2179 | \r |
2180 | PtrTD - TD_STRUCT to check\r |
2181 | RequiredLen - Required Len\r |
2182 | Result - Transfer result\r |
2183 | ErrTDPos - Error TD Position\r |
2184 | ActualTransferSize - Actual Transfer Size\r |
2185 | \r |
2186 | Returns:\r |
2187 | \r |
2188 | TRUE - Sucess\r |
2189 | FALSE - Fail\r |
2190 | \r |
2191 | --*/\r |
562d2849 |
2192 | ;\r |
2193 | \r |
878ddf1f |
2194 | VOID\r |
2195 | ExecuteAsyncINTTDs (\r |
2196 | IN USB_HC_DEV *HcDev,\r |
2197 | IN INTERRUPT_LIST *ptrList,\r |
2198 | OUT UINT32 *Result,\r |
2199 | OUT UINTN *ErrTDPos,\r |
2200 | OUT UINTN *ActualLen\r |
562d2849 |
2201 | )\r |
878ddf1f |
2202 | /*++\r |
2203 | \r |
2204 | Routine Description:\r |
2205 | \r |
2206 | Execute Async Interrupt TDs\r |
2207 | \r |
2208 | Arguments:\r |
2209 | \r |
2210 | HcDev - USB_HC_DEV\r |
2211 | PtrList - INTERRUPT_LIST\r |
2212 | Result - Transfer result\r |
2213 | ErrTDPos - Error TD Position\r |
2214 | ActualTransferSize - Actual Transfer Size\r |
2215 | \r |
2216 | Returns:\r |
2217 | \r |
2218 | VOID\r |
2219 | \r |
2220 | --*/\r |
562d2849 |
2221 | ;\r |
2222 | \r |
878ddf1f |
2223 | VOID\r |
2224 | UpdateAsyncINTQHTDs (\r |
2225 | IN INTERRUPT_LIST *ptrList,\r |
2226 | IN UINT32 Result,\r |
2227 | IN UINT32 ErrTDPos\r |
562d2849 |
2228 | )\r |
878ddf1f |
2229 | /*++\r |
2230 | \r |
2231 | Routine Description:\r |
2232 | \r |
2233 | Update Async Interrupt QH and TDs\r |
2234 | \r |
2235 | Arguments:\r |
2236 | \r |
2237 | PtrList - INTERRUPT_LIST\r |
2238 | Result - Transfer reslut\r |
2239 | ErrTDPos - Error TD Position\r |
2240 | \r |
2241 | Returns:\r |
2242 | \r |
2243 | VOID\r |
2244 | \r |
2245 | --*/\r |
562d2849 |
2246 | ;\r |
2247 | \r |
878ddf1f |
2248 | VOID\r |
2249 | ReleaseInterruptList (\r |
2250 | IN USB_HC_DEV *HcDev,\r |
2251 | IN LIST_ENTRY *ListHead\r |
562d2849 |
2252 | )\r |
878ddf1f |
2253 | /*++\r |
2254 | \r |
2255 | Routine Description:\r |
2256 | \r |
2257 | Release Interrupt List\r |
562d2849 |
2258 | \r |
878ddf1f |
2259 | Arguments:\r |
2260 | \r |
2261 | HcDev - USB_HC_DEV\r |
2262 | ListHead - List head\r |
2263 | \r |
2264 | Returns:\r |
2265 | \r |
2266 | VOID\r |
2267 | \r |
2268 | --*/\r |
562d2849 |
2269 | ;\r |
2270 | \r |
878ddf1f |
2271 | EFI_STATUS\r |
2272 | ExecuteControlTransfer (\r |
2273 | IN USB_HC_DEV *HcDev,\r |
2274 | IN TD_STRUCT *ptrTD,\r |
2275 | IN UINT32 wIndex,\r |
2276 | OUT UINTN *ActualLen,\r |
2277 | IN UINTN TimeOut,\r |
2278 | OUT UINT32 *TransferResult\r |
562d2849 |
2279 | )\r |
878ddf1f |
2280 | /*++\r |
2281 | \r |
2282 | Routine Description:\r |
2283 | \r |
2284 | Execute Control Transfer\r |
2285 | \r |
2286 | Arguments:\r |
2287 | \r |
2288 | HcDev - USB_HC_DEV\r |
2289 | PtrTD - TD_STRUCT\r |
2290 | wIndex - No use\r |
2291 | ActualLen - Actual transfered Len \r |
2292 | TimeOut - TimeOut value in milliseconds\r |
2293 | TransferResult - Transfer result\r |
2294 | Returns:\r |
2295 | \r |
2296 | EFI_SUCCESS - Sucess\r |
2297 | EFI_DEVICE_ERROR - Error\r |
2298 | \r |
2299 | \r |
2300 | --*/\r |
562d2849 |
2301 | ;\r |
2302 | \r |
878ddf1f |
2303 | EFI_STATUS\r |
2304 | ExecBulkorSyncInterruptTransfer (\r |
2305 | IN USB_HC_DEV *HcDev,\r |
2306 | IN TD_STRUCT *ptrTD,\r |
2307 | IN UINT32 wIndex,\r |
2308 | OUT UINTN *ActualLen,\r |
2309 | OUT UINT8 *DataToggle,\r |
2310 | IN UINTN TimeOut,\r |
2311 | OUT UINT32 *TransferResult\r |
562d2849 |
2312 | )\r |
878ddf1f |
2313 | /*++\r |
2314 | \r |
2315 | Routine Description:\r |
2316 | \r |
2317 | Execute Bulk or SyncInterrupt Transfer\r |
2318 | \r |
2319 | Arguments:\r |
2320 | \r |
2321 | HcDev - USB_HC_DEV\r |
2322 | PtrTD - TD_STRUCT\r |
2323 | wIndex - No use\r |
2324 | ActualLen - Actual transfered Len \r |
2325 | DataToggle - Data Toggle\r |
2326 | TimeOut - TimeOut value in milliseconds\r |
2327 | TransferResult - Transfer result\r |
2328 | Returns:\r |
2329 | \r |
2330 | EFI_SUCCESS - Sucess\r |
2331 | EFI_DEVICE_ERROR - Error\r |
2332 | --*/\r |
562d2849 |
2333 | ;\r |
878ddf1f |
2334 | \r |
2335 | EFI_STATUS\r |
2336 | InitializeMemoryManagement (\r |
2337 | IN USB_HC_DEV *HcDev\r |
562d2849 |
2338 | )\r |
2339 | /*++\r |
2340 | \r |
2341 | Routine Description:\r |
2342 | \r |
2343 | Initialize Memory Management\r |
2344 | \r |
2345 | Arguments:\r |
2346 | \r |
2347 | HcDev - USB_HC_DEV\r |
2348 | \r |
2349 | Returns:\r |
2350 | \r |
2351 | EFI_SUCCESS - Success\r |
2352 | \r |
2353 | --*/\r |
2354 | ;\r |
878ddf1f |
2355 | \r |
2356 | EFI_STATUS\r |
2357 | CreateMemoryBlock (\r |
2358 | IN USB_HC_DEV *HcDev,\r |
2359 | IN MEMORY_MANAGE_HEADER **MemoryHeader,\r |
2360 | IN UINTN MemoryBlockSizeInPages\r |
562d2849 |
2361 | )\r |
2362 | /*++\r |
2363 | \r |
2364 | Routine Description:\r |
2365 | \r |
2366 | Use PciIo->AllocateBuffer to allocate common buffer for the memory block,\r |
2367 | and use PciIo->Map to map the common buffer for Bus Master Read/Write.\r |
2368 | \r |
2369 | \r |
2370 | Arguments:\r |
2371 | \r |
2372 | HcDev - USB_HC_DEV\r |
2373 | MemoryHeader - MEMORY_MANAGE_HEADER to output\r |
2374 | MemoryBlockSizeInPages - MemoryBlockSizeInPages\r |
2375 | \r |
2376 | Returns:\r |
2377 | \r |
2378 | EFI_SUCCESS - Success\r |
2379 | EFI_OUT_OF_RESOURCES - Out of resources\r |
2380 | EFI_UNSUPPORTED - Unsupported\r |
2381 | \r |
2382 | --*/\r |
2383 | ;\r |
878ddf1f |
2384 | \r |
2385 | EFI_STATUS\r |
2386 | FreeMemoryHeader (\r |
2387 | IN USB_HC_DEV *HcDev,\r |
2388 | IN MEMORY_MANAGE_HEADER *MemoryHeader\r |
562d2849 |
2389 | )\r |
2390 | /*++\r |
2391 | \r |
2392 | Routine Description:\r |
2393 | \r |
2394 | Free Memory Header\r |
2395 | \r |
2396 | Arguments:\r |
2397 | \r |
2398 | HcDev - USB_HC_DEV\r |
2399 | MemoryHeader - MemoryHeader to be freed\r |
2400 | \r |
2401 | Returns:\r |
2402 | \r |
2403 | EFI_INVALID_PARAMETER - Parameter is error\r |
2404 | EFI_SUCCESS - Success\r |
2405 | \r |
2406 | --*/\r |
2407 | ;\r |
878ddf1f |
2408 | \r |
2409 | EFI_STATUS\r |
2410 | UhciAllocatePool (\r |
2411 | IN USB_HC_DEV *UhcDev,\r |
2412 | IN UINT8 **Pool,\r |
2413 | IN UINTN AllocSize\r |
562d2849 |
2414 | )\r |
2415 | /*++\r |
2416 | \r |
2417 | Routine Description:\r |
2418 | \r |
2419 | Uhci Allocate Pool\r |
2420 | \r |
2421 | Arguments:\r |
2422 | \r |
2423 | HcDev - USB_HC_DEV\r |
2424 | Pool - Place to store pointer to the memory buffer\r |
2425 | AllocSize - Alloc Size\r |
2426 | \r |
2427 | Returns:\r |
2428 | \r |
2429 | EFI_SUCCESS - Success\r |
2430 | \r |
2431 | --*/\r |
2432 | ;\r |
878ddf1f |
2433 | \r |
2434 | VOID\r |
2435 | UhciFreePool (\r |
2436 | IN USB_HC_DEV *HcDev,\r |
2437 | IN UINT8 *Pool,\r |
2438 | IN UINTN AllocSize\r |
562d2849 |
2439 | )\r |
2440 | /*++\r |
2441 | \r |
2442 | Routine Description:\r |
2443 | \r |
2444 | Uhci Free Pool\r |
2445 | \r |
2446 | Arguments:\r |
2447 | \r |
2448 | HcDev - USB_HC_DEV\r |
2449 | Pool - Pool to free\r |
2450 | AllocSize - Pool size\r |
2451 | \r |
2452 | Returns:\r |
2453 | \r |
2454 | VOID\r |
2455 | \r |
2456 | --*/\r |
2457 | ;\r |
878ddf1f |
2458 | \r |
2459 | VOID\r |
2460 | InsertMemoryHeaderToList (\r |
2461 | IN MEMORY_MANAGE_HEADER *MemoryHeader,\r |
2462 | IN MEMORY_MANAGE_HEADER *NewMemoryHeader\r |
562d2849 |
2463 | )\r |
2464 | /*++\r |
2465 | \r |
2466 | Routine Description:\r |
2467 | \r |
2468 | Insert Memory Header To List\r |
2469 | \r |
2470 | Arguments:\r |
2471 | \r |
2472 | MemoryHeader - MEMORY_MANAGE_HEADER\r |
2473 | NewMemoryHeader - MEMORY_MANAGE_HEADER\r |
2474 | \r |
2475 | Returns:\r |
2476 | \r |
2477 | VOID\r |
2478 | \r |
2479 | --*/\r |
2480 | ;\r |
878ddf1f |
2481 | \r |
2482 | EFI_STATUS\r |
2483 | AllocMemInMemoryBlock (\r |
2484 | IN MEMORY_MANAGE_HEADER *MemoryHeader,\r |
2485 | IN VOID **Pool,\r |
2486 | IN UINTN NumberOfMemoryUnit\r |
562d2849 |
2487 | )\r |
2488 | /*++\r |
2489 | \r |
2490 | Routine Description:\r |
2491 | \r |
2492 | Alloc Memory In MemoryBlock\r |
2493 | \r |
2494 | Arguments:\r |
2495 | \r |
2496 | MemoryHeader - MEMORY_MANAGE_HEADER\r |
2497 | Pool - Place to store pointer to memory\r |
2498 | NumberOfMemoryUnit - Number Of Memory Unit\r |
2499 | \r |
2500 | Returns:\r |
2501 | \r |
2502 | EFI_NOT_FOUND - Can't find the free memory \r |
2503 | EFI_SUCCESS - Success\r |
2504 | \r |
2505 | --*/\r |
2506 | ;\r |
878ddf1f |
2507 | \r |
2508 | BOOLEAN\r |
2509 | IsMemoryBlockEmptied (\r |
2510 | IN MEMORY_MANAGE_HEADER *MemoryHeaderPtr\r |
562d2849 |
2511 | )\r |
2512 | /*++\r |
2513 | \r |
562d2849 |
2514 | Routine Description:\r |
2515 | \r |
2516 | Is Memory Block Emptied\r |
2517 | \r |
2518 | Arguments:\r |
2519 | \r |
2520 | MemoryHeaderPtr - MEMORY_MANAGE_HEADER\r |
2521 | \r |
2522 | Returns:\r |
2523 | \r |
2524 | TRUE - Empty\r |
2525 | FALSE - Not Empty \r |
2526 | \r |
2527 | --*/\r |
2528 | ;\r |
878ddf1f |
2529 | \r |
2530 | VOID\r |
2531 | DelinkMemoryBlock (\r |
2532 | IN MEMORY_MANAGE_HEADER *FirstMemoryHeader,\r |
2533 | IN MEMORY_MANAGE_HEADER *FreeMemoryHeader\r |
562d2849 |
2534 | )\r |
2535 | /*++\r |
2536 | \r |
2537 | Routine Description:\r |
2538 | \r |
2539 | Delink Memory Block\r |
2540 | \r |
2541 | Arguments:\r |
2542 | \r |
2543 | FirstMemoryHeader - MEMORY_MANAGE_HEADER\r |
2544 | NeedFreeMemoryHeader - MEMORY_MANAGE_HEADER\r |
2545 | \r |
2546 | Returns:\r |
2547 | \r |
2548 | VOID\r |
2549 | \r |
2550 | --*/\r |
2551 | ;\r |
878ddf1f |
2552 | \r |
2553 | EFI_STATUS\r |
2554 | DelMemoryManagement (\r |
2555 | IN USB_HC_DEV *HcDev\r |
562d2849 |
2556 | )\r |
2557 | /*++\r |
2558 | \r |
2559 | Routine Description:\r |
2560 | \r |
2561 | Delete Memory Management\r |
2562 | \r |
2563 | Arguments:\r |
2564 | \r |
2565 | HcDev - USB_HC_DEV\r |
2566 | \r |
2567 | Returns:\r |
2568 | \r |
2569 | EFI_SUCCESS - Success\r |
2570 | \r |
2571 | --*/\r |
2572 | ;\r |
878ddf1f |
2573 | \r |
2574 | VOID\r |
2575 | EnableMaxPacketSize (\r |
2576 | IN USB_HC_DEV *HcDev\r |
562d2849 |
2577 | )\r |
2578 | /*++\r |
2579 | \r |
2580 | Routine Description:\r |
2581 | \r |
2582 | Enable Max Packet Size\r |
2583 | \r |
2584 | Arguments:\r |
2585 | \r |
2586 | HcDev - USB_HC_DEV\r |
2587 | \r |
2588 | Returns:\r |
2589 | \r |
2590 | VOID\r |
2591 | \r |
2592 | --*/\r |
2593 | ;\r |
878ddf1f |
2594 | \r |
2595 | VOID\r |
2596 | CleanUsbTransactions (\r |
2597 | IN USB_HC_DEV *HcDev\r |
562d2849 |
2598 | )\r |
2599 | /*++\r |
2600 | \r |
2601 | Routine Description:\r |
2602 | \r |
2603 | Clean USB Transactions\r |
2604 | \r |
2605 | Arguments:\r |
2606 | \r |
2607 | HcDev - A point to USB_HC_DEV\r |
2608 | \r |
2609 | Returns:\r |
2610 | \r |
2611 | VOID\r |
2612 | \r |
2613 | --*/\r |
2614 | ;\r |
878ddf1f |
2615 | \r |
2616 | VOID\r |
2617 | TurnOffUSBEmulation (\r |
2618 | IN EFI_PCI_IO_PROTOCOL *PciIo\r |
562d2849 |
2619 | )\r |
2620 | /*++\r |
2621 | \r |
2622 | Routine Description:\r |
2623 | \r |
2624 | Set current framelist QH or TD\r |
2625 | \r |
2626 | Arguments:\r |
2627 | \r |
2628 | pCurEntry - A point to FRAMELIST_ENTITY\r |
2629 | IsQH - TRUE to set QH and FALSE to set TD\r |
2630 | \r |
2631 | Returns:\r |
2632 | \r |
2633 | VOID\r |
2634 | \r |
2635 | --*/\r |
2636 | ;\r |
878ddf1f |
2637 | \r |
2638 | #endif\r |