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878ddf1f | 1 | /*++\r |
2 | \r | |
eeb1cd5a | 3 | Copyright (c) 2006, Intel Corporation\r |
4 | All rights reserved. This program and the accompanying materials\r | |
5 | are licensed and made available under the terms and conditions of the BSD License\r | |
6 | which accompanies this distribution. The full text of the license may be found at\r | |
7 | http://opensource.org/licenses/bsd-license.php\r | |
8 | \r | |
9 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
10 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
878ddf1f | 11 | \r |
12 | Module Name:\r | |
13 | \r | |
14 | DxeLoadFunc.c\r | |
15 | \r | |
16 | Abstract:\r | |
17 | \r | |
18 | Ia32-specifc functionality for DxeLoad.\r | |
19 | \r | |
20 | --*/\r | |
21 | \r | |
abb26634 | 22 | #include "DxeIpl.h"\r |
f40793be | 23 | #include "VirtualMemory.h"\r |
24 | \r | |
25 | // | |
26 | // Global Descriptor Table (GDT) | |
27 | // | |
28 | GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT gGdtEntries [] = {\r | |
29 | /* selector { Global Segment Descriptor } */ \r | |
19ca33cb | 30 | /* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //null descriptor \r |
31 | /* 0x08 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear data segment descriptor\r | |
32 | /* 0x10 */ {{0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear code segment descriptor\r | |
33 | /* 0x18 */ {{0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor\r | |
34 | /* 0x20 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system code segment descriptor\r | |
35 | /* 0x28 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor\r | |
36 | /* 0x30 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor\r | |
37 | /* 0x38 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0}}, //system code segment descriptor\r | |
38 | /* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor\r | |
f40793be | 39 | };\r |
40 | \r | |
41 | //\r | |
42 | // IA32 Gdt register\r | |
43 | //\r | |
44 | GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR gGdt = {\r | |
45 | sizeof (gGdtEntries) - 1,\r | |
46 | (UINTN) gGdtEntries\r | |
47 | };\r | |
878ddf1f | 48 | \r |
eeb1cd5a | 49 | VOID\r |
657d3918 | 50 | HandOffToDxeCore (\r |
51 | IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,\r | |
52 | IN EFI_PEI_HOB_POINTERS HobList\r | |
eeb1cd5a | 53 | )\r |
54 | {\r | |
657d3918 | 55 | EFI_STATUS Status;\r |
56 | EFI_PHYSICAL_ADDRESS BaseOfStack;\r | |
57 | EFI_PHYSICAL_ADDRESS TopOfStack;\r | |
f40793be | 58 | UINTN PageTables;\r |
657d3918 | 59 | \r |
60 | Status = PeiServicesAllocatePages (EfiBootServicesData, EFI_SIZE_TO_PAGES (STACK_SIZE), &BaseOfStack);\r | |
61 | ASSERT_EFI_ERROR (Status);\r | |
62 | \r | |
63 | if (FeaturePcdGet(PcdDxeIplSwitchToLongMode)) {\r | |
64 | //\r | |
65 | // Compute the top of the stack we were allocated, which is used to load X64 dxe core. \r | |
66 | // Pre-allocate a 32 bytes which confroms to x64 calling convention.\r | |
67 | //\r | |
68 | // The first four parameters to a function are passed in rcx, rdx, r8 and r9. \r | |
69 | // Any further parameters are pushed on the stack. Furthermore, space (4 * 8bytes) for the \r | |
70 | // register parameters is reserved on the stack, in case the called function \r | |
71 | // wants to spill them; this is important if the function is variadic. \r | |
72 | //\r | |
73 | TopOfStack = BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - 32;\r | |
74 | \r | |
75 | //\r | |
76 | // X64 Calling Conventions requires that the stack must be aligned to 16 bytes\r | |
77 | //\r | |
78 | TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, 16);\r | |
f40793be | 79 | \r |
657d3918 | 80 | //\r |
81 | // Load the GDT of Go64. Since the GDT of 32-bit Tiano locates in the BS_DATA\r | |
82 | // memory, it may be corrupted when copying FV to high-end memory \r | |
83 | //\r | |
f40793be | 84 | AsmWriteGdtr (&gGdt);\r |
657d3918 | 85 | //\r |
f40793be | 86 | // Create page table and save PageMapLevel4 to CR3\r |
657d3918 | 87 | //\r |
f40793be | 88 | PageTables = CreateIdentityMappingPageTables ();\r |
89 | AsmWriteCr3 (PageTables);\r | |
90 | //\r | |
657d3918 | 91 | // Go to Long Mode. Interrupts will not get turned on until the CPU AP is loaded.\r |
92 | // Call x64 drivers passing in single argument, a pointer to the HOBs.\r | |
f40793be | 93 | // \r |
94 | AsmEnablePaging64 (\r | |
95 | SYS_CODE64_SEL,\r | |
96 | DxeCoreEntryPoint,\r | |
97 | (EFI_PHYSICAL_ADDRESS)(UINTN)(HobList.Raw),\r | |
98 | 0,\r | |
99 | TopOfStack\r | |
657d3918 | 100 | );\r |
101 | } else {\r | |
102 | //\r | |
103 | // Compute the top of the stack we were allocated. Pre-allocate a UINTN\r | |
104 | // for safety.\r | |
105 | //\r | |
106 | TopOfStack = BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT;\r | |
107 | TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);\r | |
108 | \r | |
109 | SwitchStack (\r | |
110 | (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,\r | |
111 | HobList.Raw,\r | |
112 | NULL,\r | |
113 | (VOID *) (UINTN) TopOfStack\r | |
114 | );\r | |
115 | } \r | |
eeb1cd5a | 116 | }\r |
f40793be | 117 | \r |