Fixed the issue in multi-msa build in single mode; cleaned the code of re-ordering...

[mirror_edk2.git] / EdkModulePkg / Core / DxeIplPeim / Ia32 / VirtualMemory.c

/*++\r
\r
Copyright (c) 2006, Intel Corporation                                                         \r
All rights reserved. This program and the accompanying materials                          \r
are licensed and made available under the terms and conditions of the BSD License         \r
which accompanies this distribution.  The full text of the license may be found at        \r
http://opensource.org/licenses/bsd-license.php                                            \r
                                                                                          \r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
\r
Module Name:\r
  VirtualMemory.c\r
  \r
Abstract:\r
\r
  x64 Virtual Memory Management Services in the form of an IA-32 driver.  \r
  Used to establish a 1:1 Virtual to Physical Mapping that is required to\r
  enter Long Mode (x64 64-bit mode).\r
\r
  While we make a 1:1 mapping (identity mapping) for all physical pages \r
  we still need to use the MTRR's to ensure that the cachability attirbutes\r
  for all memory regions is correct.\r
\r
  The basic idea is to use 2MB page table entries where ever possible. If\r
  more granularity of cachability is required then 4K page tables are used.\r
\r
  References:\r
    1) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 1:Basic Architecture, Intel\r
    2) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 2:Instruction Set Reference, Intel\r
    3) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel\r
  \r
--*/  \r
\r
#include "VirtualMemory.h"\r
\r
UINTN\r
CreateIdentityMappingPageTables (\r
  VOID\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  Allocates and fills in the Page Directory and Page Table Entries to\r
  establish a 1:1 Virtual to Physical mapping.\r
\r
Arguments:\r
\r
  NumberOfProcessorPhysicalAddressBits - Number of processor address bits to use.\r
                                         Limits the number of page table entries \r
                                         to the physical address space.\r
\r
Returns:\r
\r
  EFI_SUCCESS           The 1:1 Virtual to Physical identity mapping was created\r
\r
--*/\r
{  \r
  UINT32                                        RegEax;\r
  UINT8                                         PhysicalAddressBits;\r
  EFI_PHYSICAL_ADDRESS                          PageAddress;\r
  UINTN                                         IndexOfPml4Entries;\r
  UINTN                                         IndexOfPdpEntries;\r
  UINTN                                         IndexOfPageDirectoryEntries;\r
  UINTN                                         NumberOfPml4EntriesNeeded;\r
  UINTN                                         NumberOfPdpEntriesNeeded;\r
  PAGE_MAP_AND_DIRECTORY_POINTER                *PageMapLevel4Entry;\r
  PAGE_MAP_AND_DIRECTORY_POINTER                *PageMap;\r
  PAGE_MAP_AND_DIRECTORY_POINTER                *PageDirectoryPointerEntry;\r
  PAGE_TABLE_ENTRY                              *PageDirectoryEntry;\r
\r
  //\r
  // By architecture only one PageMapLevel4 exists - so lets allocate storage for it.\r
  //\r
  PageMap = AllocatePages (1);\r
  ASSERT (PageMap != NULL);\r
\r
  //\r
  // Get physical address bits supported.\r
  //\r
  AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r
  if (RegEax >= 0x80000008) {\r
    AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);\r
    PhysicalAddressBits = (UINT8) RegEax;\r
  } else {\r
    PhysicalAddressBits = 36;\r
  }\r
\r
  //\r
  // Calculate the table entries needed.\r
  //\r
  if (PhysicalAddressBits <= 39 ) {\r
    NumberOfPml4EntriesNeeded = 1;\r
    NumberOfPdpEntriesNeeded =  1 << (PhysicalAddressBits - 30);\r
  } else {\r
    NumberOfPml4EntriesNeeded = 1 << (PhysicalAddressBits - 39);\r
    NumberOfPdpEntriesNeeded = 512;\r
  }\r
\r
  PageMapLevel4Entry = PageMap;\r
  PageAddress        = 0;\r
  for (IndexOfPml4Entries = 0; IndexOfPml4Entries < NumberOfPml4EntriesNeeded; IndexOfPml4Entries++, PageMapLevel4Entry++) {\r
    //\r
    // Each PML4 entry points to a page of Page Directory Pointer entires.\r
    // So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.\r
    //\r
    PageDirectoryPointerEntry = AllocatePages (1);\r
    ASSERT (PageDirectoryPointerEntry != NULL);\r
\r
    //\r
    // Make a PML4 Entry\r
    //\r
    PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry;\r
    PageMapLevel4Entry->Bits.ReadWrite = 1;\r
    PageMapLevel4Entry->Bits.Present = 1;\r
\r
    for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {\r
      //\r
      // Each Directory Pointer entries points to a page of Page Directory entires.\r
      // So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.\r
      //       \r
      PageDirectoryEntry = AllocatePages (1);\r
      ASSERT (PageDirectoryEntry != NULL);\r
\r
      //\r
      // Fill in a Page Directory Pointer Entries\r
      //\r
      PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry;\r
      PageDirectoryPointerEntry->Bits.ReadWrite = 1;\r
      PageDirectoryPointerEntry->Bits.Present = 1;\r
\r
      for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += 0x200000) {\r
        //\r
        // Fill in the Page Directory entries\r
        //\r
        PageDirectoryEntry->Uint64 = (UINT64)PageAddress;\r
        PageDirectoryEntry->Bits.ReadWrite = 1;\r
        PageDirectoryEntry->Bits.Present = 1;\r
        PageDirectoryEntry->Bits.MustBe1 = 1;\r
\r
      }\r
    }\r
  }\r
\r
  //\r
  // For the PML4 entries we are not using fill in a null entry.\r
  // For now we just copy the first entry.\r
  //\r
  for (; IndexOfPml4Entries < 512; IndexOfPml4Entries++, PageMapLevel4Entry++) {\r
     CopyMem (\r
       PageMapLevel4Entry,\r
       PageMap,\r
       sizeof (PAGE_MAP_AND_DIRECTORY_POINTER)\r
       );\r
  }\r
\r
  return (UINTN)PageMap; // FIXME\r
}\r
\r