EmbeddedPkg: rename gEfiMmcHostProtocolGuid to gEmbeddedMmcHostProtocolGuid

[mirror_edk2.git] / EmbeddedPkg / Include / Protocol / MmcHost.h

/** @file\r
  Definition of the MMC Host Protocol\r
\r
  Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#ifndef __MMC_HOST_H__\r
#define __MMC_HOST_H__\r
\r
///\r
/// Global ID for the MMC Host Protocol\r
///\r
#define EMBEDDED_MMC_HOST_PROTOCOL_GUID \\r
  { 0x3e591c00, 0x9e4a, 0x11df, {0x92, 0x44, 0x00, 0x02, 0xA5, 0xD5, 0xC5, 0x1B } }\r
\r
#define MMC_RESPONSE_TYPE_R1        0\r
#define MMC_RESPONSE_TYPE_R1b       0\r
#define MMC_RESPONSE_TYPE_R2        1\r
#define MMC_RESPONSE_TYPE_R3        0\r
#define MMC_RESPONSE_TYPE_R6        0\r
#define MMC_RESPONSE_TYPE_R7        0\r
#define MMC_RESPONSE_TYPE_OCR       0\r
#define MMC_RESPONSE_TYPE_CID       1\r
#define MMC_RESPONSE_TYPE_CSD       1\r
#define MMC_RESPONSE_TYPE_RCA       0\r
\r
typedef UINT32  MMC_RESPONSE_TYPE;\r
\r
typedef UINT32 MMC_CMD;\r
\r
#define MMC_CMD_WAIT_RESPONSE      (1 << 16)\r
#define MMC_CMD_LONG_RESPONSE      (1 << 17)\r
#define MMC_CMD_NO_CRC_RESPONSE    (1 << 18)\r
\r
#define MMC_INDX(Index)       ((Index) & 0xFFFF)\r
#define MMC_GET_INDX(MmcCmd)  ((MmcCmd) & 0xFFFF)\r
\r
#define MMC_CMD0              (MMC_INDX(0) | MMC_CMD_NO_CRC_RESPONSE)\r
#define MMC_CMD1              (MMC_INDX(1) | MMC_CMD_WAIT_RESPONSE | MMC_CMD_NO_CRC_RESPONSE)\r
#define MMC_CMD2              (MMC_INDX(2) | MMC_CMD_WAIT_RESPONSE | MMC_CMD_LONG_RESPONSE)\r
#define MMC_CMD3              (MMC_INDX(3) | MMC_CMD_WAIT_RESPONSE)\r
#define MMC_CMD5              (MMC_INDX(5) | MMC_CMD_WAIT_RESPONSE | MMC_CMD_NO_CRC_RESPONSE)\r
#define MMC_CMD6              (MMC_INDX(6) | MMC_CMD_WAIT_RESPONSE)\r
#define MMC_CMD7              (MMC_INDX(7) | MMC_CMD_WAIT_RESPONSE)\r
#define MMC_CMD8              (MMC_INDX(8) | MMC_CMD_WAIT_RESPONSE)\r
#define MMC_CMD9              (MMC_INDX(9) | MMC_CMD_WAIT_RESPONSE | MMC_CMD_LONG_RESPONSE)\r
#define MMC_CMD11             (MMC_INDX(11) | MMC_CMD_WAIT_RESPONSE)\r
#define MMC_CMD12             (MMC_INDX(12) | MMC_CMD_WAIT_RESPONSE)\r
#define MMC_CMD13             (MMC_INDX(13) | MMC_CMD_WAIT_RESPONSE)\r
#define MMC_CMD16             (MMC_INDX(16) | MMC_CMD_WAIT_RESPONSE)\r
#define MMC_CMD17             (MMC_INDX(17) | MMC_CMD_WAIT_RESPONSE)\r
#define MMC_CMD18             (MMC_INDX(18) | MMC_CMD_WAIT_RESPONSE)\r
#define MMC_CMD20             (MMC_INDX(20) | MMC_CMD_WAIT_RESPONSE)\r
#define MMC_CMD23             (MMC_INDX(23) | MMC_CMD_WAIT_RESPONSE)\r
#define MMC_CMD24             (MMC_INDX(24) | MMC_CMD_WAIT_RESPONSE)\r
#define MMC_CMD25             (MMC_INDX(25) | MMC_CMD_WAIT_RESPONSE)\r
#define MMC_CMD55             (MMC_INDX(55) | MMC_CMD_WAIT_RESPONSE)\r
#define MMC_ACMD41            (MMC_INDX(41) | MMC_CMD_WAIT_RESPONSE | MMC_CMD_NO_CRC_RESPONSE)\r
#define MMC_ACMD51            (MMC_INDX(51) | MMC_CMD_WAIT_RESPONSE)\r
\r
// Valid responses for CMD1 in eMMC\r
#define EMMC_CMD1_CAPACITY_LESS_THAN_2GB 0x00FF8080 // Capacity <= 2GB, byte addressing used\r
#define EMMC_CMD1_CAPACITY_GREATER_THAN_2GB 0x40FF8080 // Capacity > 2GB, 512-byte sector addressing used\r
\r
#define MMC_STATUS_APP_CMD    (1 << 5)\r
\r
typedef enum _MMC_STATE {\r
    MmcInvalidState = 0,\r
    MmcHwInitializationState,\r
    MmcIdleState,\r
    MmcReadyState,\r
    MmcIdentificationState,\r
    MmcStandByState,\r
    MmcTransferState,\r
    MmcSendingDataState,\r
    MmcReceiveDataState,\r
    MmcProgrammingState,\r
    MmcDisconnectState,\r
} MMC_STATE;\r
\r
#define EMMCBACKWARD         (0)\r
#define EMMCHS26             (1 << 0)      // High-Speed @26MHz at rated device voltages\r
#define EMMCHS52             (1 << 1)      // High-Speed @52MHz at rated device voltages\r
#define EMMCHS52DDR1V8       (1 << 2)      // High-Speed Dual Data Rate @52MHz 1.8V or 3V I/O\r
#define EMMCHS52DDR1V2       (1 << 3)      // High-Speed Dual Data Rate @52MHz 1.2V I/O\r
#define EMMCHS200SDR1V8      (1 << 4)      // HS200 Single Data Rate @200MHz 1.8V I/O\r
#define EMMCHS200SDR1V2      (1 << 5)      // HS200 Single Data Rate @200MHz 1.2V I/O\r
#define EMMCHS400DDR1V8      (1 << 6)      // HS400 Dual Data Rate @400MHz 1.8V I/O\r
#define EMMCHS400DDR1V2      (1 << 7)      // HS400 Dual Data Rate @400MHz 1.2V I/O\r
\r
///\r
/// Forward declaration for EFI_MMC_HOST_PROTOCOL\r
///\r
typedef struct _EFI_MMC_HOST_PROTOCOL  EFI_MMC_HOST_PROTOCOL;\r
\r
typedef BOOLEAN (EFIAPI *MMC_ISCARDPRESENT) (\r
  IN  EFI_MMC_HOST_PROTOCOL   *This\r
  );\r
\r
typedef BOOLEAN (EFIAPI *MMC_ISREADONLY) (\r
  IN  EFI_MMC_HOST_PROTOCOL   *This\r
  );\r
\r
typedef EFI_STATUS (EFIAPI *MMC_BUILDDEVICEPATH) (\r
  IN  EFI_MMC_HOST_PROTOCOL     *This,\r
  OUT EFI_DEVICE_PATH_PROTOCOL  **DevicePath\r
  );\r
\r
typedef EFI_STATUS (EFIAPI *MMC_NOTIFYSTATE) (\r
  IN  EFI_MMC_HOST_PROTOCOL     *This,\r
  IN  MMC_STATE                 State\r
  );\r
\r
typedef EFI_STATUS (EFIAPI *MMC_SENDCOMMAND) (\r
  IN  EFI_MMC_HOST_PROTOCOL     *This,\r
  IN  MMC_CMD                   Cmd,\r
  IN  UINT32                    Argument\r
  );\r
\r
typedef EFI_STATUS (EFIAPI *MMC_RECEIVERESPONSE) (\r
  IN  EFI_MMC_HOST_PROTOCOL     *This,\r
  IN  MMC_RESPONSE_TYPE         Type,\r
  IN  UINT32                    *Buffer\r
  );\r
\r
typedef EFI_STATUS (EFIAPI *MMC_READBLOCKDATA) (\r
  IN  EFI_MMC_HOST_PROTOCOL     *This,\r
  IN  EFI_LBA                   Lba,\r
  IN  UINTN                     Length,\r
  OUT UINT32                    *Buffer\r
  );\r
\r
typedef EFI_STATUS (EFIAPI *MMC_WRITEBLOCKDATA) (\r
  IN  EFI_MMC_HOST_PROTOCOL     *This,\r
  IN  EFI_LBA                   Lba,\r
  IN  UINTN                     Length,\r
  IN  UINT32                    *Buffer\r
  );\r
\r
typedef EFI_STATUS (EFIAPI *MMC_SETIOS) (\r
  IN  EFI_MMC_HOST_PROTOCOL     *This,\r
  IN  UINT32                    BusClockFreq,\r
  IN  UINT32                    BusWidth,\r
  IN  UINT32                    TimingMode\r
  );\r
\r
typedef BOOLEAN (EFIAPI *MMC_ISMULTIBLOCK) (\r
  IN  EFI_MMC_HOST_PROTOCOL     *This\r
  );\r
\r
struct _EFI_MMC_HOST_PROTOCOL {\r
\r
  UINT32                  Revision;\r
  MMC_ISCARDPRESENT       IsCardPresent;\r
  MMC_ISREADONLY          IsReadOnly;\r
  MMC_BUILDDEVICEPATH     BuildDevicePath;\r
\r
  MMC_NOTIFYSTATE         NotifyState;\r
\r
  MMC_SENDCOMMAND         SendCommand;\r
  MMC_RECEIVERESPONSE     ReceiveResponse;\r
\r
  MMC_READBLOCKDATA       ReadBlockData;\r
  MMC_WRITEBLOCKDATA      WriteBlockData;\r
\r
  MMC_SETIOS              SetIos;\r
  MMC_ISMULTIBLOCK        IsMultiBlock;\r
\r
};\r
\r
#define MMC_HOST_PROTOCOL_REVISION    0x00010002    // 1.2\r
\r
#define MMC_HOST_HAS_SETIOS(Host)     (Host->Revision >= MMC_HOST_PROTOCOL_REVISION && \\r
                                       Host->SetIos != NULL)\r
#define MMC_HOST_HAS_ISMULTIBLOCK(Host) (Host->Revision >= MMC_HOST_PROTOCOL_REVISION && \\r
                                         Host->IsMultiBlock != NULL)\r
\r
extern EFI_GUID gEmbeddedMmcHostProtocolGuid;\r
\r
#endif\r
\r