projects / mirror_edk2.git / blame
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1 | /** @file\r |
| 2 | \r | |
| 3 | Copyright (c) 2008-2009, Apple Inc. All rights reserved.\r | |
| 4 | \r | |
| 5 | All rights reserved. This program and the accompanying materials\r | |
| 6 | are licensed and made available under the terms and conditions of the BSD License\r | |
| 7 | which accompanies this distribution. The full text of the license may be found at\r | |
| 8 | http://opensource.org/licenses/bsd-license.php\r | |
| 9 | \r | |
| 10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 12 | \r | |
| 13 | **/\r | |
| 14 | \r | |
| 15 | #include <CpuDxe.h>\r | |
| 16 | \r | |
| 17 | \r | |
| 18 | EFI_EXCEPTION_CALLBACK gExceptionHandlers[0x100];\r | |
| 19 | \r | |
| 20 | \r | |
| 21 | /**\r | |
| 22 | This function registers and enables the handler specified by InterruptHandler for a processor \r | |
| 23 | interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the \r | |
| 24 | handler for the processor interrupt or exception type specified by InterruptType is uninstalled. \r | |
| 25 | The installed handler is called once for each processor interrupt or exception.\r | |
| 26 | \r | |
| 27 | @param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts\r | |
| 28 | are enabled and FALSE if interrupts are disabled.\r | |
| 29 | @param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called\r | |
| 30 | when a processor interrupt occurs. If this parameter is NULL, then the handler\r | |
| 31 | will be uninstalled.\r | |
| 32 | \r | |
| 33 | @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.\r | |
| 34 | @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was\r | |
| 35 | previously installed.\r | |
| 36 | @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not\r | |
| 37 | previously installed.\r | |
| 38 | @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.\r | |
| 39 | \r | |
| 40 | **/\r | |
| 41 | EFI_STATUS\r | |
| 42 | RegisterInterruptHandler (\r | |
| 43 | IN EFI_EXCEPTION_TYPE InterruptType,\r | |
| 44 | IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler\r | |
| 45 | )\r | |
| 46 | {\r | |
| 47 | if (InterruptType > 0xFF) {\r | |
| 48 | return EFI_UNSUPPORTED;\r | |
| 49 | }\r | |
| 50 | \r | |
| 51 | if ((InterruptHandler == NULL) && (gExceptionHandlers[InterruptType] == NULL)) {\r | |
| 52 | return EFI_INVALID_PARAMETER;\r | |
| 53 | }\r | |
| 54 | \r | |
| 55 | if ((InterruptHandler != NULL) && (gExceptionHandlers[InterruptType] != NULL)) {\r | |
| 56 | return EFI_ALREADY_STARTED;\r | |
| 57 | }\r | |
| 58 | \r | |
| 59 | gExceptionHandlers[InterruptType] = InterruptHandler;\r | |
| 60 | \r | |
| 61 | return EFI_SUCCESS;\r | |
| 62 | }\r | |
| 63 | \r | |
| 64 | \r | |
| 65 | \r | |
| 66 | \r | |
| 67 | VOID\r | |
| 68 | EFIAPI\r | |
| 69 | DefaultExceptionHandler (\r | |
| 70 | IN EFI_EXCEPTION_TYPE ExceptionType,\r | |
| 71 | IN OUT EFI_SYSTEM_CONTEXT SystemContext\r | |
| 72 | )\r | |
| 73 | {\r | |
| 74 | DEBUG ((EFI_D_ERROR, "Exception %d from %x\n", ExceptionType, SystemContext.SystemContextIa32->Eip));\r | |
| 75 | ASSERT (FALSE);\r | |
| 76 | \r | |
| 77 | return;\r | |
| 78 | }\r | |
| 79 | \r | |
| 80 | \r | |
| 81 | \r | |
| 82 | EFI_STATUS\r | |
| 83 | InitializeExceptions (\r | |
| 84 | IN EFI_CPU_ARCH_PROTOCOL *Cpu\r | |
| 85 | )\r | |
| 86 | {\r | |
| 87 | // You need to initialize gExceptionHandlers[] to point to DefaultExceptionHandler()\r | |
| 88 | // and write all the assembly to handle the interrupts.\r | |
| 89 | ASSERT (FALSE);\r | |
| 90 | return EFI_UNSUPPORTED;\r | |
| 91 | }\r | |
| 92 | \r | |
| 93 | \r | |
| 94 | \r | |
| 95 | /**\r | |
| 96 | This function reads the processor timer specified by TimerIndex and returns it in TimerValue.\r | |
| 97 | \r | |
| 98 | @param TimerIndex Specifies which processor timer is to be returned in TimerValue. This parameter\r | |
| 99 | must be between 0 and NumberOfTimers-1.\r | |
| 100 | @param TimerValue Pointer to the returned timer value.\r | |
| 101 | @param TimerPeriod A pointer to the amount of time that passes in femtoseconds for each increment\r | |
| 102 | of TimerValue.\r | |
| 103 | \r | |
| 104 | @retval EFI_SUCCESS The processor timer value specified by TimerIndex was returned in TimerValue.\r | |
| 105 | @retval EFI_DEVICE_ERROR An error occurred attempting to read one of the processor's timers.\r | |
| 106 | @retval EFI_INVALID_PARAMETER TimerValue is NULL or TimerIndex is not valid.\r | |
| 107 | @retval EFI_UNSUPPORTED The processor does not have any readable timers.\r | |
| 108 | \r | |
| 109 | **/\r | |
| 110 | EFI_STATUS\r | |
| 111 | EFIAPI\r | |
| 112 | GetTimerValue (\r | |
| 113 | IN UINT32 TimerIndex,\r | |
| 114 | OUT UINT64 *TimerValue,\r | |
| 115 | OUT UINT64 *TimerPeriod OPTIONAL\r | |
| 116 | )\r | |
| 117 | {\r | |
| 118 | if (TimerValue == NULL) {\r | |
| 119 | return EFI_INVALID_PARAMETER;\r | |
| 120 | }\r | |
| 121 | \r | |
| 122 | if (TimerIndex == 0) {\r | |
| 123 | *TimerValue = AsmReadTsc ();\r | |
| 124 | if (TimerPeriod != NULL) {\r | |
| 125 | //\r | |
| 126 | // BugBug: Hard coded. Don't know how to do this generically\r | |
| 127 | //\r | |
| 128 | *TimerPeriod = 1000000000;\r | |
| 129 | }\r | |
| 130 | return EFI_SUCCESS;\r | |
| 131 | }\r | |
| 132 | return EFI_INVALID_PARAMETER;\r | |
| 133 | }\r | |
| 134 | \r | |
| 135 | \r | |
| 136 | /**\r | |
| 137 | This function flushes the range of addresses from Start to Start+Length \r | |
| 138 | from the processor's data cache. If Start is not aligned to a cache line \r | |
| 139 | boundary, then the bytes before Start to the preceding cache line boundary \r | |
| 140 | are also flushed. If Start+Length is not aligned to a cache line boundary, \r | |
| 141 | then the bytes past Start+Length to the end of the next cache line boundary \r | |
| 142 | are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be \r | |
| 143 | supported. If the data cache is fully coherent with all DMA operations, then \r | |
| 144 | this function can just return EFI_SUCCESS. If the processor does not support \r | |
| 145 | flushing a range of the data cache, then the entire data cache can be flushed.\r | |
| 146 | \r | |
| 147 | @param Start The beginning physical address to flush from the processor's data\r | |
| 148 | cache.\r | |
| 149 | @param Length The number of bytes to flush from the processor's data cache. This\r | |
| 150 | function may flush more bytes than Length specifies depending upon\r | |
| 151 | the granularity of the flush operation that the processor supports.\r | |
| 152 | @param FlushType Specifies the type of flush operation to perform.\r | |
| 153 | \r | |
| 154 | @retval EFI_SUCCESS The address range from Start to Start+Length was flushed from\r | |
| 155 | the processor's data cache.\r | |
| 156 | @retval EFI_UNSUPPORTED The processor does not support the cache flush type specified\r | |
| 157 | by FlushType.\r | |
| 158 | @retval EFI_DEVICE_ERROR The address range from Start to Start+Length could not be flushed\r | |
| 159 | from the processor's data cache.\r | |
| 160 | \r | |
| 161 | **/\r | |
| 162 | EFI_STATUS\r | |
| 163 | EFIAPI\r | |
| 164 | FlushCpuDataCache (\r | |
| 165 | IN EFI_PHYSICAL_ADDRESS Start,\r | |
| 166 | IN UINT64 Length,\r | |
| 167 | IN EFI_CPU_FLUSH_TYPE FlushType\r | |
| 168 | )\r | |
| 169 | {\r | |
| 170 | if (FlushType == EfiCpuFlushTypeWriteBackInvalidate) {\r | |
| 171 | AsmWbinvd ();\r | |
| 172 | return EFI_SUCCESS;\r | |
| 173 | } else if (FlushType == EfiCpuFlushTypeInvalidate) {\r | |
| 174 | AsmInvd (); \r | |
| 175 | return EFI_SUCCESS;\r | |
| 176 | } else {\r | |
| 177 | return EFI_UNSUPPORTED;\r | |
| 178 | }\r | |
| 179 | }\r | |
| 180 | \r | |
| 181 | \r | |
| 182 | \r | |
| 183 | \r |