]>
Commit | Line | Data |
---|---|---|
946bfba2 | 1 | /** @file\r |
2 | PEI Services Table Pointer Library.\r | |
d18d8a1d | 3 | \r |
bb89ec1a | 4 | Store PEI Services Table pointer via gEmulatorPkgTokenSpaceGuid.PcdPeiServicesTablePage.\r |
946bfba2 | 5 | This emulates a platform SRAM. The PI mechaism does not work in the emulator due to\r |
6 | lack of privledge.\r | |
7 | \r | |
8 | Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r | |
d18d8a1d | 9 | Portiions copyrigth (c) 2011, Apple Inc. All rights reserved.\r |
e3ba31da | 10 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
946bfba2 | 11 | \r |
12 | **/\r | |
13 | \r | |
14 | #include <PiPei.h>\r | |
15 | #include <Library/PeiServicesTablePointerLib.h>\r | |
16 | #include <Library/DebugLib.h>\r | |
17 | #include <Library/EmuMagicPageLib.h>\r | |
18 | \r | |
19 | \r | |
20 | /**\r | |
d18d8a1d | 21 | Caches a pointer PEI Services Table.\r |
22 | \r | |
23 | Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer\r | |
24 | in a CPU specific manner as specified in the CPU binding section of the Platform Initialization\r | |
25 | Pre-EFI Initialization Core Interface Specification.\r | |
26 | \r | |
946bfba2 | 27 | If PeiServicesTablePointer is NULL, then ASSERT().\r |
d18d8a1d | 28 | \r |
946bfba2 | 29 | @param PeiServicesTablePointer The address of PeiServices pointer.\r |
30 | **/\r | |
31 | VOID\r | |
32 | EFIAPI\r | |
33 | SetPeiServicesTablePointer (\r | |
34 | IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer\r | |
35 | )\r | |
36 | {\r | |
37 | ASSERT (PeiServicesTablePointer != NULL);\r | |
38 | ASSERT (*PeiServicesTablePointer != NULL);\r | |
39 | EMU_MAGIC_PAGE()->PeiServicesTablePointer = PeiServicesTablePointer;\r | |
40 | }\r | |
41 | \r | |
42 | /**\r | |
43 | Retrieves the cached value of the PEI Services Table pointer.\r | |
44 | \r | |
d18d8a1d | 45 | Returns the cached value of the PEI Services Table pointer in a CPU specific manner\r |
46 | as specified in the CPU binding section of the Platform Initialization Pre-EFI\r | |
946bfba2 | 47 | Initialization Core Interface Specification.\r |
d18d8a1d | 48 | \r |
946bfba2 | 49 | If the cached PEI Services Table pointer is NULL, then ASSERT().\r |
50 | \r | |
51 | @return The pointer to PeiServices.\r | |
52 | \r | |
53 | **/\r | |
54 | CONST EFI_PEI_SERVICES **\r | |
55 | EFIAPI\r | |
56 | GetPeiServicesTablePointer (\r | |
57 | VOID\r | |
58 | )\r | |
59 | {\r | |
60 | CONST EFI_PEI_SERVICES **PeiServicesTablePointer;\r | |
d18d8a1d | 61 | \r |
946bfba2 | 62 | PeiServicesTablePointer = EMU_MAGIC_PAGE()->PeiServicesTablePointer;\r |
63 | ASSERT (PeiServicesTablePointer != NULL);\r | |
64 | ASSERT (*PeiServicesTablePointer != NULL);\r | |
65 | return PeiServicesTablePointer;\r | |
66 | }\r | |
67 | \r | |
95c2e69a | 68 | /**\r |
79e4f2a5 | 69 | Perform CPU specific actions required to migrate the PEI Services Table\r |
95c2e69a LG |
70 | pointer from temporary RAM to permanent RAM.\r |
71 | \r | |
79e4f2a5 | 72 | For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes\r |
95c2e69a | 73 | immediately preceding the Interrupt Descriptor Table (IDT) in memory.\r |
79e4f2a5 | 74 | For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes\r |
95c2e69a LG |
75 | immediately preceding the Interrupt Descriptor Table (IDT) in memory.\r |
76 | For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in\r | |
79e4f2a5 RN |
77 | a dedicated CPU register. This means that there is no memory storage\r |
78 | associated with storing the PEI Services Table pointer, so no additional\r | |
95c2e69a LG |
79 | migration actions are required for Itanium or ARM CPUs.\r |
80 | \r | |
81 | **/\r | |
82 | VOID\r | |
83 | EFIAPI\r | |
84 | MigratePeiServicesTablePointer (\r | |
85 | VOID\r | |
86 | )\r | |
87 | {\r | |
88 | //\r | |
79e4f2a5 | 89 | // PEI Services Table pointer is cached in SRAM. No additional\r |
95c2e69a LG |
90 | // migration actions are required.\r |
91 | //\r | |
92 | return;\r | |
93 | }\r | |
946bfba2 | 94 | \r |
95 | \r |