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Fix UINT64 multi const issues.
[mirror_edk2.git] / IntelFrameworkModulePkg / Bus / Pci / PciBus / Dxe / PciCommand.h
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ead42efc 1/*++\r
2\r
3Copyright (c) 2006, Intel Corporation \r
4All rights reserved. This program and the accompanying materials \r
5are licensed and made available under the terms and conditions of the BSD License \r
6which accompanies this distribution. The full text of the license may be found at \r
7http://opensource.org/licenses/bsd-license.php \r
8 \r
9THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
10WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
11\r
12Module Name:\r
13 \r
14 PciCommand.h\r
15 \r
16Abstract:\r
17\r
18 PCI Bus Driver\r
19\r
20Revision History\r
21\r
22--*/\r
23\r
24#ifndef _EFI_PCI_COMMAND_H\r
25#define _EFI_PCI_COMMAND_H\r
26\r
27//\r
28// The PCI Command register bits owned by PCI Bus driver.\r
29//\r
30// They should be cleared at the beginning. The other registers\r
31// are owned by chipset, we should not touch them.\r
32//\r
33#define EFI_PCI_COMMAND_BITS_OWNED ( \\r
34 EFI_PCI_COMMAND_IO_SPACE | \\r
35 EFI_PCI_COMMAND_MEMORY_SPACE | \\r
36 EFI_PCI_COMMAND_BUS_MASTER | \\r
37 EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE | \\r
38 EFI_PCI_COMMAND_VGA_PALETTE_SNOOP | \\r
39 EFI_PCI_COMMAND_FAST_BACK_TO_BACK \\r
40 )\r
41\r
42//\r
43// The PCI Bridge Control register bits owned by PCI Bus driver.\r
44// \r
45// They should be cleared at the beginning. The other registers\r
46// are owned by chipset, we should not touch them.\r
47//\r
48#define EFI_PCI_BRIDGE_CONTROL_BITS_OWNED ( \\r
49 EFI_PCI_BRIDGE_CONTROL_ISA | \\r
50 EFI_PCI_BRIDGE_CONTROL_VGA | \\r
51 EFI_PCI_BRIDGE_CONTROL_VGA_16 | \\r
52 EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK \\r
53 )\r
54\r
55//\r
56// The PCCard Bridge Control register bits owned by PCI Bus driver.\r
57// \r
58// They should be cleared at the beginning. The other registers\r
59// are owned by chipset, we should not touch them.\r
60//\r
61#define EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED ( \\r
62 EFI_PCI_BRIDGE_CONTROL_ISA | \\r
63 EFI_PCI_BRIDGE_CONTROL_VGA | \\r
64 EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK \\r
65 )\r
66\r
67\r
68#define EFI_GET_REGISTER 1\r
69#define EFI_SET_REGISTER 2\r
70#define EFI_ENABLE_REGISTER 3\r
71#define EFI_DISABLE_REGISTER 4\r
72\r
73EFI_STATUS\r
74PciOperateRegister (\r
75 IN PCI_IO_DEVICE *PciIoDevice,\r
76 IN UINT16 Command,\r
77 IN UINT8 Offset,\r
78 IN UINT8 Operation,\r
79 OUT UINT16 *PtrCommand\r
80 )\r
81/*++\r
82\r
83Routine Description:\r
84\r
85 TODO: Add function description\r
86\r
87Arguments:\r
88\r
89 PciIoDevice - TODO: add argument description\r
90 Command - TODO: add argument description\r
91 Offset - TODO: add argument description\r
92 Operation - TODO: add argument description\r
93 PtrCommand - TODO: add argument description\r
94\r
95Returns:\r
96\r
97 TODO: add return values\r
98\r
99--*/\r
100;\r
101\r
102BOOLEAN\r
103PciCapabilitySupport (\r
104 IN PCI_IO_DEVICE *PciIoDevice\r
105 )\r
106/*++\r
107\r
108Routine Description:\r
109\r
110 TODO: Add function description\r
111\r
112Arguments:\r
113\r
114 PciIoDevice - TODO: add argument description\r
115\r
116Returns:\r
117\r
118 TODO: add return values\r
119\r
120--*/\r
121;\r
122\r
123EFI_STATUS\r
124LocateCapabilityRegBlock (\r
125 IN PCI_IO_DEVICE *PciIoDevice,\r
126 IN UINT8 CapId,\r
127 IN OUT UINT8 *Offset,\r
128 OUT UINT8 *NextRegBlock OPTIONAL\r
129 )\r
130/*++\r
131\r
132Routine Description:\r
133\r
134 TODO: Add function description\r
135\r
136Arguments:\r
137\r
138 PciIoDevice - TODO: add argument description\r
139 CapId - TODO: add argument description\r
140 Offset - TODO: add argument description\r
141 NextRegBlock - TODO: add argument description\r
142\r
143Returns:\r
144\r
145 TODO: add return values\r
146\r
147--*/\r
148;\r
149\r
150\r
151#define PciReadCommandRegister(a,b) \\r
152 PciOperateRegister (a,0, PCI_COMMAND_OFFSET, EFI_GET_REGISTER, b)\r
153\r
154#define PciSetCommandRegister(a,b) \\r
155 PciOperateRegister (a,b, PCI_COMMAND_OFFSET, EFI_SET_REGISTER, NULL)\r
156 \r
157#define PciEnableCommandRegister(a,b) \\r
158 PciOperateRegister (a,b, PCI_COMMAND_OFFSET, EFI_ENABLE_REGISTER, NULL)\r
159 \r
160#define PciDisableCommandRegister(a,b) \\r
161 PciOperateRegister (a,b, PCI_COMMAND_OFFSET, EFI_DISABLE_REGISTER, NULL)\r
162\r
163#define PciReadBridgeControlRegister(a,b) \\r
164 PciOperateRegister (a,0, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_GET_REGISTER, b)\r
165 \r
166#define PciSetBridgeControlRegister(a,b) \\r
167 PciOperateRegister (a,b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_SET_REGISTER, NULL)\r
168\r
169#define PciEnableBridgeControlRegister(a,b) \\r
170 PciOperateRegister (a,b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_ENABLE_REGISTER, NULL)\r
171 \r
172#define PciDisableBridgeControlRegister(a,b) \\r
173 PciOperateRegister (a,b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_DISABLE_REGISTER, NULL)\r
174\r
175#endif\r