[mirror_edk2.git] / IntelFrameworkModulePkg / Bus / Pci / PciBusDxe / PciLib.h

/*++\r
\r
Copyright (c) 2006 - 2007, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution.  The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
Module Name:\r
\r
  PciLib.h\r
\r
Abstract:\r
\r
  PCI Bus Driver Lib header file.\r
  Please use PCD feature flag PcdPciBusHotplugDeviceSupport to enable\r
  support hot plug.\r
\r
Revision History\r
\r
--*/\r
\r
#ifndef _EFI_PCI_LIB_H\r
#define _EFI_PCI_LIB_H\r
\r
//\r
// Mask definistions for PCD PcdPciIncompatibleDeviceSupportMask\r
//\r
#define PCI_INCOMPATIBLE_ACPI_RESOURCE_SUPPORT         0x01\r
#define PCI_INCOMPATIBLE_READ_SUPPORT                  0x02\r
#define PCI_INCOMPATIBLE_WRITE_SUPPORT                 0x04\r
#define PCI_INCOMPATIBLE_REGISTER_UPDATE_SUPPORT       0x08\r
#define PCI_INCOMPATIBLE_ACCESS_WIDTH_SUPPORT          0x0a\r
\r
typedef struct {\r
  EFI_HANDLE            Handle;\r
} EFI_DEVICE_HANDLE_EXTENDED_DATA_PAYLOAD;\r
\r
typedef struct {\r
  UINT32                             Bar;\r
  UINT16                             DevicePathSize;\r
  UINT16                             ReqResSize;\r
  UINT16                             AllocResSize;\r
  UINT8                              *DevicePath;\r
  UINT8                              *ReqRes;\r
  UINT8                              *AllocRes;\r
} EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD;\r
\r
void\r
InstallHotPlugRequestProtocol (\r
  IN  EFI_STATUS                    *Status\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  TODO: Add function description\r
\r
Arguments:\r
\r
  Status  - TODO: add argument description\r
\r
Returns:\r
\r
  TODO: add return values\r
\r
--*/\r
;\r
\r
VOID\r
InstallPciHotplugGuid (\r
  IN  PCI_IO_DEVICE                  *PciIoDevice\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  TODO: Add function description\r
\r
Arguments:\r
\r
  PciIoDevice - TODO: add argument description\r
\r
Returns:\r
\r
  TODO: add return values\r
\r
--*/\r
;\r
\r
VOID\r
UninstallPciHotplugGuid (\r
  IN  PCI_IO_DEVICE                  *PciIoDevice\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  TODO: Add function description\r
\r
Arguments:\r
\r
  PciIoDevice - TODO: add argument description\r
\r
Returns:\r
\r
  TODO: add return values\r
\r
--*/\r
;\r
\r
VOID\r
GetBackPcCardBar (\r
  IN  PCI_IO_DEVICE                  *PciIoDevice\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  TODO: Add function description\r
\r
Arguments:\r
\r
  PciIoDevice - TODO: add argument description\r
\r
Returns:\r
\r
  TODO: add return values\r
\r
--*/\r
;\r
\r
EFI_STATUS\r
RemoveRejectedPciDevices (\r
  EFI_HANDLE        RootBridgeHandle,\r
  IN PCI_IO_DEVICE  *Bridge\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  TODO: Add function description\r
\r
Arguments:\r
\r
  RootBridgeHandle  - TODO: add argument description\r
  Bridge            - TODO: add argument description\r
\r
Returns:\r
\r
  TODO: add return values\r
\r
--*/\r
;\r
\r
EFI_STATUS\r
PciHostBridgeResourceAllocator (\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  TODO: Add function description\r
\r
Arguments:\r
\r
  PciResAlloc - TODO: add argument description\r
\r
Returns:\r
\r
  TODO: add return values\r
\r
--*/\r
;\r
\r
EFI_STATUS\r
PciHostBridgeResourceAllocator_WithoutHotPlugDeviceSupport (\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
  )\r
;\r
\r
EFI_STATUS\r
PciHostBridgeResourceAllocator_WithHotPlugDeviceSupport (\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
  )\r
;\r
\r
EFI_STATUS\r
PciScanBus (\r
  IN PCI_IO_DEVICE                      *Bridge,\r
  IN UINT8                              StartBusNumber,\r
  OUT UINT8                             *SubBusNumber,\r
  OUT UINT8                             *PaddedBusRange\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  TODO: Add function description\r
\r
Arguments:\r
\r
  Bridge          - TODO: add argument description\r
  StartBusNumber  - TODO: add argument description\r
  SubBusNumber    - TODO: add argument description\r
  PaddedBusRange  - TODO: add argument description\r
\r
Returns:\r
\r
  TODO: add return values\r
\r
--*/\r
;\r
\r
EFI_STATUS\r
PciScanBus_WithHotPlugDeviceSupport (\r
  IN PCI_IO_DEVICE                      *Bridge,\r
  IN UINT8                              StartBusNumber,\r
  OUT UINT8                             *SubBusNumber,\r
  OUT UINT8                             *PaddedBusRange\r
  )\r
;\r
\r
EFI_STATUS\r
PciScanBus_WithoutHotPlugDeviceSupport (\r
  IN PCI_IO_DEVICE                      *Bridge,\r
  IN UINT8                              StartBusNumber,\r
  OUT UINT8                             *SubBusNumber,\r
  OUT UINT8                             *PaddedBusRange\r
  )\r
;\r
\r
EFI_STATUS\r
PciRootBridgeP2CProcess (\r
  IN PCI_IO_DEVICE *Bridge\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  TODO: Add function description\r
\r
Arguments:\r
\r
  Bridge  - TODO: add argument description\r
\r
Returns:\r
\r
  TODO: add return values\r
\r
--*/\r
;\r
\r
EFI_STATUS\r
PciHostBridgeP2CProcess (\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  TODO: Add function description\r
\r
Arguments:\r
\r
  PciResAlloc - TODO: add argument description\r
\r
Returns:\r
\r
  TODO: add return values\r
\r
--*/\r
;\r
\r
EFI_STATUS\r
PciHostBridgeEnumerator (\r
  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  *PciResAlloc\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  TODO: Add function description\r
\r
Arguments:\r
\r
  PciResAlloc - TODO: add argument description\r
\r
Returns:\r
\r
  TODO: add return values\r
\r
--*/\r
;\r
\r
/**\r
  Read PCI configuration space through EFI_PCI_IO_PROTOCOL.\r
\r
  @param  PciIo               A pointer to the EFI_PCI_O_PROTOCOL.\r
  @param  Width               Signifies the width of the memory operations.\r
  @Param  Address             The address within the PCI configuration space for the PCI controller.\r
  @param  Buffer              For read operations, the destination buffer to store the results. For\r
                              write operations, the source buffer to write data from.\r
\r
  @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.\r
  @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.\r
  @retval EFI_INVALID_PARAMETER  Buffer is NULL.\r
  @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.\r
\r
**/\r
EFI_STATUS\r
PciIoRead (\r
  IN       EFI_PCI_IO_PROTOCOL                    *PciIo,\r
  IN       EFI_PCI_IO_PROTOCOL_WIDTH              Width,\r
  IN       UINT32                                 Address,\r
  IN       UINTN                                  Count,\r
  IN OUT   VOID                                   *Buffer\r
  );\r
\r
/**\r
  Write PCI configuration space through EFI_PCI_IO_PROTOCOL.\r
\r
  @param  PciIo               A pointer to the EFI_PCI_O_PROTOCOL.\r
  @param  Width               Signifies the width of the memory operations.\r
  @Param  Address             The address within the PCI configuration space for the PCI controller.\r
  @param  Buffer              For read operations, the destination buffer to store the results. For\r
                              write operations, the source buffer to write data from.\r
\r
  @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.\r
  @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.\r
  @retval EFI_INVALID_PARAMETER  Buffer is NULL.\r
  @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.\r
\r
**/\r
EFI_STATUS\r
PciIoWrite (\r
  IN       EFI_PCI_IO_PROTOCOL                    *PciIo,\r
  IN       EFI_PCI_IO_PROTOCOL_WIDTH              Width,\r
  IN       UINT32                                 Address,\r
  IN       UINTN                                  Count,\r
  IN OUT   VOID                                   *Buffer\r
  );\r
\r
/**\r
  Write PCI configuration space through EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
\r
  @param  PciRootBridgeIo     A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Pci                 A pointer to PCI_TYPE00.\r
  @param  Width               Signifies the width of the memory operations.\r
  @Param  Address             The address within the PCI configuration space for the PCI controller.\r
  @param  Buffer              For read operations, the destination buffer to store the results. For\r
                              write operations, the source buffer to write data from.\r
\r
  @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.\r
  @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.\r
  @retval EFI_INVALID_PARAMETER  Buffer is NULL.\r
  @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.\r
\r
**/\r
EFI_STATUS\r
PciRootBridgeIoWrite (\r
  IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *PciRootBridgeIo,\r
  IN       PCI_TYPE00                             *Pci,\r
  IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,\r
  IN       UINT64                                 Address,\r
  IN       UINTN                                  Count,\r
  IN OUT   VOID                                   *Buffer\r
  );\r
\r
/**\r
  Read PCI configuration space through EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
\r
  @param  PciRootBridgeIo     A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Pci                 A pointer to PCI_TYPE00.\r
  @param  Width               Signifies the width of the memory operations.\r
  @Param  Address             The address within the PCI configuration space for the PCI controller.\r
  @param  Buffer              For read operations, the destination buffer to store the results. For\r
                              write operations, the source buffer to write data from.\r
\r
  @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.\r
  @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.\r
  @retval EFI_INVALID_PARAMETER  Buffer is NULL.\r
  @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.\r
\r
**/\r
EFI_STATUS\r
PciRootBridgeIoRead (\r
  IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *PciRootBridgeIo,\r
  IN       PCI_TYPE00                             *Pci,\r
  IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,\r
  IN       UINT64                                 Address,\r
  IN       UINTN                                  Count,\r
  IN OUT   VOID                                   *Buffer\r
  );\r
#endif\r
Commit	Line	Data
ead42efc	1	/*++\r
	2	\r
	3	Copyright (c) 2006 - 2007, Intel Corporation\r
	4	All rights reserved. This program and the accompanying materials\r
	5	are licensed and made available under the terms and conditions of the BSD License\r
	6	which accompanies this distribution. The full text of the license may be found at\r
	7	http://opensource.org/licenses/bsd-license.php\r
	8	\r
	9	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	10	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	11	\r
	12	Module Name:\r
	13	\r
	14	PciLib.h\r
	15	\r
	16	Abstract:\r
	17	\r
	18	PCI Bus Driver Lib header file.\r
	19	Please use PCD feature flag PcdPciBusHotplugDeviceSupport to enable\r
	20	support hot plug.\r
	21	\r
	22	Revision History\r
	23	\r
	24	--*/\r
	25	\r
	26	#ifndef _EFI_PCI_LIB_H\r
	27	#define _EFI_PCI_LIB_H\r
	28	\r
	29	//\r
	30	// Mask definistions for PCD PcdPciIncompatibleDeviceSupportMask\r
	31	//\r
	32	#define PCI_INCOMPATIBLE_ACPI_RESOURCE_SUPPORT 0x01\r
	33	#define PCI_INCOMPATIBLE_READ_SUPPORT 0x02\r
	34	#define PCI_INCOMPATIBLE_WRITE_SUPPORT 0x04\r
	35	#define PCI_INCOMPATIBLE_REGISTER_UPDATE_SUPPORT 0x08\r
	36	#define PCI_INCOMPATIBLE_ACCESS_WIDTH_SUPPORT 0x0a\r
	37	\r
a43264f4	38	typedef struct {\r
	39	EFI_HANDLE Handle;\r
	40	} EFI_DEVICE_HANDLE_EXTENDED_DATA_PAYLOAD;\r
	41	\r
	42	typedef struct {\r
	43	UINT32 Bar;\r
	44	UINT16 DevicePathSize;\r
	45	UINT16 ReqResSize;\r
	46	UINT16 AllocResSize;\r
	47	UINT8 *DevicePath;\r
	48	UINT8 *ReqRes;\r
	49	UINT8 *AllocRes;\r
	50	} EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD;\r
	51	\r
	52	void\r
ead42efc	53	InstallHotPlugRequestProtocol (\r
	54	IN EFI_STATUS *Status\r
	55	)\r
	56	/*++\r
	57	\r
	58	Routine Description:\r
	59	\r
	60	TODO: Add function description\r
	61	\r
	62	Arguments:\r
	63	\r
	64	Status - TODO: add argument description\r
	65	\r
	66	Returns:\r
	67	\r
	68	TODO: add return values\r
	69	\r
	70	--*/\r
	71	;\r
	72	\r
	73	VOID\r
	74	InstallPciHotplugGuid (\r
	75	IN PCI_IO_DEVICE *PciIoDevice\r
	76	)\r
	77	/*++\r
	78	\r
	79	Routine Description:\r
	80	\r
	81	TODO: Add function description\r
	82	\r
	83	Arguments:\r
	84	\r
	85	PciIoDevice - TODO: add argument description\r
	86	\r
	87	Returns:\r
	88	\r
	89	TODO: add return values\r
	90	\r
	91	--*/\r
	92	;\r
	93	\r
	94	VOID\r
	95	UninstallPciHotplugGuid (\r
	96	IN PCI_IO_DEVICE *PciIoDevice\r
	97	)\r
	98	/*++\r
	99	\r
	100	Routine Description:\r
	101	\r
	102	TODO: Add function description\r
	103	\r
	104	Arguments:\r
	105	\r
	106	PciIoDevice - TODO: add argument description\r
	107	\r
	108	Returns:\r
	109	\r
	110	TODO: add return values\r
	111	\r
	112	--*/\r
	113	;\r
	114	\r
	115	VOID\r
	116	GetBackPcCardBar (\r
117	IN PCI_IO_DEVICE *PciIoDevice\r
118	)\r
119	/*++\r
120	\r
121	Routine Description:\r
122	\r
123	TODO: Add function description\r
124	\r
125	Arguments:\r
126	\r
127	PciIoDevice - TODO: add argument description\r
128	\r
129	Returns:\r
130	\r
131	TODO: add return values\r
132	\r
133	--*/\r
134	;\r
135	\r
136	EFI_STATUS\r
137	RemoveRejectedPciDevices (\r
138	EFI_HANDLE RootBridgeHandle,\r
139	IN PCI_IO_DEVICE *Bridge\r
140	)\r
141	/*++\r
142	\r
143	Routine Description:\r
144	\r
145	TODO: Add function description\r
146	\r
147	Arguments:\r
148	\r
149	RootBridgeHandle - TODO: add argument description\r
150	Bridge - TODO: add argument description\r
151	\r
152	Returns:\r
153	\r
154	TODO: add return values\r
155	\r
156	--*/\r
157	;\r
158	\r
159	EFI_STATUS\r
160	PciHostBridgeResourceAllocator (\r
161	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
162	)\r
163	/*++\r
164	\r
165	Routine Description:\r
166	\r
167	TODO: Add function description\r
168	\r
169	Arguments:\r
170	\r
171	PciResAlloc - TODO: add argument description\r
172	\r
173	Returns:\r
174	\r
175	TODO: add return values\r
176	\r
177	--*/\r
178	;\r
179	\r
180	EFI_STATUS\r
181	PciHostBridgeResourceAllocator_WithoutHotPlugDeviceSupport (\r
182	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
183	)\r
184	;\r
185	\r
186	EFI_STATUS\r
187	PciHostBridgeResourceAllocator_WithHotPlugDeviceSupport (\r
188	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
189	)\r
190	;\r
191	\r
192	EFI_STATUS\r
193	PciScanBus (\r
194	IN PCI_IO_DEVICE *Bridge,\r
195	IN UINT8 StartBusNumber,\r
196	OUT UINT8 *SubBusNumber,\r
197	OUT UINT8 *PaddedBusRange\r
198	)\r
199	/*++\r
200	\r
201	Routine Description:\r
202	\r
203	TODO: Add function description\r
204	\r
205	Arguments:\r
206	\r
207	Bridge - TODO: add argument description\r
208	StartBusNumber - TODO: add argument description\r
209	SubBusNumber - TODO: add argument description\r
210	PaddedBusRange - TODO: add argument description\r
211	\r
212	Returns:\r
213	\r
214	TODO: add return values\r
215	\r
216	--*/\r
217	;\r
218	\r
219	EFI_STATUS\r
220	PciScanBus_WithHotPlugDeviceSupport (\r
221	IN PCI_IO_DEVICE *Bridge,\r
222	IN UINT8 StartBusNumber,\r
223	OUT UINT8 *SubBusNumber,\r
224	OUT UINT8 *PaddedBusRange\r
225	)\r
226	;\r
227	\r
228	EFI_STATUS\r
229	PciScanBus_WithoutHotPlugDeviceSupport (\r
230	IN PCI_IO_DEVICE *Bridge,\r
231	IN UINT8 StartBusNumber,\r
232	OUT UINT8 *SubBusNumber,\r
233	OUT UINT8 *PaddedBusRange\r
234	)\r
235	;\r
236	\r
237	EFI_STATUS\r
238	PciRootBridgeP2CProcess (\r
239	IN PCI_IO_DEVICE *Bridge\r
240	)\r
241	/*++\r
242	\r
243	Routine Description:\r
244	\r
245	TODO: Add function description\r
246	\r
247	Arguments:\r
248	\r
249	Bridge - TODO: add argument description\r
250	\r
251	Returns:\r
252	\r
253	TODO: add return values\r
254	\r
255	--*/\r
256	;\r
257	\r
258	EFI_STATUS\r
259	PciHostBridgeP2CProcess (\r
260	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
261	)\r
262	/*++\r
263	\r
264	Routine Description:\r
265	\r
266	TODO: Add function description\r
267	\r
268	Arguments:\r
269	\r
270	PciResAlloc - TODO: add argument description\r
271	\r
272	Returns:\r
273	\r
274	TODO: add return values\r
275	\r
276	--*/\r
277	;\r
278	\r
279	EFI_STATUS\r
280	PciHostBridgeEnumerator (\r
281	EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
282	)\r
283	/*++\r
284	\r
285	Routine Description:\r
286	\r
287	TODO: Add function description\r
288	\r
289	Arguments:\r
290	\r
291	PciResAlloc - TODO: add argument description\r
292	\r
293	Returns:\r
294	\r
295	TODO: add return values\r
296	\r
297	--*/\r
298	;\r
299	\r
300	/**\r
301	Read PCI configuration space through EFI_PCI_IO_PROTOCOL.\r
302	\r
303	@param PciIo A pointer to the EFI_PCI_O_PROTOCOL.\r
304	@param Width Signifies the width of the memory operations.\r
305	@Param Address The address within the PCI configuration space for the PCI controller.\r
306	@param Buffer For read operations, the destination buffer to store the results. For\r
307	write operations, the source buffer to write data from.\r
308	\r
309	@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
310	@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
311	@retval EFI_INVALID_PARAMETER Buffer is NULL.\r
312	@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
313	\r
314	**/\r
315	EFI_STATUS\r
316	PciIoRead (\r
317	IN EFI_PCI_IO_PROTOCOL *PciIo,\r
318	IN EFI_PCI_IO_PROTOCOL_WIDTH Width,\r
319	IN UINT32 Address,\r
320	IN UINTN Count,\r
321	IN OUT VOID *Buffer\r
322	);\r
323	\r
324	/**\r
325	Write PCI configuration space through EFI_PCI_IO_PROTOCOL.\r
326	\r
327	@param PciIo A pointer to the EFI_PCI_O_PROTOCOL.\r
328	@param Width Signifies the width of the memory operations.\r
329	@Param Address The address within the PCI configuration space for the PCI controller.\r
330	@param Buffer For read operations, the destination buffer to store the results. For\r
331	write operations, the source buffer to write data from.\r
332	\r
333	@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
334	@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
335	@retval EFI_INVALID_PARAMETER Buffer is NULL.\r
336	@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
337	\r
338	**/\r
339	EFI_STATUS\r
340	PciIoWrite (\r
341	IN EFI_PCI_IO_PROTOCOL *PciIo,\r
342	IN EFI_PCI_IO_PROTOCOL_WIDTH Width,\r
343	IN UINT32 Address,\r
344	IN UINTN Count,\r
345	IN OUT VOID *Buffer\r
346	);\r
347	\r
348	/**\r
349	Write PCI configuration space through EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
350	\r
351	@param PciRootBridgeIo A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
352	@param Pci A pointer to PCI_TYPE00.\r
353	@param Width Signifies the width of the memory operations.\r
354	@Param Address The address within the PCI configuration space for the PCI controller.\r
355	@param Buffer For read operations, the destination buffer to store the results. For\r
356	write operations, the source buffer to write data from.\r
357	\r
358	@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
359	@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
360	@retval EFI_INVALID_PARAMETER Buffer is NULL.\r
361	@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
362	\r
363	**/\r
364	EFI_STATUS\r
365	PciRootBridgeIoWrite (\r
366	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,\r
367	IN PCI_TYPE00 *Pci,\r
368	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r
369	IN UINT64 Address,\r
370	IN UINTN Count,\r
371	IN OUT VOID *Buffer\r
372	);\r
373	\r
374	/**\r
375	Read PCI configuration space through EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
376	\r
377	@param PciRootBridgeIo A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
378	@param Pci A pointer to PCI_TYPE00.\r
379	@param Width Signifies the width of the memory operations.\r
380	@Param Address The address within the PCI configuration space for the PCI controller.\r
381	@param Buffer For read operations, the destination buffer to store the results. For\r
382	write operations, the source buffer to write data from.\r
383	\r
384	@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
385	@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
386	@retval EFI_INVALID_PARAMETER Buffer is NULL.\r
387	@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
388	\r
389	**/\r
390	EFI_STATUS\r
391	PciRootBridgeIoRead (\r
392	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,\r
393	IN PCI_TYPE00 *Pci,\r
394	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r
395	IN UINT64 Address,\r
396	IN UINTN Count,\r
397	IN OUT VOID *Buffer\r
398	);\r
399	#endif\r