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8ca67c46 1/** @file\r
099fae5d 2 ISA I/O Protocol is used by ISA device drivers to perform I/O, MMIO and DMA \r
3 operations on the ISA controllers they manage.\r
4 \r
5 Copyright (c) 2006 - 2009, Intel Corporation\r
6 All rights reserved. This program and the accompanying materials\r
7 are licensed and made available under the terms and conditions of the BSD License\r
8 which accompanies this distribution. The full text of the license may be found at\r
9 http://opensource.org/licenses/bsd-license.php\r
10\r
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
c3902377 13\r
3db51098 14**/\r
c3902377 15\r
8ca67c46 16#ifndef _EFI_ISA_IO_H_\r
17#define _EFI_ISA_IO_H_\r
c3902377 18\r
c3902377 19#include <Protocol/IsaAcpi.h>\r
20\r
099fae5d 21///\r
22/// Global ID for the EFI_ISA_IO_PROTOCOL\r
23///\r
c3902377 24#define EFI_ISA_IO_PROTOCOL_GUID \\r
099fae5d 25 { \\r
26 0x7ee2bd44, 0x3da0, 0x11d4, { 0x9a, 0x38, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \\r
27 }\r
c3902377 28\r
099fae5d 29///\r
30/// Forward declaration for the EFI_ISA_IO_PROTOCOL\r
31///\r
c3902377 32typedef struct _EFI_ISA_IO_PROTOCOL EFI_ISA_IO_PROTOCOL;\r
33\r
099fae5d 34///\r
35/// Width of EFI_ISA_IO_PROTOCOL I/O Port and MMIO operations\r
36///\r
c3902377 37typedef enum {\r
099fae5d 38 EfiIsaIoWidthUint8 = 0, ///< 8-bit operation\r
39 EfiIsaIoWidthUint16, ///< 16-bit operation\r
40 EfiIsaIoWidthUint32, ///< 32-bit operation\r
c3902377 41 EfiIsaIoWidthReserved,\r
099fae5d 42 EfiIsaIoWidthFifoUint8, ///< 8-bit FIFO operation\r
43 EfiIsaIoWidthFifoUint16, ///< 16-bit FIFO operation\r
44 EfiIsaIoWidthFifoUint32, ///< 32-bit FIFO operation\r
c3902377 45 EfiIsaIoWidthFifoReserved,\r
099fae5d 46 EfiIsaIoWidthFillUint8, ///< 8-bit Fill operation\r
47 EfiIsaIoWidthFillUint16, ///< 16-bit Fill operation\r
48 EfiIsaIoWidthFillUint32, ///< 32-bit Fill operation\r
c3902377 49 EfiIsaIoWidthFillReserved,\r
50 EfiIsaIoWidthMaximum\r
51} EFI_ISA_IO_PROTOCOL_WIDTH;\r
52\r
099fae5d 53///\r
54/// Attributes for the EFI_ISA_IO_PROTOCOL common DMA buffer allocations\r
55///\r
f4671790 56#define EFI_ISA_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x080 ///< Map a memory range so write are combined\r
7b6b7746 57#define EFI_ISA_IO_ATTRIBUTE_MEMORY_CACHED 0x800 ///< Map a memory range so all read and write accesses are cached\r
f4671790 58#define EFI_ISA_IO_ATTRIBUTE_MEMORY_DISABLE 0x1000 ///< Disable a memory range \r
c3902377 59\r
099fae5d 60///\r
61/// Channel attribute for EFI_ISA_IO_PROTOCOL slave DMA requests\r
62///\r
63#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_SPEED_COMPATIBLE 0x001 ///< Set the speed of the DMA transfer in compatible mode\r
64#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_SPEED_A 0x002 ///< Not supported\r
65#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_SPEED_B 0x004 ///< Not supported\r
66#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_SPEED_C 0x008 ///< Not supported\r
67#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_WIDTH_8 0x010 ///< Request 8-bit DMA transfers. Only available on channels 0..3\r
68#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_WIDTH_16 0x020 ///< Request 16-bit DMA transfers. Only available on channels 4..7\r
69#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_SINGLE_MODE 0x040 ///< Request a single DMA transfer\r
7b6b7746 70#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_DEMAND_MODE 0x080 ///< Request multiple DMA transfers until TC (Terminal Count) or EOP (End of Process)\r
099fae5d 71#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_AUTO_INITIALIZE 0x100 ///< Automatically reload base and count at the end of the DMA transfer\r
72\r
73///\r
74/// The DMA opreration type for EFI_ISA_IO_PROTOCOL DMA requests\r
75///\r
c3902377 76typedef enum {\r
099fae5d 77 ///\r
78 /// A read operation from system memory by a bus master.\r
79 ///\r
c3902377 80 EfiIsaIoOperationBusMasterRead,\r
099fae5d 81 ///\r
82 /// A write operation to system memory by a bus master.\r
83 ///\r
c3902377 84 EfiIsaIoOperationBusMasterWrite,\r
099fae5d 85 ///\r
86 /// Provides both read and write access to system memory by both the processor\r
87 /// and a bus master. The buffer is coherent from both the processor's and the \r
88 /// bus master's point of view.\r
89 ///\r
c3902377 90 EfiIsaIoOperationBusMasterCommonBuffer,\r
099fae5d 91 ///\r
92 /// A read operation from system memory by a slave device.\r
93 ///\r
c3902377 94 EfiIsaIoOperationSlaveRead,\r
099fae5d 95 ///\r
96 /// A write operation to system memory by a slave master.\r
97 ///\r
c3902377 98 EfiIsaIoOperationSlaveWrite,\r
99 EfiIsaIoOperationMaximum\r
100} EFI_ISA_IO_PROTOCOL_OPERATION;\r
101\r
f4671790 102/**\r
099fae5d 103 Performs ISA I/O and MMIO Read/Write Cycles\r
104\r
105 @param[in] This A pointer to the EFI_ISA_IO_PROTOCOL instance. \r
106 @param[in] Width Specifies the width of the I/O or MMIO operation.\r
107 @param[in] Offset The offset into the ISA I/O or MMIO space to start the \r
108 operation. \r
109 @param[in] Count The number of I/O or MMIO operations to perform.\r
110 @param[in, out] Buffer For read operations, the destination buffer to store \r
111 the results. For write operations, the source buffer to \r
112 write data from. \r
113 \r
7b6b7746 114 @retval EFI_SUCCESS The data was successfully read from or written to the device.\r
f4671790
LG
115 @retval EFI_UNSUPPORTED The Offset is not valid for this device.\r
116 @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.\r
117 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
118\r
119**/\r
c3902377 120typedef\r
121EFI_STATUS\r
099fae5d 122(EFIAPI *EFI_ISA_IO_PROTOCOL_IO_MEM)(\r
123 IN EFI_ISA_IO_PROTOCOL *This,\r
124 IN EFI_ISA_IO_PROTOCOL_WIDTH Width,\r
125 IN UINT32 Offset,\r
126 IN UINTN Count,\r
127 IN OUT VOID *Buffer\r
c3902377 128 );\r
129\r
099fae5d 130///\r
131/// Structure of functions for accessing ISA I/O and MMIO space\r
132///\r
c3902377 133typedef struct {\r
099fae5d 134 ///\r
135 /// Read from ISA I/O or MMIO space.\r
136 ///\r
c3902377 137 EFI_ISA_IO_PROTOCOL_IO_MEM Read;\r
099fae5d 138 ///\r
139 /// Write to ISA I/O or MMIO space.\r
140 ///\r
c3902377 141 EFI_ISA_IO_PROTOCOL_IO_MEM Write;\r
142} EFI_ISA_IO_PROTOCOL_ACCESS;\r
143\r
f4671790 144/**\r
099fae5d 145 Copies data from one region of ISA MMIO space to another region of ISA\r
146 MMIO space.\r
f4671790 147\r
099fae5d 148 @param[in] This A pointer to the EFI_ISA_IO_PROTOCOL instance.\r
149 @param[in] Width Specifies the width of the MMIO copy operation.\r
150 @param[in] DestOffset The offset of the destination in ISA MMIO space\r
151 @param[in] SrcOffset The offset of the source in ISA MMIO space\r
152 @param[in] Count The number tranfers to perform for this copy operation\r
f4671790
LG
153\r
154 @retval EFI_SUCCESS The data was copied sucessfully.\r
155 @retval EFI_UNSUPPORTED The DestOffset or SrcOffset is not valid for this device.\r
156 @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.\r
157 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
158\r
159**/\r
c3902377 160typedef\r
161EFI_STATUS\r
099fae5d 162(EFIAPI *EFI_ISA_IO_PROTOCOL_COPY_MEM)(\r
163 IN EFI_ISA_IO_PROTOCOL *This,\r
164 IN EFI_ISA_IO_PROTOCOL_WIDTH Width,\r
165 IN UINT32 DestOffset,\r
166 IN UINT32 SrcOffset,\r
167 IN UINTN Count\r
c3902377 168 );\r
169\r
f4671790 170/**\r
099fae5d 171 Maps a memory region for DMA.\r
172\r
7b6b7746 173 This function returns the device-specific addresses required to access system memory.\r
099fae5d 174 This function is used to map system memory for ISA DMA operations. All ISA DMA \r
7b6b7746 175 operations must be performed through their mapped addresses, and such mappings must \r
176 be freed with EFI_ISA_IO_PROTOCOL.Unmap() after the DMA operation is completed.\r
177 \r
099fae5d 178 If the DMA operation is a single read or write data transfer through an ISA bus \r
179 master, then EfiIsaIoOperationBusMasterRead or EfiIsaIoOperationBusMasterWrite \r
180 is used and the range is unmapped to complete the operation. If the DMA operation\r
181 is a single read or write data transfer through an ISA slave controller, then \r
182 EfiIsaIoOperationSlaveRead or EfiIsaIoOperationSlaveWrite is used and the range \r
7b6b7746 183 is unmapped to complete the operation. \r
184 \r
185 If performing a DMA read operation, all the data must be present in system memory before the Map() is performed. Similarly, \r
099fae5d 186 if performing a DMA write operation, the data must not be accessed in system \r
187 memory until EFI_ISA_IO_PROTOCOL.Unmap() is performed. Bus master operations that \r
188 require both read and write access or require multiple host device interactions \r
189 within the same mapped region must use EfiIsaIoOperationBusMasterCommonBuffer. \r
190 However, only memory allocated via the EFI_ISA_IO_PROTOCOL.AllocateBuffer() interface \r
7b6b7746 191 is guaranteed to be able to be mapped for this operation type. In all mapping \r
099fae5d 192 requests the NumberOfBytes returned may be less than originally requested. It is\r
193 the caller's responsibility to make additional requests to complete the entire\r
194 transfer.\r
195\r
196 @param[in] This A pointer to the EFI_ISA_IO_PROTOCOL instance.\r
197 @param[in] Operation Indicates the type of DMA (slave or bus master), \r
198 and if the DMA operation is going to read or \r
199 write to system memory. \r
200 @param[in] ChannelNumber The slave channel number to use for this DMA \r
201 operation. If Operation and ChannelAttributes \r
202 shows that this device performs bus mastering \r
203 DMA, then this field is ignored. The legal \r
204 range for this field is 0..7.\r
205 @param[in] ChannelAttributes A bitmask of the attributes used to configure\r
206 the slave DMA channel for this DMA operation. \r
207 See EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_* for the\r
208 legal bit combinations.\r
209 @param[in] HostAddress The system memory address to map to the device.\r
210 @param[in, out] NumberOfBytes On input the number of bytes to map. On \r
211 output the number of bytes that were mapped.\r
212 @param[out] DeviceAddress The resulting map address for the bus master \r
213 device to use to access the hosts HostAddress. \r
214 @param[out] Mapping A returned value that must be passed to into\r
215 EFI_ISA_IO_PROTOCOL.Unmap() to free all the the \r
216 resources associated with this map request.\r
f4671790
LG
217\r
218 @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
099fae5d 219 @retval EFI_INVALID_PARAMETER The Operation is undefined.\r
220 @retval EFI_INVALID_PARAMETER The HostAddress is undefined.\r
f4671790
LG
221 @retval EFI_UNSUPPORTED The HostAddress can not be mapped as a common buffer.\r
222 @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.\r
223 @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.\r
224\r
225**/\r
c3902377 226typedef\r
227EFI_STATUS\r
099fae5d 228(EFIAPI *EFI_ISA_IO_PROTOCOL_MAP)(\r
c3902377 229 IN EFI_ISA_IO_PROTOCOL *This,\r
230 IN EFI_ISA_IO_PROTOCOL_OPERATION Operation,\r
231 IN UINT8 ChannelNumber OPTIONAL,\r
232 IN UINT32 ChannelAttributes,\r
233 IN VOID *HostAddress,\r
234 IN OUT UINTN *NumberOfBytes,\r
235 OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r
236 OUT VOID **Mapping\r
237 );\r
238\r
f4671790 239/**\r
099fae5d 240 Unmaps a memory region that was previously mapped with EFI_ISA_IO_PROTOCOL.Map()\r
f4671790 241\r
099fae5d 242 The EFI_ISA_IO_PROTOCOL.Map() operation is completed and any corresponding \r
243 resources are released. If the operation was EfiIsaIoOperationSlaveWrite \r
244 or EfiIsaIoOperationBusMasterWrite, the data is committed to system memory. \r
245 Any resources used for the mapping are freed.\r
f4671790 246\r
099fae5d 247 @param[in] This A pointer to the EFI_ISA_IO_PROTOCOL instance.\r
248 @param[in] Mapping The mapping value returned from EFI_ISA_IO_PROTOCOL.Map().\r
f4671790 249\r
099fae5d 250 @retval EFI_SUCCESS The memory region was unmapped.\r
251 @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.\r
f4671790 252**/\r
c3902377 253typedef\r
254EFI_STATUS\r
099fae5d 255(EFIAPI *EFI_ISA_IO_PROTOCOL_UNMAP)(\r
256 IN EFI_ISA_IO_PROTOCOL *This,\r
257 IN VOID *Mapping\r
c3902377 258 );\r
259\r
f4671790 260/**\r
099fae5d 261 Allocates pages that are suitable for an EfiIsaIoOperationBusMasterCommonBuffer\r
262 mapping. \r
f4671790 263\r
099fae5d 264 @param[in] This A pointer to the EFI_ISA_IO_PROTOCOL instance.\r
265 @param[in] Type The type allocation to perform. \r
266 @param[in] MemoryType The type of memory to allocate.\r
267 @param[in] Pages The number of pages to allocate.\r
268 @param[out] HostAddress A pointer to store the base address of the allocated range.\r
269 @param[in] Attributes The requested bit mask of attributes for the allocated range.\r
f4671790
LG
270\r
271 @retval EFI_SUCCESS The requested memory pages were allocated.\r
099fae5d 272 @retval EFI_INVALID_PARAMETER Type is invalid.\r
273 @retval EFI_INVALID_PARAMETER MemoryType is invalid\r
274 @retval EFI_INVALID_PARAMETER HostAddress is NULL\r
275 @retval EFI_UNSUPPORTED Attributes is unsupported.\r
276 @retval EFI_UNSUPPORTED The memory range specified by HostAddress, Pages,\r
277 and Type is not available for common buffer use.\r
f4671790
LG
278 @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.\r
279\r
280**/\r
c3902377 281typedef\r
282EFI_STATUS\r
099fae5d 283(EFIAPI *EFI_ISA_IO_PROTOCOL_ALLOCATE_BUFFER)(\r
284 IN EFI_ISA_IO_PROTOCOL *This,\r
285 IN EFI_ALLOCATE_TYPE Type,\r
286 IN EFI_MEMORY_TYPE MemoryType,\r
287 IN UINTN Pages,\r
288 OUT VOID **HostAddress,\r
289 IN UINT64 Attributes\r
c3902377 290 );\r
291\r
f4671790 292/**\r
099fae5d 293 Frees a common buffer that was allocated with EFI_ISA_IO_PROTOCOL.AllocateBuffer()\r
f4671790 294\r
099fae5d 295 @param[in] This A pointer to the EFI_ISA_IO_PROTOCOL instance.\r
296 @param[in] Pages The number of pages to free from the previously allocated common buffer.\r
297 @param[in] HostAddress The base address of the previously allocated common buffer.\r
f4671790
LG
298\r
299\r
300 @retval EFI_SUCCESS The requested memory pages were freed.\r
301 @retval EFI_INVALID_PARAMETER The memory was not allocated with EFI_ISA_IO.AllocateBufer().\r
302\r
303**/\r
c3902377 304typedef\r
305EFI_STATUS\r
099fae5d 306(EFIAPI *EFI_ISA_IO_PROTOCOL_FREE_BUFFER)(\r
307 IN EFI_ISA_IO_PROTOCOL *This,\r
308 IN UINTN Pages,\r
309 IN VOID *HostAddress\r
c3902377 310 );\r
311\r
f4671790 312/**\r
7b6b7746 313 Flushes a DMA buffer, which forces all DMA posted write transactions to complete.\r
f4671790 314\r
099fae5d 315 @param[in] This A pointer to the EFI_ISA_IO_PROTOCOL instance.\r
f4671790 316\r
099fae5d 317 @retval EFI_SUCCESS The DMA buffers were flushed.\r
f4671790
LG
318 @retval EFI_DEVICE_ERROR The buffers were not flushed due to a hardware error.\r
319\r
320**/\r
c3902377 321typedef\r
322EFI_STATUS\r
099fae5d 323(EFIAPI *EFI_ISA_IO_PROTOCOL_FLUSH)(\r
324 IN EFI_ISA_IO_PROTOCOL *This\r
c3902377 325 );\r
326\r
099fae5d 327///\r
328/// The EFI_ISA_IO_PROTOCOL provides the basic Memory, I/O, and DMA interfaces \r
329/// used to abstract accesses to ISA controllers. There is one EFI_ISA_IO_PROTOCOL \r
330/// instance for each ISA controller on a ISA bus. A device driver that wishes \r
331/// to manage an ISA controller in a system will have to retrieve the \r
7b6b7746 332/// ISA_PCI_IO_PROTOCOL instance associated with the ISA controller.\r
099fae5d 333///\r
c3902377 334struct _EFI_ISA_IO_PROTOCOL {\r
335 EFI_ISA_IO_PROTOCOL_ACCESS Mem;\r
336 EFI_ISA_IO_PROTOCOL_ACCESS Io;\r
337 EFI_ISA_IO_PROTOCOL_COPY_MEM CopyMem;\r
338 EFI_ISA_IO_PROTOCOL_MAP Map;\r
339 EFI_ISA_IO_PROTOCOL_UNMAP Unmap;\r
340 EFI_ISA_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;\r
341 EFI_ISA_IO_PROTOCOL_FREE_BUFFER FreeBuffer;\r
342 EFI_ISA_IO_PROTOCOL_FLUSH Flush;\r
099fae5d 343 ///\r
344 /// The list of I/O , MMIO, DMA, and Interrupt resources associated with the\r
345 /// ISA controller abstracted by this instance of the EFI_ISA_IO_PROTOCOL.\r
346 ///\r
c3902377 347 EFI_ISA_ACPI_RESOURCE_LIST *ResourceList;\r
099fae5d 348 ///\r
349 /// The size, in bytes, of the ROM image.\r
350 ///\r
c3902377 351 UINT32 RomSize;\r
099fae5d 352 ///\r
353 /// A pointer to the in memory copy of the ROM image. The ISA Bus Driver is responsible \r
354 /// for allocating memory for the ROM image, and copying the contents of the ROM to memory\r
355 /// during ISA Bus initialization.\r
356 /// \r
c3902377 357 VOID *RomImage;\r
358};\r
359\r
360extern EFI_GUID gEfiIsaIoProtocolGuid;\r
361\r
362#endif\r