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54bd896e | 1 | /** @file\r |
2 | The incompatible PCI device list\r | |
3 | \r | |
4 | Copyright (c) 2007 Intel Corporation. All rights reserved. <BR>\r | |
5 | This software and associated documentation (if any) is furnished\r | |
6 | under a license and may only be used or copied in accordance\r | |
7 | with the terms of the license. Except as permitted by such\r | |
8 | license, no part of this software or documentation may be\r | |
9 | reproduced, stored in a retrieval system, or transmitted in any\r | |
10 | form or by any means without the express written consent of\r | |
11 | Intel Corporation.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #ifndef _EFI_INCOMPATIBLE_PCI_DEVICE_LIST_H\r | |
16 | #define _EFI_INCOMPATIBLE_PCI_DEVICE_LIST_H\r | |
17 | \r | |
18 | //\r | |
a97a7e79 | 19 | // The package level header files this module uses\r |
54bd896e | 20 | //\r |
a97a7e79 | 21 | #include <PiDxe.h>\r |
22 | //\r | |
23 | // The Library classes this module consumes\r | |
24 | //\r | |
25 | #include <Library/PciIncompatibleDeviceSupportLib.h>\r | |
26 | #include <Library/MemoryAllocationLib.h>\r | |
27 | #include <Library/DebugLib.h>\r | |
54bd896e | 28 | \r |
29 | #include <IndustryStandard/pci22.h>\r | |
30 | #include <IndustryStandard/Acpi.h>\r | |
31 | \r | |
32 | \r | |
33 | #define PCI_DEVICE_ID(VendorId, DeviceId, Revision, SubVendorId, SubDeviceId) \\r | |
34 | VendorId, DeviceId, Revision, SubVendorId, SubDeviceId\r | |
35 | \r | |
36 | #define PCI_BAR_TYPE_IO ACPI_ADDRESS_SPACE_TYPE_IO\r | |
37 | #define PCI_BAR_TYPE_MEM ACPI_ADDRESS_SPACE_TYPE_MEM\r | |
38 | \r | |
39 | #define DEVICE_INF_TAG 0xFFF2\r | |
40 | #define DEVICE_RES_TAG 0xFFF1\r | |
41 | #define LIST_END_TAG 0x0000\r | |
42 | \r | |
43 | //\r | |
44 | // descriptor for access width of incompatible PCI device\r | |
45 | //\r | |
46 | typedef struct {\r | |
47 | UINT64 AccessType;\r | |
48 | UINT64 AccessWidth;\r | |
49 | EFI_PCI_REGISTER_ACCESS_DATA PciRegisterAccessData;\r | |
50 | } EFI_PCI_REGISTER_ACCESS_DESCRIPTOR;\r | |
51 | \r | |
52 | //\r | |
53 | // descriptor for register value of incompatible PCI device\r | |
54 | //\r | |
55 | typedef struct {\r | |
56 | UINT64 AccessType;\r | |
57 | UINT64 Offset;\r | |
58 | EFI_PCI_REGISTER_VALUE_DATA PciRegisterValueData;\r | |
59 | } EFI_PCI_REGISTER_VALUE_DESCRIPTOR;\r | |
60 | \r | |
61 | \r | |
62 | //\r | |
63 | // the incompatible PCI devices list for ACPI resource\r | |
64 | //\r | |
65 | GLOBAL_REMOVE_IF_UNREFERENCED UINT64 IncompatiblePciDeviceListForResource[] = {\r | |
66 | //\r | |
67 | // DEVICE_INF_TAG,\r | |
68 | // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),\r | |
69 | // DEVICE_RES_TAG,\r | |
70 | // ResType, GFlag , SFlag, Granularity, RangeMin,\r | |
71 | // RangeMax, Offset, AddrLen\r | |
72 | //\r | |
73 | //\r | |
74 | // Device Adaptec 9004\r | |
75 | //\r | |
76 | DEVICE_INF_TAG,\r | |
77 | PCI_DEVICE_ID(0x9004, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r | |
78 | DEVICE_RES_TAG,\r | |
79 | PCI_BAR_TYPE_IO,\r | |
80 | PCI_ACPI_UNUSED,\r | |
81 | PCI_ACPI_UNUSED,\r | |
82 | PCI_ACPI_UNUSED,\r | |
83 | PCI_ACPI_UNUSED,\r | |
84 | PCI_BAR_EVEN_ALIGN,\r | |
85 | PCI_BAR_ALL,\r | |
86 | PCI_BAR_NOCHANGE,\r | |
87 | //\r | |
88 | // Device Adaptec 9005\r | |
89 | //\r | |
90 | DEVICE_INF_TAG,\r | |
91 | PCI_DEVICE_ID(0x9005, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r | |
92 | DEVICE_RES_TAG,\r | |
93 | PCI_BAR_TYPE_IO,\r | |
94 | PCI_ACPI_UNUSED,\r | |
95 | PCI_ACPI_UNUSED,\r | |
96 | PCI_ACPI_UNUSED,\r | |
97 | PCI_ACPI_UNUSED,\r | |
98 | PCI_BAR_EVEN_ALIGN,\r | |
99 | PCI_BAR_ALL,\r | |
100 | PCI_BAR_NOCHANGE,\r | |
101 | //\r | |
102 | // Device QLogic 1007\r | |
103 | //\r | |
104 | DEVICE_INF_TAG,\r | |
105 | PCI_DEVICE_ID(0x1077, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r | |
106 | DEVICE_RES_TAG,\r | |
107 | PCI_BAR_TYPE_IO,\r | |
108 | PCI_ACPI_UNUSED,\r | |
109 | PCI_ACPI_UNUSED,\r | |
110 | PCI_ACPI_UNUSED,\r | |
111 | PCI_ACPI_UNUSED,\r | |
112 | PCI_BAR_EVEN_ALIGN,\r | |
113 | PCI_BAR_ALL,\r | |
114 | PCI_BAR_NOCHANGE,\r | |
115 | //\r | |
116 | // Device Agilent 103C\r | |
117 | //\r | |
118 | DEVICE_INF_TAG,\r | |
119 | PCI_DEVICE_ID(0x103C, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r | |
120 | DEVICE_RES_TAG,\r | |
121 | PCI_BAR_TYPE_IO,\r | |
122 | PCI_ACPI_UNUSED,\r | |
123 | PCI_ACPI_UNUSED,\r | |
124 | PCI_ACPI_UNUSED,\r | |
125 | PCI_ACPI_UNUSED,\r | |
126 | PCI_BAR_EVEN_ALIGN,\r | |
127 | PCI_BAR_ALL,\r | |
128 | PCI_BAR_NOCHANGE,\r | |
129 | //\r | |
130 | // Device Agilent 15BC\r | |
131 | //\r | |
132 | DEVICE_INF_TAG,\r | |
133 | PCI_DEVICE_ID(0x15BC, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r | |
134 | DEVICE_RES_TAG,\r | |
135 | PCI_BAR_TYPE_IO,\r | |
136 | PCI_ACPI_UNUSED,\r | |
137 | PCI_ACPI_UNUSED,\r | |
138 | PCI_ACPI_UNUSED,\r | |
139 | PCI_ACPI_UNUSED,\r | |
140 | PCI_BAR_EVEN_ALIGN,\r | |
141 | PCI_BAR_ALL,\r | |
142 | PCI_BAR_NOCHANGE,\r | |
143 | //\r | |
144 | // The end of the list\r | |
145 | //\r | |
146 | LIST_END_TAG\r | |
147 | };\r | |
148 | \r | |
149 | //\r | |
150 | // the incompatible PCI devices list for the values of configuration registers\r | |
151 | //\r | |
152 | GLOBAL_REMOVE_IF_UNREFERENCED UINT64 IncompatiblePciDeviceListForRegister[] = {\r | |
153 | //\r | |
154 | // DEVICE_INF_TAG,\r | |
155 | // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),\r | |
156 | // PCI_RES_TAG,\r | |
157 | // PCI_ACCESS_TYPE, PCI_CONFIG_ADDRESS,\r | |
158 | // AND_VALUE, OR_VALUE\r | |
159 | \r | |
160 | //\r | |
161 | // Device Lava 0x1407, DeviceId 0x0110\r | |
162 | //\r | |
163 | DEVICE_INF_TAG,\r | |
164 | PCI_DEVICE_ID(0x1407, 0x0110, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r | |
165 | DEVICE_RES_TAG,\r | |
166 | PCI_REGISTER_READ,\r | |
167 | PCI_CAPBILITY_POINTER_OFFSET,\r | |
168 | 0xffffff00,\r | |
169 | VALUE_NOCARE,\r | |
170 | \r | |
171 | //\r | |
172 | // Device Lava 0x1407, DeviceId 0x0111\r | |
173 | //\r | |
174 | DEVICE_INF_TAG,\r | |
175 | PCI_DEVICE_ID(0x1407, 0x0111, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r | |
176 | DEVICE_RES_TAG,\r | |
177 | PCI_REGISTER_READ,\r | |
178 | PCI_CAPBILITY_POINTER_OFFSET,\r | |
179 | 0xffffff00,\r | |
180 | VALUE_NOCARE,\r | |
181 | \r | |
182 | //\r | |
183 | // The end of the list\r | |
184 | //\r | |
185 | LIST_END_TAG\r | |
186 | };\r | |
187 | \r | |
188 | //\r | |
189 | // the incompatible PCI devices list for the access width of configuration registers\r | |
190 | //\r | |
191 | GLOBAL_REMOVE_IF_UNREFERENCED UINT64 DeviceListForAccessWidth[] = {\r | |
192 | //\r | |
193 | // DEVICE_INF_TAG,\r | |
194 | // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),\r | |
195 | // DEVICE_RES_TAG,\r | |
196 | // PCI_ACCESS_TYPE, PCI_ACCESS_WIDTH,\r | |
197 | // START_ADDRESS, END_ADDRESS,\r | |
198 | // ACTUAL_PCI_ACCESS_WIDTH,\r | |
199 | //\r | |
200 | \r | |
201 | //\r | |
202 | // Sample Device\r | |
203 | //\r | |
204 | //DEVICE_INF_TAG,\r | |
205 | //PCI_DEVICE_ID(0xXXXX, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r | |
206 | //DEVICE_RES_TAG,\r | |
207 | //PCI_REGISTER_READ,\r | |
208 | //EfiPciWidthUint8,\r | |
209 | //0,\r | |
210 | //0xFF,\r | |
211 | //EfiPciWidthUint32,\r | |
212 | //\r | |
213 | \r | |
214 | //\r | |
215 | // The end of the list\r | |
216 | //\r | |
217 | LIST_END_TAG\r | |
218 | };\r | |
219 | \r | |
220 | #endif\r |