Code scrub for PCI Bus module and PciIncompatibleDeviceSupportLib module.

[mirror_edk2.git] / IntelFrameworkModulePkg / Library / PciIncompatibleDeviceSupportLib / IncompatiblePciDeviceList.h

/** @file\r
  The incompatible PCI device list template.\r
\r
Copyright (c) 2006 - 2009, Intel Corporation                                                         \r
All rights reserved. This program and the accompanying materials                          \r
are licensed and made available under the terms and conditions of the BSD License         \r
which accompanies this distribution.  The full text of the license may be found at        \r
http://opensource.org/licenses/bsd-license.php                                            \r
                                                                                          \r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.  \r
\r
**/\r
\r
#ifndef _EFI_INCOMPATIBLE_PCI_DEVICE_LIST_H\r
#define _EFI_INCOMPATIBLE_PCI_DEVICE_LIST_H\r
\r
#include <Library/PciIncompatibleDeviceSupportLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
#include <Library/DebugLib.h>\r
\r
#include <IndustryStandard/Pci.h>\r
#include <IndustryStandard/Acpi.h>\r
\r
\r
#define PCI_DEVICE_ID(VendorId, DeviceId, Revision, SubVendorId, SubDeviceId) \\r
    VendorId, DeviceId, Revision, SubVendorId, SubDeviceId\r
\r
#define PCI_BAR_TYPE_IO   ACPI_ADDRESS_SPACE_TYPE_IO\r
#define PCI_BAR_TYPE_MEM  ACPI_ADDRESS_SPACE_TYPE_MEM\r
\r
#define DEVICE_INF_TAG    0xFFF2\r
#define DEVICE_RES_TAG    0xFFF1\r
#define LIST_END_TAG      0x0000\r
\r
//\r
// descriptor for access width of incompatible PCI device\r
//\r
typedef struct {\r
  UINT64                         AccessType;\r
  UINT64                         AccessWidth;\r
  EFI_PCI_REGISTER_ACCESS_DATA   PciRegisterAccessData;\r
} EFI_PCI_REGISTER_ACCESS_DESCRIPTOR;\r
\r
//\r
// descriptor for register value of incompatible PCI device\r
//\r
typedef struct {\r
  UINT64                         AccessType;\r
  UINT64                         Offset;\r
  EFI_PCI_REGISTER_VALUE_DATA    PciRegisterValueData;\r
} EFI_PCI_REGISTER_VALUE_DESCRIPTOR;\r
\r
//\r
// the incompatible PCI devices list for ACPI resource\r
//\r
GLOBAL_REMOVE_IF_UNREFERENCED UINT64 gIncompatiblePciDeviceListForResource[] = {\r
  //\r
  // DEVICE_INF_TAG,\r
  // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),\r
  // DEVICE_RES_TAG,\r
  // ResType,  GFlag , SFlag,   Granularity,  RangeMin,\r
  // RangeMax, Offset, AddrLen\r
  //\r
\r
  //\r
  // Sample Device 1\r
  //\r
  //DEVICE_INF_TAG,\r
  //PCI_DEVICE_ID(0xXXXX, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r
  //DEVICE_RES_TAG,\r
  //PCI_BAR_TYPE_IO,\r
  //PCI_ACPI_UNUSED,\r
  //PCI_ACPI_UNUSED,\r
  //PCI_ACPI_UNUSED,\r
  //PCI_ACPI_UNUSED,\r
  //PCI_BAR_EVEN_ALIGN,\r
  //PCI_BAR_ALL,\r
  //PCI_BAR_NOCHANGE,\r
\r
  //\r
  // Sample Device 2\r
  //\r
  //DEVICE_INF_TAG,\r
  //PCI_DEVICE_ID(0xXXXX, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r
  //DEVICE_RES_TAG,\r
  //PCI_BAR_TYPE_IO,\r
  //PCI_ACPI_UNUSED,\r
  //PCI_ACPI_UNUSED,\r
  //PCI_ACPI_UNUSED,\r
  //PCI_ACPI_UNUSED,\r
  //PCI_BAR_EVEN_ALIGN,\r
  //PCI_BAR_ALL,\r
  //PCI_BAR_NOCHANGE,\r
\r
  //\r
  // The end of the list\r
  //\r
  LIST_END_TAG\r
};\r
\r
//\r
// the incompatible PCI devices list for the values of configuration registers\r
//\r
GLOBAL_REMOVE_IF_UNREFERENCED UINT64 gIncompatiblePciDeviceListForRegister[] = {\r
  //\r
  // DEVICE_INF_TAG,\r
  // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),\r
  // PCI_RES_TAG,\r
  // PCI_ACCESS_TYPE, PCI_CONFIG_ADDRESS,\r
  // AND_VALUE, OR_VALUE\r
\r
  //\r
  // Sample Device 1\r
  //\r
  //DEVICE_INF_TAG,\r
  //PCI_DEVICE_ID(0xXXXX, 0xXXXX, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r
  //DEVICE_RES_TAG,\r
  //PCI_REGISTER_READ,\r
  //PCI_CAPBILITY_POINTER_OFFSET,\r
  //0xffffff00,\r
  //VALUE_NOCARE,\r
\r
  //\r
  // Sample Device 2\r
  //\r
  //DEVICE_INF_TAG,\r
  //PCI_DEVICE_ID(0xXXXX, 0xXXXX, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r
  //DEVICE_RES_TAG,\r
  //PCI_REGISTER_READ,\r
  //PCI_CAPBILITY_POINTER_OFFSET,\r
  //0xffffff00,\r
  //VALUE_NOCARE,\r
\r
  //\r
  // The end of the list\r
  //\r
  LIST_END_TAG\r
};\r
\r
//\r
// the incompatible PCI devices list for the access width of configuration registers\r
//\r
GLOBAL_REMOVE_IF_UNREFERENCED UINT64 gDeviceListForAccessWidth[] = {\r
  //\r
  // DEVICE_INF_TAG,\r
  // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),\r
  // DEVICE_RES_TAG,\r
  // PCI_ACCESS_TYPE, PCI_ACCESS_WIDTH,\r
  // START_ADDRESS, END_ADDRESS,\r
  // ACTUAL_PCI_ACCESS_WIDTH,\r
  //\r
\r
  //\r
  // Sample Device\r
  //\r
  //DEVICE_INF_TAG,\r
  //PCI_DEVICE_ID(0xXXXX, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r
  //DEVICE_RES_TAG,\r
  //PCI_REGISTER_READ,\r
  //EfiPciWidthUint8,\r
  //0,\r
  //0xFF,\r
  //EfiPciWidthUint32,\r
  //\r
\r
  //\r
  // The end of the list\r
  //\r
  LIST_END_TAG\r
};\r
\r
#endif\r