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03df1608 1/** @file
e3e7f36a 2 The header file provides interface definitions exposed by CSM (Compatible Support Module).\r
3 \r
4 The CSM provides compatibility support between the Framework and traditional, legacy BIOS code \r
5 and allows booting a traditional OS or booting an EFI OS off a device that requires a traditional \r
6 option ROM (OpROM). \r
03df1608 7
e3e7f36a 8 These definitions are from Compatibility Support Module Spec Version 0.97.\r
9
8d129536 10 Copyright (c) 2007-2009, Intel Corporation
11 All rights reserved. This program and the accompanying materials
12 are licensed and made available under the terms and conditions of the BSD License
13 which accompanies this distribution. The full text of the license may be found at
14 http://opensource.org/licenses/bsd-license.php
15
16 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
17 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18
8d129536 19**/
20
21#ifndef _FRAMEWORK_LEGACY_16_H_
22#define _FRAMEWORK_LEGACY_16_H_
23
24#include <Base.h>
25
26#pragma pack(1)
27
28typedef UINT8 SERIAL_MODE;
29typedef UINT8 PARALLEL_MODE;
30
31#define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$')
32
03df1608 33///
e3e7f36a 34/// There is a table located within the traditional BIOS in either the 0xF000:xxxx or 0xE000:xxxx\r
35/// physical address range. It is located on a 16-byte boundary and provides the physical address of the\r
36/// entry point for the Compatibility16 functions. These functions provide the platform-specific\r
37/// information that is required by the generic EfiCompatibility code. The functions are invoked via\r
38/// thunking by using EFI_LEGACY_BIOS_PROTOCOL.FarCall86() with the 32-bit physical\r
39/// entry point.\r
40///
03df1608 41typedef struct {
e3e7f36a 42 ///\r
43 /// The string "$EFI" denotes the start of the EfiCompatibility table. Byte 0 is "I," byte\r
44 /// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed as a DWORD or UINT32.\r
45 ///
03df1608 46 UINT32 Signature;
e3e7f36a 47 \r
48 ///\r
49 /// The value required such that byte checksum of TableLength equals zero.\r
50 ///
03df1608 51 UINT8 TableChecksum;
e3e7f36a 52 \r
53 ///\r
54 /// The length of this table.\r
55 ///
03df1608 56 UINT8 TableLength;
e3e7f36a 57 \r
58 ///\r
59 /// The major EFI revision for which this table was generated.\r
60 ///
03df1608 61 UINT8 EfiMajorRevision;
e3e7f36a 62 \r
63 ///\r
64 /// The minor EFI revision for which this table was generated.\r
65 ///
03df1608 66 UINT8 EfiMinorRevision;
e3e7f36a 67 \r
68 ///\r
69 /// The major revision of this table.\r
70 ///
03df1608 71 UINT8 TableMajorRevision;
e3e7f36a 72 \r
73 ///\r
74 /// The minor revision of this table.\r
75 ///
03df1608 76 UINT8 TableMinorRevision;
e3e7f36a 77 \r
78 ///\r
79 /// Reserved for future usage.\r
80 ///
03df1608 81 UINT16 Reserved;
e3e7f36a 82 \r
83 ///\r
84 /// The segment of the entry point within the traditional BIOS for Compatibility16 functions.\r
85 ///
03df1608 86 UINT16 Compatibility16CallSegment;
e3e7f36a 87 \r
88 ///\r
89 /// The offset of the entry point within the traditional BIOS for Compatibility16 functions.\r
90 ///
03df1608 91 UINT16 Compatibility16CallOffset;
e3e7f36a 92 \r
93 ///\r
94 /// The segment of the entry point within the traditional BIOS for EfiCompatibility to invoke the PnP installation check.\r
95 ///
03df1608 96 UINT16 PnPInstallationCheckSegment;
e3e7f36a 97 \r
98 ///\r
99 /// The Offset of the entry point within the traditional BIOS for EfiCompatibility to invoke the PnP installation check.\r
100 ///
03df1608 101 UINT16 PnPInstallationCheckOffset;
e3e7f36a 102 \r
103 ///\r
104 /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform Innovation Framework for EFI \r
105 /// Driver Execution Environment Core Interface Specification (DXE CIS).\r
106 ///
107 UINT32 EfiSystemTable; \r
108 \r
109 ///\r
110 /// The address of an OEM-provided identifier string. The string is null terminated.\r
111 ///
03df1608 112 UINT32 OemIdStringPointer;
e3e7f36a 113 \r
114 ///\r
115 /// The 32-bit physical address where ACPI RSD PTR is stored within the traditional\r
116 /// BIOS. The remained of the ACPI tables are located at their EFI addresses. The size\r
117 /// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill in the ACPI\r
118 /// RSD PTR with either the ACPI 1.0b or 2.0 values.\r
119 ///
03df1608 120 UINT32 AcpiRsdPtrPointer;
e3e7f36a 121 \r
122 ///\r
123 /// The OEM revision number. Usage is undefined but provided for OEM module usage.\r
124 ///
03df1608 125 UINT16 OemRevision;
e3e7f36a 126 \r
127 ///\r
128 /// The 32-bit physical address where INT15 E820 data is stored within the traditional\r
129 /// BIOS. The EfiCompatibility code will fill in the E820Pointer value and copy the\r
130 /// data to the indicated area.\r
131 ///
03df1608 132 UINT32 E820Pointer;
e3e7f36a 133 \r
134 ///\r
135 /// The length of the E820 data and is filled in by the EfiCompatibility code.\r
136 ///
03df1608 137 UINT32 E820Length;
e3e7f36a 138 \r
139 ///\r
140 /// The 32-bit physical address where the $PIR table is stored in the traditional BIOS.\r
141 /// The EfiCompatibility code will fill in the IrqRoutingTablePointer value and\r
142 /// copy the data to the indicated area.\r
143 ///
03df1608 144 UINT32 IrqRoutingTablePointer;
e3e7f36a 145 \r
146 ///\r
147 /// The length of the $PIR table and is filled in by the EfiCompatibility code.\r
148 ///
03df1608 149 UINT32 IrqRoutingTableLength;
e3e7f36a 150 \r
151 ///\r
152 /// The 32-bit physical address where the MP table is stored in the traditional BIOS.\r
153 /// The EfiCompatibility code will fill in the MpTablePtr value and copy the data to the indicated area.\r
154 ///
03df1608 155 UINT32 MpTablePtr;
e3e7f36a 156 \r
157 ///\r
158 /// The length of the MP table and is filled in by the EfiCompatibility code.\r
159 ///
03df1608 160 UINT32 MpTableLength;
e3e7f36a 161 \r
162 ///\r
8d303ef3 163 /// The segment of the OEM-specific INT table/code.\r
e3e7f36a 164 ///
03df1608 165 UINT16 OemIntSegment;
e3e7f36a 166 \r
167 ///\r
8d303ef3 168 /// The offset of the OEM-specific INT table/code.\r
e3e7f36a 169 ///
03df1608 170 UINT16 OemIntOffset;
e3e7f36a 171 \r
172 ///\r
173 /// The segment of the OEM-specific 32-bit table/code.\r
174 ///
03df1608 175 UINT16 Oem32Segment;
e3e7f36a 176 \r
177 ///\r
178 /// The offset of the OEM-specific 32-bit table/code.\r
179 ///
03df1608 180 UINT16 Oem32Offset;
8d303ef3 181 \r
182 ///\r
183 /// The segment of the OEM-specific 16-bit table/code.\r
184 ///
03df1608 185 UINT16 Oem16Segment;
8d303ef3 186 \r
187 ///\r
188 /// The offset of the OEM-specific 16-bit table/code.\r
189 ///
03df1608 190 UINT16 Oem16Offset;
8d303ef3 191 \r
192 ///\r
193 /// The segment of the TPM binary passed to 16-bit CSM.\r
194 ///
03df1608 195 UINT16 TpmSegment;
8d303ef3 196 \r
197 ///\r
198 /// The offset of the TPM binary passed to 16-bit CSM.\r
199 ///
03df1608 200 UINT16 TpmOffset;
e3e7f36a 201 \r
202 ///\r
203 /// A pointer to a string identifying the independent BIOS vendor.\r
204 ///
03df1608 205 UINT32 IbvPointer;
8d303ef3 206 \r
207 ///\r
208 /// This field is NULL for all systems not supporting PCI Express. This field is the base\r
209 /// value of the start of the PCI Express memory-mapped configuration registers and\r
210 /// must be filled in prior to EfiCompatibility code issuing the Compatibility16 function\r
211 /// Compatibility16InitializeYourself().\r
212 /// Compatibility16InitializeYourself() is defined in Compatability16\r
213 /// Functions.\r
214 ///
03df1608 215 UINT32 PciExpressBase;
8d303ef3 216 \r
217 ///\r
218 /// Maximum PCI bus number assigned.\r
219 ///
8d129536 220 UINT8 LastPciBus;
221} EFI_COMPATIBILITY16_TABLE;
222
223///
e3e7f36a 224/// Functions provided by the CSM binary which communicate between the EfiCompatibility \r
225/// and Compatability16 code.
226///
03df1608 227typedef enum {
e3e7f36a 228 ///\r
229 /// Causes the Compatibility16 code to do any internal initialization required.\r
230 /// Input:\r
231 /// AX = Compatibility16InitializeYourself\r
232 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_INIT_TABLE\r
233 /// Return:\r
234 /// AX = Return Status codes\r
235 ///
03df1608 236 Compatibility16InitializeYourself = 0x0000,
e3e7f36a 237 \r
238 ///\r
239 /// Causes the Compatibility16 BIOS to perform any drive number translations to match the boot sequence.\r
240 /// Input:\r
241 /// AX = Compatibility16UpdateBbs\r
242 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE\r
243 /// Return:\r
244 /// AX = Returned status codes\r
245 ///
03df1608 246 Compatibility16UpdateBbs = 0x0001,
e3e7f36a 247 \r
248 ///\r
249 /// Allows the Compatibility16 code to perform any final actions before booting. The Compatibility16\r
250 /// code is read/write.\r
251 /// Input:\r
252 /// AX = Compatibility16PrepareToBoot\r
253 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure \r
254 /// Return:\r
255 /// AX = Returned status codes\r
256 ///
03df1608 257 Compatibility16PrepareToBoot = 0x0002,
e3e7f36a 258 \r
259 ///\r
260 /// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is Read/Only.\r
261 /// Input:\r
262 /// AX = Compatibility16Boot\r
263 /// Output:\r
264 /// AX = Returned status codes\r
265 ///
03df1608 266 Compatibility16Boot = 0x0003,
e3e7f36a 267 \r
268 ///\r
269 /// Allows the Compatibility16 code to get the last device from which a boot was attempted. This is\r
270 /// stored in CMOS and is the priority number of the last attempted boot device.\r
271 /// Input:\r
272 /// AX = Compatibility16RetrieveLastBootDevice\r
273 /// Output:\r
274 /// AX = Returned status codes\r
275 /// BX = Priority number of the boot device.\r
276 ///
03df1608 277 Compatibility16RetrieveLastBootDevice= 0x0004,
e3e7f36a 278 \r
279 ///\r
280 /// Allows the Compatibility16 code rehook INT13, INT18, and/or INT19 after dispatching a legacy OpROM.\r
281 /// Input:\r
282 /// AX = Compatibility16DispatchOprom\r
283 /// ES:BX = Pointer to EFI_DISPATCH_OPROM_TABLE\r
284 /// Output:\r
285 /// AX = Returned status codes\r
286 /// BX = Number of non-BBS-compliant devices found. Equals 0 if BBS compliant.\r
287 ///
03df1608 288 Compatibility16DispatchOprom = 0x0005,
e3e7f36a 289 \r
290 ///\r
291 /// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified length and returns the address\r
292 /// of that region.\r
293 /// Input:\r
294 /// AX = Compatibility16GetTableAddress\r
295 /// BX = Allocation region\r
296 /// 00 = Allocate from either 0xE0000 or 0xF0000 64 KB blocks.\r
297 /// Bit 0 = 1 Allocate from 0xF0000 64 KB block\r
298 /// Bit 1 = 1 Allocate from 0xE0000 64 KB block\r
299 /// CX = Requested length in bytes.\r
300 /// DX = Required address alignment. Bit mapped. First non-zero bit from the right is the alignment.\r
301 /// Output:\r
302 /// AX = Returned status codes\r
303 /// DS:BX = Address of the region\r
304 ///
03df1608 305 Compatibility16GetTableAddress = 0x0006,
e3e7f36a 306 \r
307 ///\r
308 /// Enables the EfiCompatibility module to do any nonstandard processing of keyboard LEDs or state.\r
309 /// Input:\r
310 /// AX = Compatibility16SetKeyboardLeds\r
311 /// CL = LED status.\r
e02a0e92 312 /// Bit 0 Scroll Lock 0 = Off\r
313 /// Bit 1 NumLock\r
314 /// Bit 2 Caps Lock\r
e3e7f36a 315 /// Output:\r
316 /// AX = Returned status codes\r
317 ///
03df1608 318 Compatibility16SetKeyboardLeds = 0x0007,
e3e7f36a 319 \r
320 ///\r
321 /// Enables the EfiCompatibility module to install an interrupt handler for PCI mass media devices that\r
322 /// do not have an OpROM associated with them. An example is SATA.\r
323 /// Input:\r
324 /// AX = Compatibility16InstallPciHandler\r
325 /// ES:BX = Pointer to EFI_LEGACY_INSTALL_PCI_HANDLER structure\r
326 /// Output:\r
327 /// AX = Returned status codes\r
328 ///
2e747cee 329 Compatibility16InstallPciHandler = 0x0008
8d129536 330} EFI_COMPATIBILITY_FUNCTIONS;
331
332
333///
334/// EFI_DISPATCH_OPROM_TABLE
335///
336typedef struct {
e3e7f36a 337 UINT16 PnPInstallationCheckSegment; ///< Pointer to the PnpInstallationCheck data structure.
338 UINT16 PnPInstallationCheckOffset; ///< Pointer to the PnpInstallationCheck data structure.
339 UINT16 OpromSegment; ///< The segment where the OpROM was placed. Offset is assumed to be 3.
340 UINT8 PciBus; ///< The PCI bus.
341 UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI function.
03df1608 342 UINT8 NumberBbsEntries; ///< The number of valid BBS table entries upon entry and exit. The IBV code may
343 ///< increase this number, if BBS-compliant devices also hook INTs in order to force the
e3e7f36a 344 ///< OpROM BIOS Setup to be executed.
8d303ef3 345 VOID *BbsTablePointer; ///< Pointer to the BBS table.
03df1608 346 UINT16 OpromDestinationSegment; ///< The segment where the OpROM can be relocated to. If this value is 0x0000, this
8d303ef3 347 ///< means that the relocation of this run time code is not supported.
8d129536 348} EFI_DISPATCH_OPROM_TABLE;
349
350///
351/// EFI_TO_COMPATIBILITY16_INIT_TABLE
352///
03df1608 353typedef struct {
e3e7f36a 354 ///\r
355 /// Starting address of memory under 1 MB. The ending address is assumed to be 640 KB or 0x9FFFF.\r
356 ///
03df1608 357 UINT32 BiosLessThan1MB;
e3e7f36a 358 \r
359 ///\r
360 /// Starting address of the high memory block.\r
361 ///
03df1608 362 UINT32 HiPmmMemory;
e3e7f36a 363 \r
364 ///\r
365 /// Length of high memory block.\r
366 ///
03df1608 367 UINT32 HiPmmMemorySizeInBytes;
e3e7f36a 368 \r
369 ///\r
370 /// The segment of the reverse thunk call code.\r
371 ///
03df1608 372 UINT16 ReverseThunkCallSegment;
e3e7f36a 373 \r
374 ///\r
375 /// The offset of the reverse thunk call code.\r
376 ///
03df1608 377 UINT16 ReverseThunkCallOffset;
e3e7f36a 378 \r
379 ///\r
380 /// The number of E820 entries copied to the Compatibility16 BIOS.\r
381 ///
03df1608 382 UINT32 NumberE820Entries;
e3e7f36a 383 \r
384 ///\r
385 /// The amount of usable memory above 1 MB, e.g., E820 type 1 memory.\r
386 ///
03df1608 387 UINT32 OsMemoryAbove1Mb;
e3e7f36a 388 \r
389 ///\r
390 /// The start of thunk code in main memory. Memory cannot be used by BIOS or PMM.\r
391 ///
03df1608 392 UINT32 ThunkStart;
e3e7f36a 393 \r
394 ///\r
395 /// The size of the thunk code.\r
396 ///
03df1608 397 UINT32 ThunkSizeInBytes;
8d303ef3 398 \r
399 ///\r
400 /// Starting address of memory under 1 MB.\r
401 ///
03df1608 402 UINT32 LowPmmMemory;
8d303ef3 403 \r
404 ///\r
405 /// Length of low Memory block.\r
406 ///
8d129536 407 UINT32 LowPmmMemorySizeInBytes;
408} EFI_TO_COMPATIBILITY16_INIT_TABLE;
409
410///
03df1608 411/// DEVICE_PRODUCER_SERIAL
8d129536 412///
413typedef struct {
e3e7f36a 414 UINT16 Address; ///< I/O address assigned to the serial port
415 UINT8 Irq; ///< IRQ assigned to the serial port.
416 SERIAL_MODE Mode; ///< Mode of serial port. Values are defined below.
8d129536 417} DEVICE_PRODUCER_SERIAL;
418
03df1608 419///
420/// DEVICE_PRODUCER_SERIAL's modes
421///@{
8d129536 422#define DEVICE_SERIAL_MODE_NORMAL 0x00
423#define DEVICE_SERIAL_MODE_IRDA 0x01
424#define DEVICE_SERIAL_MODE_ASK_IR 0x02
425#define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00
426#define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10
03df1608 427///@)
8d129536 428
429///
03df1608 430/// DEVICE_PRODUCER_PARALLEL
8d129536 431///
432typedef struct {
e3e7f36a 433 UINT16 Address; ///< I/O address assigned to the parallel port
434 UINT8 Irq; ///< IRQ assigned to the parallel port.
435 UINT8 Dma; ///< DMA assigned to the parallel port.
436 PARALLEL_MODE Mode; ///< Mode of the parallel port. Values are defined below.
8d129536 437} DEVICE_PRODUCER_PARALLEL;
438
03df1608 439///
440/// DEVICE_PRODUCER_PARALLEL's modes
441///@{
8d129536 442#define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00
443#define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01
444#define DEVICE_PARALLEL_MODE_MODE_EPP 0x02
445#define DEVICE_PARALLEL_MODE_MODE_ECP 0x03
03df1608 446///@}
8d129536 447
448///
449/// DEVICE_PRODUCER_FLOPPY
450///
451typedef struct {
e3e7f36a 452 UINT16 Address; ///< I/O address assigned to the floppy
453 UINT8 Irq; ///< IRQ assigned to the floppy.
454 UINT8 Dma; ///< DMA assigned to the floppy.
455 UINT8 NumberOfFloppy; ///< Number of floppies in the system.
8d129536 456} DEVICE_PRODUCER_FLOPPY;
457
458///
459/// LEGACY_DEVICE_FLAGS
460///
461typedef struct {
e3e7f36a 462 UINT32 A20Kybd : 1; ///< A20 controller by keyboard controller.
463 UINT32 A20Port90 : 1; ///< A20 controlled by port 0x92.
464 UINT32 Reserved : 30; ///< Reserved for future usage.
8d129536 465} LEGACY_DEVICE_FLAGS;
466
467///
468/// DEVICE_PRODUCER_DATA_HEADER
469///
470typedef struct {
e3e7f36a 471 DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial port x. Type DEVICE_PRODUCER_SERIAL is defined below.
472 DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel port x. Type DEVICE_PRODUCER_PARALLEL is defined below.
473 DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. Type DEVICE_PRODUCER_FLOPPY is defined below.
474 UINT8 MousePresent; ///< Flag to indicate if mouse is present.
475 LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boolean state information passed to CSM.
8d129536 476} DEVICE_PRODUCER_DATA_HEADER;
477
478///
479/// ATAPI_IDENTIFY
480///
481typedef struct {
e3e7f36a 482 UINT16 Raw[256]; ///< Raw data from the IDE IdentifyDrive command.
8d129536 483} ATAPI_IDENTIFY;
484
485///
03df1608 486/// HDD_INFO
8d129536 487///
03df1608 488typedef struct {
e3e7f36a 489 ///\r
490 /// Status of IDE device. Values are defined below. There is one HDD_INFO structure\r
491 /// per IDE controller. The IdentifyDrive is per drive. Index 0 is master and index\r
492 /// 1 is slave.\r
493 ///
494 UINT16 Status; \r
495 \r
496 ///\r
497 /// PCI bus of IDE controller.\r
498 ///
03df1608 499 UINT32 Bus;
e3e7f36a 500 \r
501 ///\r
502 /// PCI device of IDE controller.\r
503 ///
03df1608 504 UINT32 Device;
e3e7f36a 505 \r
506 ///\r
507 /// PCI function of IDE controller.\r
508 ///
03df1608 509 UINT32 Function;
e3e7f36a 510 \r
511 ///\r
512 /// Command ports base address.\r
513 ///
03df1608 514 UINT16 CommandBaseAddress;
e3e7f36a 515 \r
516 ///\r
517 /// Control ports base address.\r
518 ///
03df1608 519 UINT16 ControlBaseAddress;
e3e7f36a 520 \r
521 ///\r
522 /// Bus master address\r
523 ///
03df1608 524 UINT16 BusMasterAddress;
e3e7f36a 525
03df1608 526 UINT8 HddIrq;
e3e7f36a 527 \r
528 ///\r
529 /// Data that identifies the drive data, one per possible attached drive\r
530 ///
8d129536 531 ATAPI_IDENTIFY IdentifyDrive[2];
532} HDD_INFO;
533
03df1608 534///
535/// HDD_INFO status bits
536///
8d129536 537#define HDD_PRIMARY 0x01
538#define HDD_SECONDARY 0x02
539#define HDD_MASTER_ATAPI_CDROM 0x04
540#define HDD_SLAVE_ATAPI_CDROM 0x08
541#define HDD_MASTER_IDE 0x20
542#define HDD_SLAVE_IDE 0x40
543#define HDD_MASTER_ATAPI_ZIPDISK 0x10
544#define HDD_SLAVE_ATAPI_ZIPDISK 0x80
545
546///
547/// BBS_STATUS_FLAGS
548///
549typedef struct {
e3e7f36a 550 UINT16 OldPosition : 4; ///< Prior priority.
551 UINT16 Reserved1 : 4; ///< Reserved for future use.
552 UINT16 Enabled : 1; ///< If 0, ignore this entry.
553 UINT16 Failed : 1; ///< 0 = Not known if boot failure occurred.\r
554 ///< 1 = Boot attempted failed.\r
555 \r
556 ///\r
557 /// State of media present.\r
558 /// 00 = No bootable media is present in the device.\r
559 /// 01 = Unknown if a bootable media present.\r
560 /// 10 = Media is present and appears bootable.\r
561 /// 11 = Reserved.\r
562 ///
8d129536 563 UINT16 MediaPresent : 2;
e3e7f36a 564 UINT16 Reserved2 : 4; ///< Reserved for future use.
8d129536 565} BBS_STATUS_FLAGS;
566
567///
568/// BBS_TABLE, device type values & boot priority values
569///
03df1608 570typedef struct {
e3e7f36a 571 ///\r
572 /// The boot priority for this boot device. Values are defined below.\r
573 ///
03df1608 574 UINT16 BootPriority;
e3e7f36a 575 \r
576 ///\r
577 /// The PCI bus for this boot device.\r
578 ///
03df1608 579 UINT32 Bus;
e3e7f36a 580 \r
581 ///\r
582 /// The PCI device for this boot device.\r
583 ///
03df1608 584 UINT32 Device;
e3e7f36a 585 \r
586 ///\r
587 /// The PCI function for the boot device.\r
588 ///
03df1608 589 UINT32 Function;
e3e7f36a 590 \r
591 ///\r
592 /// The PCI class for this boot device.\r
593 ///
03df1608 594 UINT8 Class;
e3e7f36a 595 \r
596 ///\r
597 /// The PCI Subclass for this boot device.\r
598 ///
03df1608 599 UINT8 SubClass;
e3e7f36a 600 \r
601 ///\r
602 /// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r
603 ///
03df1608 604 UINT16 MfgStringOffset;
e3e7f36a 605 \r
606 ///\r
607 /// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r
608 ///
03df1608 609 UINT16 MfgStringSegment;
e3e7f36a 610 \r
611 ///\r
612 /// BBS device type. BBS device types are defined below.\r
613 ///
03df1608 614 UINT16 DeviceType;
e3e7f36a 615 \r
616 ///\r
617 /// Status of this boot device. Type BBS_STATUS_FLAGS is defined below.\r
618 ///
03df1608 619 BBS_STATUS_FLAGS StatusFlags;
e3e7f36a 620 \r
621 ///\r
622 /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r
623 /// BCV devices.\r
624 ///
03df1608 625 UINT16 BootHandlerOffset;
e3e7f36a 626 \r
627 ///\r
628 /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r
629 /// BCV devices.\r
630 ///
03df1608 631 UINT16 BootHandlerSegment;
e3e7f36a 632 \r
633 ///\r
634 /// Segment:offset address of an ASCIIZ description string describing this device.\r
635 ///
8d129536 636 UINT16 DescStringOffset;
e3e7f36a 637\r
638 ///\r
639 /// Segment:offset address of an ASCIIZ description string describing this device.\r
640 ///\r
03df1608 641 UINT16 DescStringSegment;
e3e7f36a 642 \r
643 ///\r
644 /// Reserved.\r
645 ///
03df1608 646 UINT32 InitPerReserved;
e3e7f36a 647 \r
648 ///\r
649 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
650 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
651 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
652 ///
03df1608 653 UINT32 AdditionalIrq13Handler;
e3e7f36a 654 \r
655 ///\r
656 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
657 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
658 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
659 ///
03df1608 660 UINT32 AdditionalIrq18Handler;
e3e7f36a 661 \r
662 ///\r
663 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
664 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
665 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
666 ///
03df1608 667 UINT32 AdditionalIrq19Handler;
e3e7f36a 668 \r
669 ///\r
670 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
671 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
672 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
673 ///
8d129536 674 UINT32 AdditionalIrq40Handler;
675 UINT8 AssignedDriveNumber;
676 UINT32 AdditionalIrq41Handler;
677 UINT32 AdditionalIrq46Handler;
678 UINT32 IBV1;
679 UINT32 IBV2;
680} BBS_TABLE;
681
03df1608 682///
683/// BBS device type values
684///@{
8d129536 685#define BBS_FLOPPY 0x01
686#define BBS_HARDDISK 0x02
687#define BBS_CDROM 0x03
688#define BBS_PCMCIA 0x04
689#define BBS_USB 0x05
690#define BBS_EMBED_NETWORK 0x06
691#define BBS_BEV_DEVICE 0x80
692#define BBS_UNKNOWN 0xff
03df1608 693///@}
8d129536 694
03df1608 695///
696/// BBS boot priority values
697///@{
8d129536 698#define BBS_DO_NOT_BOOT_FROM 0xFFFC
699#define BBS_LOWEST_PRIORITY 0xFFFD
700#define BBS_UNPRIORITIZED_ENTRY 0xFFFE
701#define BBS_IGNORE_ENTRY 0xFFFF
03df1608 702///@}
8d129536 703
704///
03df1608 705/// SMM_ATTRIBUTES
8d129536 706///
03df1608 707typedef struct {
e3e7f36a 708 ///\r
709 /// Access mechanism used to generate the soft SMI. Defined types are below. The other\r
710 /// values are reserved for future usage.\r
711 ///
03df1608 712 UINT16 Type : 3;
e3e7f36a 713 \r
714 ///\r
715 /// Size of "port" in bits. Defined values are below.\r
716 ///
03df1608 717 UINT16 PortGranularity : 3;
e3e7f36a 718 \r
719 ///\r
720 /// Size of data in bits. Defined values are below.\r
721 ///
03df1608 722 UINT16 DataGranularity : 3;
e3e7f36a 723 \r
724 ///\r
725 /// Reserved for future use.\r
726 ///
8d129536 727 UINT16 Reserved : 7;
728} SMM_ATTRIBUTES;
729
03df1608 730///
731/// SMM_ATTRIBUTES type values
732///@{
8d129536 733#define STANDARD_IO 0x00
734#define STANDARD_MEMORY 0x01
03df1608 735///@}
8d129536 736
03df1608 737///
738/// SMM_ATTRIBUTES port size constants
739///@{
8d129536 740#define PORT_SIZE_8 0x00
741#define PORT_SIZE_16 0x01
742#define PORT_SIZE_32 0x02
743#define PORT_SIZE_64 0x03
03df1608 744///@}
8d129536 745
03df1608 746///
747/// SMM_ATTRIBUTES data size constants
748///@{
8d129536 749#define DATA_SIZE_8 0x00
750#define DATA_SIZE_16 0x01
751#define DATA_SIZE_32 0x02
752#define DATA_SIZE_64 0x03
03df1608 753///@}
8d129536 754
755///
756/// SMM_FUNCTION & relating constants
757///
758typedef struct {
759 UINT16 Function : 15;
760 UINT16 Owner : 1;
761} SMM_FUNCTION;
762
03df1608 763///
764/// SMM_FUNCTION Function constants
765///@{
8d129536 766#define INT15_D042 0x0000
767#define GET_USB_BOOT_INFO 0x0001
768#define DMI_PNP_50_57 0x0002
03df1608 769///@}
8d129536 770
03df1608 771///
772/// SMM_FUNCTION Owner constants
773///@{
8d129536 774#define STANDARD_OWNER 0x0
775#define OEM_OWNER 0x1
03df1608 776///@}
8d129536 777
778/**
779 * SMM_ENTRY
780 *
781 * This structure assumes both port and data sizes are 1. SmmAttribute must be
782 * properly to reflect that assumption.
783**/
03df1608 784typedef struct {
e3e7f36a 785 ///\r
786 /// Describes the access mechanism, SmmPort, and SmmData sizes. Type\r
787 /// SMM_ATTRIBUTES is defined below.\r
788 ///
03df1608 789 SMM_ATTRIBUTES SmmAttributes;
e3e7f36a 790 \r
791 ///\r
792 /// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below.\r
793 ///
03df1608 794 SMM_FUNCTION SmmFunction;
e3e7f36a 795 \r
796 ///\r
797 /// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16 bytes\r
798 ///
03df1608 799 UINT8 SmmPort;
e3e7f36a 800 \r
801 ///\r
802 /// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16 bytes\r
803 ///
8d129536 804 UINT8 SmmData;
805} SMM_ENTRY;
806
807///
808/// SMM_TABLE
809///
810typedef struct {
e3e7f36a 811 UINT16 NumSmmEntries; ///< Number of entries represented by SmmEntry.
812 SMM_ENTRY SmmEntry; ///< One entry per function. Type SMM_ENTRY is defined below.
8d129536 813} SMM_TABLE;
814
815///
816/// UDC_ATTRIBUTES
817///
03df1608 818typedef struct {
e3e7f36a 819 ///\r
820 /// This bit set indicates that the ServiceAreaData is valid.\r
821 ///
03df1608 822 UINT8 DirectoryServiceValidity : 1;
e3e7f36a 823 \r
824 ///\r
825 /// This bit set indicates to use the Reserve Area Boot Code Address (RACBA) only if\r
826 /// DirectoryServiceValidity is 0.\r
827 ///
03df1608 828 UINT8 RabcaUsedFlag : 1;
e3e7f36a 829 \r
830 ///\r
831 /// This bit set indicates to execute hard disk diagnostics.\r
832 ///
03df1608 833 UINT8 ExecuteHddDiagnosticsFlag : 1;
e3e7f36a 834 \r
835 ///\r
836 /// Reserved for future use. Set to 0.\r
837 ///
8d129536 838 UINT8 Reserved : 5;
839} UDC_ATTRIBUTES;
840
841///
842/// UD_TABLE
843///
03df1608 844typedef struct {
e3e7f36a 845 ///\r
846 /// This field contains the bit-mapped attributes of the PARTIES information. Type\r
847 /// UDC_ATTRIBUTES is defined below.\r
848 ///
03df1608 849 UDC_ATTRIBUTES Attributes;
e3e7f36a 850 \r
851 ///\r
852 /// This field contains the zero-based device on which the selected\r
853 /// ServiceDataArea is present. It is 0 for master and 1 for the slave device. \r
854 ///
03df1608 855 UINT8 DeviceNumber;
e3e7f36a 856 \r
857 ///\r
858 /// This field contains the zero-based index into the BbsTable for the parent device.\r
859 /// This index allows the user to reference the parent device information such as PCI\r
860 /// bus, device function.\r
861 ///
03df1608 862 UINT8 BbsTableEntryNumberForParentDevice;
e3e7f36a 863 \r
864 ///\r
865 /// This field contains the zero-based index into the BbsTable for the boot entry.\r
866 ///
03df1608 867 UINT8 BbsTableEntryNumberForBoot;
e3e7f36a 868 \r
869 ///\r
870 /// This field contains the zero-based index into the BbsTable for the HDD diagnostics entry.\r
871 ///
03df1608 872 UINT8 BbsTableEntryNumberForHddDiag;
e3e7f36a 873 \r
874 ///\r
875 /// The raw Beer data.\r
876 ///
03df1608 877 UINT8 BeerData[128];
e3e7f36a 878 \r
879 ///\r
880 /// The raw data of selected service area.\r
881 ///
8d129536 882 UINT8 ServiceAreaData[64];
883} UD_TABLE;
884
885#define EFI_TO_LEGACY_MAJOR_VERSION 0x02
886#define EFI_TO_LEGACY_MINOR_VERSION 0x00
887#define MAX_IDE_CONTROLLER 8
888
889///
890/// EFI_TO_COMPATIBILITY16_BOOT_TABLE
891///
892typedef struct {
e3e7f36a 893 UINT16 MajorVersion; ///< The EfiCompatibility major version number.
894 UINT16 MinorVersion; ///< The EfiCompatibility minor version number.
895 UINT32 AcpiTable; ///< Location of the RSDT ACPI table. < 4G range
896 UINT32 SmbiosTable; ///< Location of the SMBIOS table in EFI memory. < 4G range
8d129536 897 UINT32 SmbiosTableLength;
898 //
899 // Legacy SIO state
900 //
e3e7f36a 901 DEVICE_PRODUCER_DATA_HEADER SioData; ///< Standard traditional device information.
902 UINT16 DevicePathType; ///< The default boot type.
903 UINT16 PciIrqMask; ///< Mask of which IRQs have been assigned to PCI.
904 UINT32 NumberE820Entries; ///< Number of E820 entries. The number can change from the\r
905 ///< Compatibility16InitializeYourself() function.
8d129536 906 //
907 // Controller & Drive Identify[2] per controller information
908 //
e3e7f36a 909 HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Hard disk drive information, including raw Identify Drive data.
910 UINT32 NumberBbsEntries; ///< Number of entries in the BBS table
911 UINT32 BbsTable; ///< Pointer to the BBS table. Type BBS_TABLE is defined below.
912 UINT32 SmmTable; ///< Pointer to the SMM table. Type SMM_TABLE is defined below.
913 UINT32 OsMemoryAbove1Mb; ///< The amount of usable memory above 1 MB, i.e. E820 type 1 memory. This value can\r
914 ///< differ from the value in EFI_TO_COMPATIBILITY16_INIT_TABLE as more\r
915 ///< memory may have been discovered.
916 UINT32 UnconventionalDeviceTable; ///< Information to boot off an unconventional device like a PARTIES partition. Type\r
917 ///< UD_TABLE is defined below.
8d129536 918} EFI_TO_COMPATIBILITY16_BOOT_TABLE;
919
920///
921/// EFI_LEGACY_INSTALL_PCI_HANDLER
922///
923typedef struct {
e3e7f36a 924 UINT8 PciBus; ///< The PCI bus of the device.
925 UINT8 PciDeviceFun; ///< The PCI device in bits 7:3 and function in bits 2:0.
926 UINT8 PciSegment; ///< The PCI segment of the device.
927 UINT8 PciClass; ///< The PCI class code of the device.
928 UINT8 PciSubclass; ///< The PCI subclass code of the device.
929 UINT8 PciInterface; ///< The PCI interface code of the device.
8d129536 930 //
931 // Primary section
932 //
e3e7f36a 933 UINT8 PrimaryIrq; ///< The primary device IRQ.
934 UINT8 PrimaryReserved; ///< Reserved.
935 UINT16 PrimaryControl; ///< The primary device control I/O base.
936 UINT16 PrimaryBase; ///< The primary device I/O base.
937 UINT16 PrimaryBusMaster; ///< The primary device bus master I/O base.
8d129536 938 //
939 // Secondary Section
940 //
e3e7f36a 941 UINT8 SecondaryIrq; ///< The secondary device IRQ.
942 UINT8 SecondaryReserved; ///< Reserved.
943 UINT16 SecondaryControl; ///< The secondary device control I/O base.
944 UINT16 SecondaryBase; ///< The secondary device I/O base.
945 UINT16 SecondaryBusMaster; ///< The secondary device bus master I/O base.
8d129536 946} EFI_LEGACY_INSTALL_PCI_HANDLER;
947
948//
949// Restore default pack value
950//
951#pragma pack()
952
953#endif /* _FRAMEWORK_LEGACY_16_H_ */
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