]> git.proxmox.com Git - mirror_edk2.git/blame - IntelFrameworkPkg/Include/Framework/SmmCis.h
Remove duplicate typedef of EFI_SMM_CPU_IO_INTERFACE
[mirror_edk2.git] / IntelFrameworkPkg / Include / Framework / SmmCis.h
CommitLineData
79964ac8 1/** @file\r
9f6f9534 2 Include file for definitions in the Intel Platform Innovation Framework for EFI\r
3 System Management Mode Core Interface Specification (SMM CIS) version 0.90.\r
79964ac8 4\r
77a72512 5 Copyright (c) 2007 - 2010, Intel Corporation\r
79964ac8 6 All rights reserved. This program and the accompanying materials\r
7 are licensed and made available under the terms and conditions of the BSD License\r
8 which accompanies this distribution. The full text of the license may be found at\r
9 http://opensource.org/licenses/bsd-license.php\r
10\r
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13\r
79964ac8 14**/\r
15\r
108854b2
LG
16#ifndef _SMM_CIS_H_\r
17#define _SMM_CIS_H_\r
79964ac8 18\r
a2bb197e 19//\r
20// Share some common definitions with PI SMM\r
21//\r
22#include <Pi/PiSmmCis.h>\r
23#include <Protocol/SmmCpuIo.h>\r
24\r
79964ac8 25typedef struct _EFI_SMM_SYSTEM_TABLE EFI_SMM_SYSTEM_TABLE;\r
79964ac8 26\r
79964ac8 27//\r
28// SMM Base specification constant and types\r
29//\r
79964ac8 30#define EFI_SMM_SYSTEM_TABLE_REVISION (0 << 16) | (0x09)\r
31\r
79964ac8 32/**\r
33 Allocates pool memory from SMRAM for IA-32 or runtime memory for\r
34 the Itanium processor family.\r
35\r
5259c97d 36 @param PoolType The type of pool to allocate. The only supported type is EfiRuntimeServicesData\r
79964ac8 37 @param Size The number of bytes to allocate from the pool.\r
38 @param Buffer A pointer to a pointer to the allocated buffer if the call\r
39 succeeds; undefined otherwise.\r
40\r
41 @retval EFI_SUCCESS The requested number of bytes was allocated.\r
42 @retval EFI_OUT_OF_RESOURCES The pool requested could not be allocated.\r
43 @retval EFI_UNSUPPORTED In runtime.\r
77a72512 44 @note Inconsistent with specification here:\r
27d9ad06 45 In Framework Spec, this definition is named EFI_SMM_ALLOCATE_POOL. \r
46 To avoid a naming conflict, the definition is renamed.\r
79964ac8 47**/\r
48typedef\r
49EFI_STATUS\r
69686d56 50(EFIAPI *EFI_SMMCORE_ALLOCATE_POOL)(\r
79964ac8 51 IN EFI_MEMORY_TYPE PoolType,\r
52 IN UINTN Size,\r
53 OUT VOID **Buffer\r
54 );\r
55\r
56/**\r
57 Returns pool memory to the system.\r
58\r
59 @param Buffer Pointer to the buffer to free.\r
60\r
61 @retval EFI_SUCCESS The memory was returned to the system.\r
62 @retval EFI_INVALID_PARAMETER Buffer was invalid.\r
63 @retval EFI_UNSUPPORTED In runtime.\r
77a72512 64 @note Inconsistent with specification here:\r
27d9ad06 65 In Framework Spec, this definition is named EFI_SMM_FREE_POOL. \r
66 To avoid a naming conflict, the definition is renamed. \r
79964ac8 67**/\r
68typedef\r
69EFI_STATUS\r
69686d56 70(EFIAPI *EFI_SMMCORE_FREE_POOL)(\r
79964ac8 71 IN VOID *Buffer\r
72 );\r
73\r
74/**\r
75 Allocates memory pages from the system.\r
76\r
77 @param Type The type of allocation to perform.\r
78 @param MemoryType The only supported type is EfiRuntimeServicesData\r
79 @param NumberofPages The number of contiguous 4 KB pages to allocate\r
80 @param Memory Pointer to a physical address. On input, the way in which\r
81 the address is used depends on the value of Type. On output, the address\r
82 is set to the base of the page range that was allocated.\r
83\r
84 @retval EFI_SUCCESS The requested pages were allocated.\r
85 @retval EFI_OUT_OF_RESOURCES The pages requested could not be allocated.\r
86 @retval EFI_NOT_FOUND The requested pages could not be found.\r
87 @retval EFI_INVALID_PARAMETER Type is not AllocateAnyPages or AllocateMaxAddress\r
88 or AllocateAddress. Or MemoryType is in the range EfiMaxMemoryType..0x7FFFFFFF.\r
77a72512 89 @note Inconsistent with specification here:\r
5259c97d 90 In the Framework Spec, this definition is named EFI_SMM_ALLOCATE_PAGES. \r
91 To avoid a naming conflict, the definition here is renamed.\r
79964ac8 92**/\r
93typedef\r
94EFI_STATUS\r
69686d56 95(EFIAPI *EFI_SMMCORE_ALLOCATE_PAGES)(\r
79964ac8 96 IN EFI_ALLOCATE_TYPE Type,\r
97 IN EFI_MEMORY_TYPE MemoryType,\r
98 IN UINTN NumberOfPages,\r
99 OUT EFI_PHYSICAL_ADDRESS *Memory\r
100 );\r
101\r
102/**\r
103 Frees memory pages for the system.\r
104\r
105 @param Memory The base physical address of the pages to be freed\r
106 @param NumberOfPages The number of contiguous 4 KB pages to free.\r
107\r
108 @retval EFI_SUCCESS The requested memory pages were freed.\r
109 @retval EFI_INVALID_PARAMETER Memory is not a page-aligned address or NumberOfPages is invalid.\r
110 @retval EFI_NOT_FOUND The requested memory pages were not allocated with SmmAllocatePages().\r
18d7ae2e 111 \r
77a72512 112 @note Inconsistent with specification here:\r
5259c97d 113 In the Framework Spec, this definition is named EFI_SMM_FREE_PAGES. \r
114 To avoid a naming conflict, the definition here is renamed.\r
79964ac8 115**/\r
116typedef\r
117EFI_STATUS\r
69686d56 118(EFIAPI *EFI_SMMCORE_FREE_PAGES)(\r
79964ac8 119 IN EFI_PHYSICAL_ADDRESS Memory,\r
120 IN UINTN NumberOfPages\r
121 );\r
b6d47a83 122\r
470d0b27 123///\r
124/// The processor save-state information for IA-32 processors. This information is important in that the\r
125/// SMM drivers may need to ascertain the state of the processor before invoking the SMI.\r
126///\r
79964ac8 127typedef struct {\r
470d0b27 128 ///\r
129 /// Reserved for future processors. As such, software should not attempt to interpret or\r
130 /// write to this region.\r
131 ///\r
79964ac8 132 UINT8 Reserved1[248];\r
470d0b27 133 ///\r
134 /// The location of the processor SMBASE, which is the location where the processor\r
135 /// will pass control upon receipt of an SMI.\r
136 ///\r
79964ac8 137 UINT32 SMBASE;\r
470d0b27 138 ///\r
139 /// The revision of the SMM save state. This value is set by the processor.\r
140 ///\r
79964ac8 141 UINT32 SMMRevId;\r
470d0b27 142 ///\r
143 /// The value of the I/O restart field. Allows for restarting an in-process I/O instruction.\r
144 ///\r
79964ac8 145 UINT16 IORestart;\r
470d0b27 146 ///\r
147 /// Describes behavior that should be commenced in response to a halt instruction.\r
148 ///\r
79964ac8 149 UINT16 AutoHALTRestart;\r
470d0b27 150 ///\r
151 /// Reserved for future processors. As such, software should not attempt to interpret or\r
152 /// write to this region.\r
153 ///\r
79964ac8 154 UINT8 Reserved2[164];\r
470d0b27 155\r
156 //\r
157 // Registers in IA-32 processors. \r
158 //\r
79964ac8 159 UINT32 ES;\r
160 UINT32 CS;\r
161 UINT32 SS;\r
162 UINT32 DS;\r
163 UINT32 FS;\r
164 UINT32 GS;\r
165 UINT32 LDTBase;\r
166 UINT32 TR;\r
167 UINT32 DR7;\r
168 UINT32 DR6;\r
169 UINT32 EAX;\r
170 UINT32 ECX;\r
171 UINT32 EDX;\r
172 UINT32 EBX;\r
173 UINT32 ESP;\r
174 UINT32 EBP;\r
175 UINT32 ESI;\r
176 UINT32 EDI;\r
177 UINT32 EIP;\r
178 UINT32 EFLAGS;\r
179 UINT32 CR3;\r
180 UINT32 CR0;\r
181} EFI_SMI_CPU_SAVE_STATE;\r
182\r
470d0b27 183///\r
184/// The processor save-state information for the Itanium processor family. This information is\r
185/// important in that the SMM drivers may need to ascertain the state of the processor before invoking\r
186/// the PMI. This structure is mandatory and must be 512 byte aligned.\r
187/// \r
79964ac8 188typedef struct {\r
189 UINT64 reserved;\r
190 UINT64 r1;\r
191 UINT64 r2;\r
192 UINT64 r3;\r
193 UINT64 r4;\r
194 UINT64 r5;\r
195 UINT64 r6;\r
196 UINT64 r7;\r
197 UINT64 r8;\r
198 UINT64 r9;\r
199 UINT64 r10;\r
200 UINT64 r11;\r
201 UINT64 r12;\r
202 UINT64 r13;\r
203 UINT64 r14;\r
204 UINT64 r15;\r
205 UINT64 r16;\r
206 UINT64 r17;\r
207 UINT64 r18;\r
208 UINT64 r19;\r
209 UINT64 r20;\r
210 UINT64 r21;\r
211 UINT64 r22;\r
212 UINT64 r23;\r
213 UINT64 r24;\r
214 UINT64 r25;\r
215 UINT64 r26;\r
216 UINT64 r27;\r
217 UINT64 r28;\r
218 UINT64 r29;\r
219 UINT64 r30;\r
220 UINT64 r31;\r
221\r
222 UINT64 pr;\r
223\r
224 UINT64 b0;\r
225 UINT64 b1;\r
226 UINT64 b2;\r
227 UINT64 b3;\r
228 UINT64 b4;\r
229 UINT64 b5;\r
230 UINT64 b6;\r
231 UINT64 b7;\r
232\r
233 // application registers\r
234 UINT64 ar_rsc;\r
235 UINT64 ar_bsp;\r
236 UINT64 ar_bspstore;\r
237 UINT64 ar_rnat;\r
238\r
239 UINT64 ar_fcr;\r
240\r
241 UINT64 ar_eflag;\r
242 UINT64 ar_csd;\r
243 UINT64 ar_ssd;\r
244 UINT64 ar_cflg;\r
245 UINT64 ar_fsr;\r
246 UINT64 ar_fir;\r
247 UINT64 ar_fdr;\r
248\r
249 UINT64 ar_ccv;\r
250\r
251 UINT64 ar_unat;\r
252\r
253 UINT64 ar_fpsr;\r
254\r
255 UINT64 ar_pfs;\r
256 UINT64 ar_lc;\r
257 UINT64 ar_ec;\r
258\r
259 // control registers\r
260 UINT64 cr_dcr;\r
261 UINT64 cr_itm;\r
262 UINT64 cr_iva;\r
263 UINT64 cr_pta;\r
264 UINT64 cr_ipsr;\r
265 UINT64 cr_isr;\r
266 UINT64 cr_iip;\r
267 UINT64 cr_ifa;\r
268 UINT64 cr_itir;\r
269 UINT64 cr_iipa;\r
270 UINT64 cr_ifs;\r
271 UINT64 cr_iim;\r
272 UINT64 cr_iha;\r
273\r
274 // debug registers\r
275 UINT64 dbr0;\r
276 UINT64 dbr1;\r
277 UINT64 dbr2;\r
278 UINT64 dbr3;\r
279 UINT64 dbr4;\r
280 UINT64 dbr5;\r
281 UINT64 dbr6;\r
282 UINT64 dbr7;\r
283\r
284 UINT64 ibr0;\r
285 UINT64 ibr1;\r
286 UINT64 ibr2;\r
287 UINT64 ibr3;\r
288 UINT64 ibr4;\r
289 UINT64 ibr5;\r
290 UINT64 ibr6;\r
291 UINT64 ibr7;\r
292\r
293 // virtual registers\r
294 UINT64 int_nat; // nat bits for R1-R31\r
295\r
296} EFI_PMI_SYSTEM_CONTEXT;\r
297\r
470d0b27 298///\r
299/// The processor save-state information for IA-32 and Itanium processors. This information is\r
300/// important in that the SMM drivers may need to ascertain the state of the processor before invoking\r
301/// the SMI or PMI.\r
302///\r
79964ac8 303typedef union {\r
470d0b27 304 ///\r
305 /// The processor save-state information for IA-32 processors. \r
306 ///\r
79964ac8 307 EFI_SMI_CPU_SAVE_STATE Ia32SaveState;\r
470d0b27 308 ///\r
309 /// The processor save-state information for Itanium processors.\r
310 ///\r
79964ac8 311 EFI_PMI_SYSTEM_CONTEXT ItaniumSaveState;\r
312} EFI_SMM_CPU_SAVE_STATE;\r
313\r
470d0b27 314///\r
315/// The optional floating point save-state information for IA-32 processors. If the optional floating\r
316/// point save is indicated for any handler, the following data structure must be preserved.\r
317///\r
79964ac8 318typedef struct {\r
319 UINT16 Fcw;\r
320 UINT16 Fsw;\r
321 UINT16 Ftw;\r
322 UINT16 Opcode;\r
323 UINT32 Eip;\r
324 UINT16 Cs;\r
325 UINT16 Rsvd1;\r
326 UINT32 DataOffset;\r
327 UINT16 Ds;\r
328 UINT8 Rsvd2[10];\r
329 UINT8 St0Mm0[10], Rsvd3[6];\r
330 UINT8 St0Mm1[10], Rsvd4[6];\r
331 UINT8 St0Mm2[10], Rsvd5[6];\r
332 UINT8 St0Mm3[10], Rsvd6[6];\r
333 UINT8 St0Mm4[10], Rsvd7[6];\r
334 UINT8 St0Mm5[10], Rsvd8[6];\r
335 UINT8 St0Mm6[10], Rsvd9[6];\r
336 UINT8 St0Mm7[10], Rsvd10[6];\r
337 UINT8 Rsvd11[22*16];\r
338} EFI_SMI_OPTIONAL_FPSAVE_STATE;\r
339\r
470d0b27 340///\r
341/// The optional floating point save-state information for the Itanium processor family. If the optional\r
342/// floating point save is indicated for any handler, then this data structure must be preserved. \r
343/// \r
79964ac8 344typedef struct {\r
345 UINT64 f2[2];\r
346 UINT64 f3[2];\r
347 UINT64 f4[2];\r
348 UINT64 f5[2];\r
349 UINT64 f6[2];\r
350 UINT64 f7[2];\r
351 UINT64 f8[2];\r
352 UINT64 f9[2];\r
353 UINT64 f10[2];\r
354 UINT64 f11[2];\r
355 UINT64 f12[2];\r
356 UINT64 f13[2];\r
357 UINT64 f14[2];\r
358 UINT64 f15[2];\r
359 UINT64 f16[2];\r
360 UINT64 f17[2];\r
361 UINT64 f18[2];\r
362 UINT64 f19[2];\r
363 UINT64 f20[2];\r
364 UINT64 f21[2];\r
365 UINT64 f22[2];\r
366 UINT64 f23[2];\r
367 UINT64 f24[2];\r
368 UINT64 f25[2];\r
369 UINT64 f26[2];\r
370 UINT64 f27[2];\r
371 UINT64 f28[2];\r
372 UINT64 f29[2];\r
373 UINT64 f30[2];\r
374 UINT64 f31[2];\r
375} EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT;\r
376\r
470d0b27 377///\r
378/// The processor save-state information for IA-32 and Itanium processors. If the optional floating\r
379/// point save is indicated for any handler, then this data structure must be preserved.\r
380///\r
79964ac8 381typedef union {\r
470d0b27 382 /// \r
383 /// The optional floating point save-state information for IA-32 processors. \r
384 ///\r
79964ac8 385 EFI_SMI_OPTIONAL_FPSAVE_STATE Ia32FpSave;\r
470d0b27 386 ///\r
387 /// The optional floating point save-state information for Itanium processors. \r
388 ///\r
79964ac8 389 EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT ItaniumFpSave;\r
390} EFI_SMM_FLOATING_POINT_SAVE_STATE;\r
391\r
392/**\r
393 This function is the main entry point for an SMM handler dispatch\r
394 or communicate-based callback.\r
395\r
396 @param SmmImageHandle A unique value returned by the SMM infrastructure\r
397 in response to registration for a communicate-based callback or dispatch.\r
398 @param CommunicationBuffer\r
399 An optional buffer that will be populated\r
400 by the SMM infrastructure in response to a non-SMM agent (preboot or runtime)\r
401 invoking the EFI_SMM_BASE_PROTOCOL.Communicate() service.\r
402 @param SourceSize If CommunicationBuffer is non-NULL, this field\r
403 indicates the size of the data payload in this buffer.\r
404\r
405 @return Status Code\r
406\r
407**/\r
408typedef\r
409EFI_STATUS\r
69686d56 410(EFIAPI *EFI_SMM_HANDLER_ENTRY_POINT)(\r
79964ac8 411 IN EFI_HANDLE SmmImageHandle,\r
412 IN OUT VOID *CommunicationBuffer OPTIONAL,\r
413 IN OUT UINTN *SourceSize OPTIONAL\r
414 );\r
415\r
416/**\r
417 The SmmInstallConfigurationTable() function is used to maintain the list\r
418 of configuration tables that are stored in the System Management System\r
419 Table. The list is stored as an array of (GUID, Pointer) pairs. The list\r
420 must be allocated from pool memory with PoolType set to EfiRuntimeServicesData.\r
421\r
422 @param SystemTable A pointer to the SMM System Table.\r
423 @param Guid A pointer to the GUID for the entry to add, update, or remove.\r
424 @param Table A pointer to the buffer of the table to add.\r
425 @param TableSize The size of the table to install.\r
426\r
427 @retval EFI_SUCCESS The (Guid, Table) pair was added, updated, or removed.\r
428 @retval EFI_INVALID_PARAMETER Guid is not valid.\r
429 @retval EFI_NOT_FOUND An attempt was made to delete a non-existent entry.\r
430 @retval EFI_OUT_OF_RESOURCES There is not enough memory available to complete the operation.\r
431\r
432**/\r
433typedef\r
434EFI_STATUS\r
69686d56 435(EFIAPI *EFI_SMM_INSTALL_CONFIGURATION_TABLE)(\r
79964ac8 436 IN EFI_SMM_SYSTEM_TABLE *SystemTable,\r
437 IN EFI_GUID *Guid,\r
438 IN VOID *Table,\r
439 IN UINTN TableSize\r
440 );\r
441\r
442//\r
443// System Management System Table (SMST)\r
444//\r
445struct _EFI_SMM_SYSTEM_TABLE {\r
470d0b27 446 ///\r
447 /// The table header for the System Management System Table (SMST). \r
448 ///\r
79964ac8 449 EFI_TABLE_HEADER Hdr;\r
450\r
470d0b27 451 ///\r
452 /// A pointer to a NULL-terminated Unicode string containing the vendor name. It is\r
453 /// permissible for this pointer to be NULL.\r
454 ///\r
79964ac8 455 CHAR16 *SmmFirmwareVendor;\r
470d0b27 456 ///\r
457 /// The particular revision of the firmware.\r
458 ///\r
79964ac8 459 UINT32 SmmFirmwareRevision;\r
460\r
470d0b27 461 ///\r
462 /// Adds, updates, or removes a configuration table entry from the SMST. \r
463 ///\r
79964ac8 464 EFI_SMM_INSTALL_CONFIGURATION_TABLE SmmInstallConfigurationTable;\r
465\r
466 //\r
467 // I/O Services\r
468 //\r
470d0b27 469 ///\r
470 /// A GUID that designates the particular CPU I/O services. \r
471 ///\r
79964ac8 472 EFI_GUID EfiSmmCpuIoGuid;\r
470d0b27 473 ///\r
474 /// Provides the basic memory and I/O interfaces that are used to abstract accesses to\r
475 /// devices.\r
476 ///\r
79964ac8 477 EFI_SMM_CPU_IO_INTERFACE SmmIo;\r
478\r
479 //\r
480 // Runtime memory service\r
481 //\r
470d0b27 482 ///\r
18d7ae2e 483 ///\r
470d0b27 484 /// Allocates pool memory from SMRAM for IA-32 or runtime memory for the\r
485 /// Itanium processor family.\r
486 ///\r
79964ac8 487 EFI_SMMCORE_ALLOCATE_POOL SmmAllocatePool;\r
470d0b27 488 ///\r
489 /// Returns pool memory to the system. \r
490 ///\r
79964ac8 491 EFI_SMMCORE_FREE_POOL SmmFreePool;\r
470d0b27 492 ///\r
493 /// Allocates memory pages from the system. \r
494 ///\r
79964ac8 495 EFI_SMMCORE_ALLOCATE_PAGES SmmAllocatePages;\r
470d0b27 496 ///\r
497 /// Frees memory pages for the system.\r
498 ///\r
79964ac8 499 EFI_SMMCORE_FREE_PAGES SmmFreePages;\r
500\r
501 //\r
502 // MP service\r
503 //\r
18d7ae2e 504 \r
505 ///Inconsistent with specification here:\r
69c8f27c 506 /// In Framework Spec, this definition does not exist. This method is introduced in PI1.1 spec for \r
18d7ae2e 507 /// implementation needed.\r
79964ac8 508 EFI_SMM_STARTUP_THIS_AP SmmStartupThisAp;\r
509\r
510 //\r
511 // CPU information records\r
512 //\r
470d0b27 513 ///\r
514 /// A 1-relative number between 1 and the NumberOfCpus field. This field designates\r
515 /// which processor is executing the SMM infrastructure. This number also serves as an\r
516 /// index into the CpuSaveState and CpuOptionalFloatingPointState\r
517 /// fields.\r
518 ///\r
79964ac8 519 UINTN CurrentlyExecutingCpu;\r
470d0b27 520 ///\r
521 /// The number of EFI Configuration Tables in the buffer\r
522 /// SmmConfigurationTable.\r
523 ///\r
79964ac8 524 UINTN NumberOfCpus;\r
470d0b27 525 ///\r
526 /// A pointer to the EFI Configuration Tables. The number of entries in the table is\r
527 /// NumberOfTableEntries.\r
528 ///\r
79964ac8 529 EFI_SMM_CPU_SAVE_STATE *CpuSaveState;\r
470d0b27 530 ///\r
531 /// A pointer to a catenation of the EFI_SMM_FLOATING_POINT_SAVE_STATE.\r
532 /// The size of this entire table is NumberOfCpus* size of the\r
533 /// EFI_SMM_FLOATING_POINT_SAVE_STATE. These fields are populated only if\r
534 /// there is at least one SMM driver that has registered for a callback with the\r
535 /// FloatingPointSave field in EFI_SMM_BASE_PROTOCOL.RegisterCallback() set to TRUE.\r
536 ///\r
79964ac8 537 EFI_SMM_FLOATING_POINT_SAVE_STATE *CpuOptionalFloatingPointState;\r
538\r
539 //\r
540 // Extensibility table\r
541 //\r
470d0b27 542 ///\r
543 /// The number of EFI Configuration Tables in the buffer\r
544 /// SmmConfigurationTable.\r
545 ///\r
79964ac8 546 UINTN NumberOfTableEntries;\r
470d0b27 547 ///\r
548 /// A pointer to the EFI Configuration Tables. The number of entries in the table is\r
549 /// NumberOfTableEntries.\r
550 ///\r
79964ac8 551 EFI_CONFIGURATION_TABLE *SmmConfigurationTable;\r
552};\r
553\r
554#endif\r