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79964ac8 1/** @file\r
2 Include file matches things in the Smm CIS spec.\r
3\r
4 Copyright (c) 2007, Intel Corporation\r
5 All rights reserved. This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13 Module Name: FrameworkSmmCis.h\r
14\r
15 @par Revision Reference:\r
f55d5b18 16 VOLUME 4: Platform Initialization Specification,System Management Mode Core Interface, Version 1.1.\r
79964ac8 17\r
18**/\r
19\r
20#ifndef _FRAMEWORK_SMM_CIS_H_\r
21#define _FRAMEWORK_SMM_CIS_H_\r
22\r
694b922c 23#include <Framework/DxeCis.h>\r
79964ac8 24\r
25#define EFI_SMM_CPU_IO_GUID \\r
26 { \\r
27 0x5f439a0b, 0x45d8, 0x4682, {0xa4, 0xf4, 0xf0, 0x57, 0x6b, 0x51, 0x34, 0x41 } \\r
28 }\r
29\r
30typedef struct _EFI_SMM_SYSTEM_TABLE EFI_SMM_SYSTEM_TABLE;\r
31typedef struct _EFI_SMM_CPU_IO_INTERFACE EFI_SMM_CPU_IO_INTERFACE;\r
32\r
33\r
34//\r
35// SMM Base specification constant and types\r
36//\r
e89ec8f6 37#define SMM_SMST_SIGNATURE SIGNATURE_32 ('S', 'M', 'S', 'T')\r
79964ac8 38#define EFI_SMM_SYSTEM_TABLE_REVISION (0 << 16) | (0x09)\r
39\r
40//\r
41// *******************************************************\r
42// EFI_SMM_IO_WIDTH\r
43// *******************************************************\r
44//\r
45typedef enum {\r
46 SMM_IO_UINT8 = 0,\r
47 SMM_IO_UINT16 = 1,\r
48 SMM_IO_UINT32 = 2,\r
49 SMM_IO_UINT64 = 3\r
50} EFI_SMM_IO_WIDTH;\r
51\r
52/**\r
53 Provides the basic memory and I/O interfaces that are used to\r
54 abstract accesses to devices.\r
55\r
56 @param This The EFI_SMM_CPU_IO_INTERFACE instance.\r
57 @param Width Signifies the width of the I/O operations.\r
58 @param Address The base address of the I/O operations.\r
59 @param Count The number of I/O operations to perform.\r
60 @param Buffer For read operations, the destination buffer to store the results.\r
61 For write operations, the source buffer from which to write data.\r
62\r
63 @retval EFI_SUCCESS The data was read from or written to the device.\r
64 @retval EFI_UNSUPPORTED The Address is not valid for this system.\r
65 @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.\r
66 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
67\r
68**/\r
69typedef\r
70EFI_STATUS\r
69686d56 71(EFIAPI *EFI_SMM_CPU_IO)(\r
79964ac8 72 IN EFI_SMM_CPU_IO_INTERFACE *This,\r
73 IN EFI_SMM_IO_WIDTH Width,\r
74 IN UINT64 Address,\r
75 IN UINTN Count,\r
76 IN OUT VOID *Buffer\r
77 );\r
78\r
79typedef struct {\r
470d0b27 80 EFI_SMM_CPU_IO Read; ///> This service provides the various modalities of memory and I/O read.\r
81 EFI_SMM_CPU_IO Write; ///> This service provides the various modalities of memory and I/O write.\r
79964ac8 82} EFI_SMM_IO_ACCESS;\r
83\r
470d0b27 84///\r
85/// The EFI_SMM_CPU_IO_INTERFACE service provides the basic memory, I/O, and PCI\r
86/// interfaces that are used to abstract accesses to devices.\r
87///\r
79964ac8 88struct _EFI_SMM_CPU_IO_INTERFACE {\r
470d0b27 89 ///\r
90 /// Allows reads and writes to memory-mapped I/O space. \r
91 ///\r
79964ac8 92 EFI_SMM_IO_ACCESS Mem;\r
470d0b27 93 ///\r
94 /// Allows reads and writes to I/O space. \r
95 ///\r
79964ac8 96 EFI_SMM_IO_ACCESS Io;\r
97};\r
98\r
99/**\r
100 Allocates pool memory from SMRAM for IA-32 or runtime memory for\r
101 the Itanium processor family.\r
102\r
103 @param PoolType The type of pool to allocate.The only supported type is EfiRuntimeServicesData\r
104 @param Size The number of bytes to allocate from the pool.\r
105 @param Buffer A pointer to a pointer to the allocated buffer if the call\r
106 succeeds; undefined otherwise.\r
107\r
108 @retval EFI_SUCCESS The requested number of bytes was allocated.\r
109 @retval EFI_OUT_OF_RESOURCES The pool requested could not be allocated.\r
110 @retval EFI_UNSUPPORTED In runtime.\r
111\r
112**/\r
113typedef\r
114EFI_STATUS\r
69686d56 115(EFIAPI *EFI_SMMCORE_ALLOCATE_POOL)(\r
79964ac8 116 IN EFI_MEMORY_TYPE PoolType,\r
117 IN UINTN Size,\r
118 OUT VOID **Buffer\r
119 );\r
120\r
121/**\r
122 Returns pool memory to the system.\r
123\r
124 @param Buffer Pointer to the buffer to free.\r
125\r
126 @retval EFI_SUCCESS The memory was returned to the system.\r
127 @retval EFI_INVALID_PARAMETER Buffer was invalid.\r
128 @retval EFI_UNSUPPORTED In runtime.\r
129\r
130**/\r
131typedef\r
132EFI_STATUS\r
69686d56 133(EFIAPI *EFI_SMMCORE_FREE_POOL)(\r
79964ac8 134 IN VOID *Buffer\r
135 );\r
136\r
137/**\r
138 Allocates memory pages from the system.\r
139\r
140 @param Type The type of allocation to perform.\r
141 @param MemoryType The only supported type is EfiRuntimeServicesData\r
142 @param NumberofPages The number of contiguous 4 KB pages to allocate\r
143 @param Memory Pointer to a physical address. On input, the way in which\r
144 the address is used depends on the value of Type. On output, the address\r
145 is set to the base of the page range that was allocated.\r
146\r
147 @retval EFI_SUCCESS The requested pages were allocated.\r
148 @retval EFI_OUT_OF_RESOURCES The pages requested could not be allocated.\r
149 @retval EFI_NOT_FOUND The requested pages could not be found.\r
150 @retval EFI_INVALID_PARAMETER Type is not AllocateAnyPages or AllocateMaxAddress\r
151 or AllocateAddress. Or MemoryType is in the range EfiMaxMemoryType..0x7FFFFFFF.\r
152\r
153**/\r
154typedef\r
155EFI_STATUS\r
69686d56 156(EFIAPI *EFI_SMMCORE_ALLOCATE_PAGES)(\r
79964ac8 157 IN EFI_ALLOCATE_TYPE Type,\r
158 IN EFI_MEMORY_TYPE MemoryType,\r
159 IN UINTN NumberOfPages,\r
160 OUT EFI_PHYSICAL_ADDRESS *Memory\r
161 );\r
162\r
163/**\r
164 Frees memory pages for the system.\r
165\r
166 @param Memory The base physical address of the pages to be freed\r
167 @param NumberOfPages The number of contiguous 4 KB pages to free.\r
168\r
169 @retval EFI_SUCCESS The requested memory pages were freed.\r
170 @retval EFI_INVALID_PARAMETER Memory is not a page-aligned address or NumberOfPages is invalid.\r
171 @retval EFI_NOT_FOUND The requested memory pages were not allocated with SmmAllocatePages().\r
172\r
173**/\r
174typedef\r
175EFI_STATUS\r
69686d56 176(EFIAPI *EFI_SMMCORE_FREE_PAGES)(\r
79964ac8 177 IN EFI_PHYSICAL_ADDRESS Memory,\r
178 IN UINTN NumberOfPages\r
179 );\r
180\r
181typedef\r
182EFI_STATUS\r
69686d56 183(EFIAPI *EFI_SMM_STARTUP_THIS_AP)(\r
79964ac8 184 IN EFI_AP_PROCEDURE Procedure,\r
185 IN UINTN CpuNumber,\r
186 IN OUT VOID *ProcArguments OPTIONAL\r
187 );\r
188\r
470d0b27 189///\r
190/// The processor save-state information for IA-32 processors. This information is important in that the\r
191/// SMM drivers may need to ascertain the state of the processor before invoking the SMI.\r
192///\r
79964ac8 193typedef struct {\r
470d0b27 194 ///\r
195 /// Reserved for future processors. As such, software should not attempt to interpret or\r
196 /// write to this region.\r
197 ///\r
79964ac8 198 UINT8 Reserved1[248];\r
470d0b27 199 ///\r
200 /// The location of the processor SMBASE, which is the location where the processor\r
201 /// will pass control upon receipt of an SMI.\r
202 ///\r
79964ac8 203 UINT32 SMBASE;\r
470d0b27 204 ///\r
205 /// The revision of the SMM save state. This value is set by the processor.\r
206 ///\r
79964ac8 207 UINT32 SMMRevId;\r
470d0b27 208 ///\r
209 /// The value of the I/O restart field. Allows for restarting an in-process I/O instruction.\r
210 ///\r
79964ac8 211 UINT16 IORestart;\r
470d0b27 212 ///\r
213 /// Describes behavior that should be commenced in response to a halt instruction.\r
214 ///\r
79964ac8 215 UINT16 AutoHALTRestart;\r
470d0b27 216 ///\r
217 /// Reserved for future processors. As such, software should not attempt to interpret or\r
218 /// write to this region.\r
219 ///\r
79964ac8 220 UINT8 Reserved2[164];\r
470d0b27 221\r
222 //\r
223 // Registers in IA-32 processors. \r
224 //\r
79964ac8 225 UINT32 ES;\r
226 UINT32 CS;\r
227 UINT32 SS;\r
228 UINT32 DS;\r
229 UINT32 FS;\r
230 UINT32 GS;\r
231 UINT32 LDTBase;\r
232 UINT32 TR;\r
233 UINT32 DR7;\r
234 UINT32 DR6;\r
235 UINT32 EAX;\r
236 UINT32 ECX;\r
237 UINT32 EDX;\r
238 UINT32 EBX;\r
239 UINT32 ESP;\r
240 UINT32 EBP;\r
241 UINT32 ESI;\r
242 UINT32 EDI;\r
243 UINT32 EIP;\r
244 UINT32 EFLAGS;\r
245 UINT32 CR3;\r
246 UINT32 CR0;\r
247} EFI_SMI_CPU_SAVE_STATE;\r
248\r
470d0b27 249///\r
250/// The processor save-state information for the Itanium processor family. This information is\r
251/// important in that the SMM drivers may need to ascertain the state of the processor before invoking\r
252/// the PMI. This structure is mandatory and must be 512 byte aligned.\r
253/// \r
79964ac8 254typedef struct {\r
255 UINT64 reserved;\r
256 UINT64 r1;\r
257 UINT64 r2;\r
258 UINT64 r3;\r
259 UINT64 r4;\r
260 UINT64 r5;\r
261 UINT64 r6;\r
262 UINT64 r7;\r
263 UINT64 r8;\r
264 UINT64 r9;\r
265 UINT64 r10;\r
266 UINT64 r11;\r
267 UINT64 r12;\r
268 UINT64 r13;\r
269 UINT64 r14;\r
270 UINT64 r15;\r
271 UINT64 r16;\r
272 UINT64 r17;\r
273 UINT64 r18;\r
274 UINT64 r19;\r
275 UINT64 r20;\r
276 UINT64 r21;\r
277 UINT64 r22;\r
278 UINT64 r23;\r
279 UINT64 r24;\r
280 UINT64 r25;\r
281 UINT64 r26;\r
282 UINT64 r27;\r
283 UINT64 r28;\r
284 UINT64 r29;\r
285 UINT64 r30;\r
286 UINT64 r31;\r
287\r
288 UINT64 pr;\r
289\r
290 UINT64 b0;\r
291 UINT64 b1;\r
292 UINT64 b2;\r
293 UINT64 b3;\r
294 UINT64 b4;\r
295 UINT64 b5;\r
296 UINT64 b6;\r
297 UINT64 b7;\r
298\r
299 // application registers\r
300 UINT64 ar_rsc;\r
301 UINT64 ar_bsp;\r
302 UINT64 ar_bspstore;\r
303 UINT64 ar_rnat;\r
304\r
305 UINT64 ar_fcr;\r
306\r
307 UINT64 ar_eflag;\r
308 UINT64 ar_csd;\r
309 UINT64 ar_ssd;\r
310 UINT64 ar_cflg;\r
311 UINT64 ar_fsr;\r
312 UINT64 ar_fir;\r
313 UINT64 ar_fdr;\r
314\r
315 UINT64 ar_ccv;\r
316\r
317 UINT64 ar_unat;\r
318\r
319 UINT64 ar_fpsr;\r
320\r
321 UINT64 ar_pfs;\r
322 UINT64 ar_lc;\r
323 UINT64 ar_ec;\r
324\r
325 // control registers\r
326 UINT64 cr_dcr;\r
327 UINT64 cr_itm;\r
328 UINT64 cr_iva;\r
329 UINT64 cr_pta;\r
330 UINT64 cr_ipsr;\r
331 UINT64 cr_isr;\r
332 UINT64 cr_iip;\r
333 UINT64 cr_ifa;\r
334 UINT64 cr_itir;\r
335 UINT64 cr_iipa;\r
336 UINT64 cr_ifs;\r
337 UINT64 cr_iim;\r
338 UINT64 cr_iha;\r
339\r
340 // debug registers\r
341 UINT64 dbr0;\r
342 UINT64 dbr1;\r
343 UINT64 dbr2;\r
344 UINT64 dbr3;\r
345 UINT64 dbr4;\r
346 UINT64 dbr5;\r
347 UINT64 dbr6;\r
348 UINT64 dbr7;\r
349\r
350 UINT64 ibr0;\r
351 UINT64 ibr1;\r
352 UINT64 ibr2;\r
353 UINT64 ibr3;\r
354 UINT64 ibr4;\r
355 UINT64 ibr5;\r
356 UINT64 ibr6;\r
357 UINT64 ibr7;\r
358\r
359 // virtual registers\r
360 UINT64 int_nat; // nat bits for R1-R31\r
361\r
362} EFI_PMI_SYSTEM_CONTEXT;\r
363\r
470d0b27 364///\r
365/// The processor save-state information for IA-32 and Itanium processors. This information is\r
366/// important in that the SMM drivers may need to ascertain the state of the processor before invoking\r
367/// the SMI or PMI.\r
368///\r
79964ac8 369typedef union {\r
470d0b27 370 ///\r
371 /// The processor save-state information for IA-32 processors. \r
372 ///\r
79964ac8 373 EFI_SMI_CPU_SAVE_STATE Ia32SaveState;\r
470d0b27 374 ///\r
375 /// The processor save-state information for Itanium processors.\r
376 ///\r
79964ac8 377 EFI_PMI_SYSTEM_CONTEXT ItaniumSaveState;\r
378} EFI_SMM_CPU_SAVE_STATE;\r
379\r
470d0b27 380///\r
381/// The optional floating point save-state information for IA-32 processors. If the optional floating\r
382/// point save is indicated for any handler, the following data structure must be preserved.\r
383///\r
79964ac8 384typedef struct {\r
385 UINT16 Fcw;\r
386 UINT16 Fsw;\r
387 UINT16 Ftw;\r
388 UINT16 Opcode;\r
389 UINT32 Eip;\r
390 UINT16 Cs;\r
391 UINT16 Rsvd1;\r
392 UINT32 DataOffset;\r
393 UINT16 Ds;\r
394 UINT8 Rsvd2[10];\r
395 UINT8 St0Mm0[10], Rsvd3[6];\r
396 UINT8 St0Mm1[10], Rsvd4[6];\r
397 UINT8 St0Mm2[10], Rsvd5[6];\r
398 UINT8 St0Mm3[10], Rsvd6[6];\r
399 UINT8 St0Mm4[10], Rsvd7[6];\r
400 UINT8 St0Mm5[10], Rsvd8[6];\r
401 UINT8 St0Mm6[10], Rsvd9[6];\r
402 UINT8 St0Mm7[10], Rsvd10[6];\r
403 UINT8 Rsvd11[22*16];\r
404} EFI_SMI_OPTIONAL_FPSAVE_STATE;\r
405\r
470d0b27 406///\r
407/// The optional floating point save-state information for the Itanium processor family. If the optional\r
408/// floating point save is indicated for any handler, then this data structure must be preserved. \r
409/// \r
79964ac8 410typedef struct {\r
411 UINT64 f2[2];\r
412 UINT64 f3[2];\r
413 UINT64 f4[2];\r
414 UINT64 f5[2];\r
415 UINT64 f6[2];\r
416 UINT64 f7[2];\r
417 UINT64 f8[2];\r
418 UINT64 f9[2];\r
419 UINT64 f10[2];\r
420 UINT64 f11[2];\r
421 UINT64 f12[2];\r
422 UINT64 f13[2];\r
423 UINT64 f14[2];\r
424 UINT64 f15[2];\r
425 UINT64 f16[2];\r
426 UINT64 f17[2];\r
427 UINT64 f18[2];\r
428 UINT64 f19[2];\r
429 UINT64 f20[2];\r
430 UINT64 f21[2];\r
431 UINT64 f22[2];\r
432 UINT64 f23[2];\r
433 UINT64 f24[2];\r
434 UINT64 f25[2];\r
435 UINT64 f26[2];\r
436 UINT64 f27[2];\r
437 UINT64 f28[2];\r
438 UINT64 f29[2];\r
439 UINT64 f30[2];\r
440 UINT64 f31[2];\r
441} EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT;\r
442\r
470d0b27 443///\r
444/// The processor save-state information for IA-32 and Itanium processors. If the optional floating\r
445/// point save is indicated for any handler, then this data structure must be preserved.\r
446///\r
79964ac8 447typedef union {\r
470d0b27 448 /// \r
449 /// The optional floating point save-state information for IA-32 processors. \r
450 ///\r
79964ac8 451 EFI_SMI_OPTIONAL_FPSAVE_STATE Ia32FpSave;\r
470d0b27 452 ///\r
453 /// The optional floating point save-state information for Itanium processors. \r
454 ///\r
79964ac8 455 EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT ItaniumFpSave;\r
456} EFI_SMM_FLOATING_POINT_SAVE_STATE;\r
457\r
458/**\r
459 This function is the main entry point for an SMM handler dispatch\r
460 or communicate-based callback.\r
461\r
462 @param SmmImageHandle A unique value returned by the SMM infrastructure\r
463 in response to registration for a communicate-based callback or dispatch.\r
464 @param CommunicationBuffer\r
465 An optional buffer that will be populated\r
466 by the SMM infrastructure in response to a non-SMM agent (preboot or runtime)\r
467 invoking the EFI_SMM_BASE_PROTOCOL.Communicate() service.\r
468 @param SourceSize If CommunicationBuffer is non-NULL, this field\r
469 indicates the size of the data payload in this buffer.\r
470\r
471 @return Status Code\r
472\r
473**/\r
474typedef\r
475EFI_STATUS\r
69686d56 476(EFIAPI *EFI_SMM_HANDLER_ENTRY_POINT)(\r
79964ac8 477 IN EFI_HANDLE SmmImageHandle,\r
478 IN OUT VOID *CommunicationBuffer OPTIONAL,\r
479 IN OUT UINTN *SourceSize OPTIONAL\r
480 );\r
481\r
482/**\r
483 The SmmInstallConfigurationTable() function is used to maintain the list\r
484 of configuration tables that are stored in the System Management System\r
485 Table. The list is stored as an array of (GUID, Pointer) pairs. The list\r
486 must be allocated from pool memory with PoolType set to EfiRuntimeServicesData.\r
487\r
488 @param SystemTable A pointer to the SMM System Table.\r
489 @param Guid A pointer to the GUID for the entry to add, update, or remove.\r
490 @param Table A pointer to the buffer of the table to add.\r
491 @param TableSize The size of the table to install.\r
492\r
493 @retval EFI_SUCCESS The (Guid, Table) pair was added, updated, or removed.\r
494 @retval EFI_INVALID_PARAMETER Guid is not valid.\r
495 @retval EFI_NOT_FOUND An attempt was made to delete a non-existent entry.\r
496 @retval EFI_OUT_OF_RESOURCES There is not enough memory available to complete the operation.\r
497\r
498**/\r
499typedef\r
500EFI_STATUS\r
69686d56 501(EFIAPI *EFI_SMM_INSTALL_CONFIGURATION_TABLE)(\r
79964ac8 502 IN EFI_SMM_SYSTEM_TABLE *SystemTable,\r
503 IN EFI_GUID *Guid,\r
504 IN VOID *Table,\r
505 IN UINTN TableSize\r
506 );\r
507\r
508//\r
509// System Management System Table (SMST)\r
510//\r
511struct _EFI_SMM_SYSTEM_TABLE {\r
470d0b27 512 ///\r
513 /// The table header for the System Management System Table (SMST). \r
514 ///\r
79964ac8 515 EFI_TABLE_HEADER Hdr;\r
516\r
470d0b27 517 ///\r
518 /// A pointer to a NULL-terminated Unicode string containing the vendor name. It is\r
519 /// permissible for this pointer to be NULL.\r
520 ///\r
79964ac8 521 CHAR16 *SmmFirmwareVendor;\r
470d0b27 522 ///\r
523 /// The particular revision of the firmware.\r
524 ///\r
79964ac8 525 UINT32 SmmFirmwareRevision;\r
526\r
470d0b27 527 ///\r
528 /// Adds, updates, or removes a configuration table entry from the SMST. \r
529 ///\r
79964ac8 530 EFI_SMM_INSTALL_CONFIGURATION_TABLE SmmInstallConfigurationTable;\r
531\r
532 //\r
533 // I/O Services\r
534 //\r
470d0b27 535 ///\r
536 /// A GUID that designates the particular CPU I/O services. \r
537 ///\r
79964ac8 538 EFI_GUID EfiSmmCpuIoGuid;\r
470d0b27 539 ///\r
540 /// Provides the basic memory and I/O interfaces that are used to abstract accesses to\r
541 /// devices.\r
542 ///\r
79964ac8 543 EFI_SMM_CPU_IO_INTERFACE SmmIo;\r
544\r
545 //\r
546 // Runtime memory service\r
547 //\r
470d0b27 548 ///\r
549 /// Allocates pool memory from SMRAM for IA-32 or runtime memory for the\r
550 /// Itanium processor family.\r
551 ///\r
79964ac8 552 EFI_SMMCORE_ALLOCATE_POOL SmmAllocatePool;\r
470d0b27 553 ///\r
554 /// Returns pool memory to the system. \r
555 ///\r
79964ac8 556 EFI_SMMCORE_FREE_POOL SmmFreePool;\r
470d0b27 557 ///\r
558 /// Allocates memory pages from the system. \r
559 ///\r
79964ac8 560 EFI_SMMCORE_ALLOCATE_PAGES SmmAllocatePages;\r
470d0b27 561 ///\r
562 /// Frees memory pages for the system.\r
563 ///\r
79964ac8 564 EFI_SMMCORE_FREE_PAGES SmmFreePages;\r
565\r
566 //\r
567 // MP service\r
568 //\r
569 EFI_SMM_STARTUP_THIS_AP SmmStartupThisAp;\r
570\r
571 //\r
572 // CPU information records\r
573 //\r
470d0b27 574 ///\r
575 /// A 1-relative number between 1 and the NumberOfCpus field. This field designates\r
576 /// which processor is executing the SMM infrastructure. This number also serves as an\r
577 /// index into the CpuSaveState and CpuOptionalFloatingPointState\r
578 /// fields.\r
579 ///\r
79964ac8 580 UINTN CurrentlyExecutingCpu;\r
470d0b27 581 ///\r
582 /// The number of EFI Configuration Tables in the buffer\r
583 /// SmmConfigurationTable.\r
584 ///\r
79964ac8 585 UINTN NumberOfCpus;\r
470d0b27 586 ///\r
587 /// A pointer to the EFI Configuration Tables. The number of entries in the table is\r
588 /// NumberOfTableEntries.\r
589 ///\r
79964ac8 590 EFI_SMM_CPU_SAVE_STATE *CpuSaveState;\r
470d0b27 591 ///\r
592 /// A pointer to a catenation of the EFI_SMM_FLOATING_POINT_SAVE_STATE.\r
593 /// The size of this entire table is NumberOfCpus* size of the\r
594 /// EFI_SMM_FLOATING_POINT_SAVE_STATE. These fields are populated only if\r
595 /// there is at least one SMM driver that has registered for a callback with the\r
596 /// FloatingPointSave field in EFI_SMM_BASE_PROTOCOL.RegisterCallback() set to TRUE.\r
597 ///\r
79964ac8 598 EFI_SMM_FLOATING_POINT_SAVE_STATE *CpuOptionalFloatingPointState;\r
599\r
600 //\r
601 // Extensibility table\r
602 //\r
470d0b27 603 ///\r
604 /// The number of EFI Configuration Tables in the buffer\r
605 /// SmmConfigurationTable.\r
606 ///\r
79964ac8 607 UINTN NumberOfTableEntries;\r
470d0b27 608 ///\r
609 /// A pointer to the EFI Configuration Tables. The number of entries in the table is\r
610 /// NumberOfTableEntries.\r
611 ///\r
79964ac8 612 EFI_CONFIGURATION_TABLE *SmmConfigurationTable;\r
613};\r
614\r
615#endif\r