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Add the following PI 1.2 Protocols to the MdePkg
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79964ac8 1/** @file\r
2 This file declares EFI IDE Controller Init Protocol\r
8411f1c0 3 The EFI_IDE_CONTROLLER_INIT_PROTOCOL provides the chipset-specific information to\r
4 the IDE bus driver. This protocol is mandatory for IDE controllers if the IDE devices behind the\r
5 controller are to be enumerated by an IDE bus driver.\r
6 There can only be one instance of EFI_IDE_CONTROLLER_INIT_PROTOCOL for each IDE\r
7 controller in a system. It is installed on the handle that corresponds to the IDE controller. An IDE\r
8 bus driver that wishes to manage an IDE bus and possibly IDE devices in a system will have to\r
9 retrieve the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance that is associated with the\r
10 controller to be managed.\r
79964ac8 11\r
2bbaeb0d 12 Copyright (c) 2007 - 2009, Intel Corporation\r
79964ac8 13 All rights reserved. This program and the accompanying materials\r
14 are licensed and made available under the terms and conditions of the BSD License\r
15 which accompanies this distribution. The full text of the license may be found at\r
16 http://opensource.org/licenses/bsd-license.php\r
17\r
18 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
19 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
20\r
79964ac8 21 @par Revision Reference:\r
22 This Protocol is defined in IDE Controller Initialization Protocol Specification\r
0f899407 23 Version 0.9.\r
79964ac8 24\r
25**/\r
26\r
27#ifndef _EFI_IDE_CONTROLLER_INIT_PROTOCOL_H_\r
28#define _EFI_IDE_CONTROLLER_INIT_PROTOCOL_H_\r
29\r
b80fbe85 30\r
2bbaeb0d 31///\r
32/// Global ID for the EFI Platform IDE Protocol GUID\r
33///\r
79964ac8 34#define EFI_IDE_CONTROLLER_INIT_PROTOCOL_GUID \\r
35 { 0xa1e37052, 0x80d9, 0x4e65, {0xa3, 0x17, 0x3e, 0x9a, 0x55, 0xc4, 0x3e, 0xc9 } }\r
36\r
2bbaeb0d 37///\r
38/// Forward reference for pure ANSI compatability\r
39///\r
79964ac8 40typedef struct _EFI_IDE_CONTROLLER_INIT_PROTOCOL EFI_IDE_CONTROLLER_INIT_PROTOCOL;\r
41\r
42//\r
43//////////////////////////////////////////////////////////////////////////////////////////\r
44// EFI_IDE_BUS_ENUMERATION_PHASE\r
45// EFI_IDE_CONTROLLER_ENUM_PHASE\r
46//\r
47typedef enum{\r
48 EfiIdeBeforeChannelEnumeration,\r
49 EfiIdeAfterChannelEnumeration,\r
50 EfiIdeBeforeChannelReset,\r
51 EfiIdeAfterChannelReset,\r
52 EfiIdeBusBeforeDevicePresenceDetection,\r
53 EfiIdeBusAfterDevicePresenceDetection,\r
54 EfiIdeResetMode,\r
55 EfiIdeBusPhaseMaximum\r
56} EFI_IDE_CONTROLLER_ENUM_PHASE;\r
57\r
58//\r
59//******************************************************\r
60// EFI_ATA_EXT_TRANSFER_PROTOCOL\r
61//******************************************************\r
62//\r
63// This extended mode describes the SATA physical protocol.\r
64// SATA physical layers can operate at different speeds.\r
65// These speeds are defined below. Various PATA protocols\r
66// and associated modes are not applicable to SATA devices.\r
67//\r
68\r
69typedef enum {\r
70 EfiAtaSataTransferProtocol\r
71} EFI_ATA_EXT_TRANSFER_PROTOCOL;\r
72\r
73#define EFI_SATA_AUTO_SPEED 0\r
74#define EFI_SATA_GEN1_SPEED 1\r
75#define EFI_SATA_GEN2_SPEED 2\r
76\r
77//\r
78//*******************************************************\r
79// EFI_IDE_CABLE_TYPE\r
80//*******************************************************\r
81//\r
82typedef enum {\r
83 EfiIdeCableTypeUnknown,\r
84 EfiIdeCableType40pin,\r
85 EfiIdeCableType80Pin,\r
86 EfiIdeCableTypeSerial,\r
87 EfiIdeCableTypeMaximum\r
88} EFI_IDE_CABLE_TYPE;\r
89\r
90//\r
91//******************************************************\r
92// EFI_ATA_MODE\r
93//******************************************************\r
94//\r
95typedef struct {\r
96 BOOLEAN Valid;\r
97 UINT32 Mode;\r
98} EFI_ATA_MODE;\r
99\r
100//\r
101//******************************************************\r
102// EFI_ATA_EXTENDED_MODE\r
103//******************************************************\r
104//\r
105typedef struct {\r
106 EFI_ATA_EXT_TRANSFER_PROTOCOL TransferProtocol;\r
107 UINT32 Mode;\r
108} EFI_ATA_EXTENDED_MODE;\r
109\r
110//\r
111//******************************************************\r
112// EFI_ATA_COLLECTIVE_MODE\r
113//******************************************************\r
114//\r
115typedef struct {\r
116 EFI_ATA_MODE PioMode;\r
117 EFI_ATA_MODE SingleWordDmaMode;\r
118 EFI_ATA_MODE MultiWordDmaMode;\r
119 EFI_ATA_MODE UdmaMode;\r
120 UINT32 ExtModeCount;\r
121 EFI_ATA_EXTENDED_MODE ExtMode[1];\r
122} EFI_ATA_COLLECTIVE_MODE;\r
123\r
124//\r
125//*******************************************************\r
126// EFI_ATA_IDENTIFY_DATA\r
127//*******************************************************\r
128//\r
129\r
130#pragma pack(1)\r
131\r
132typedef struct {\r
2bbaeb0d 133 UINT16 config; ///< General Configuration\r
134 UINT16 cylinders; ///< Number of Cylinders\r
79964ac8 135 UINT16 reserved_2;\r
2bbaeb0d 136 UINT16 heads; ///< Number of logical heads\r
79964ac8 137 UINT16 vendor_data1;\r
138 UINT16 vendor_data2;\r
139 UINT16 sectors_per_track;\r
140 UINT16 vendor_specific_7_9[3];\r
2bbaeb0d 141 CHAR8 SerialNo[20]; ///< ASCII\r
79964ac8 142 UINT16 vendor_specific_20_21[2];\r
143 UINT16 ecc_bytes_available;\r
2bbaeb0d 144 CHAR8 FirmwareVer[8]; ///< ASCII\r
145 CHAR8 ModelName[40]; ///< ASCII\r
79964ac8 146 UINT16 multi_sector_cmd_max_sct_cnt;\r
147 UINT16 reserved_48;\r
148 UINT16 capabilities;\r
149 UINT16 reserved_50;\r
150 UINT16 pio_cycle_timing;\r
151 UINT16 reserved_52;\r
152 UINT16 field_validity;\r
153 UINT16 current_cylinders;\r
154 UINT16 current_heads;\r
155 UINT16 current_sectors;\r
156 UINT16 CurrentCapacityLsb;\r
157 UINT16 CurrentCapacityMsb;\r
158 UINT16 reserved_59;\r
159 UINT16 user_addressable_sectors_lo;\r
160 UINT16 user_addressable_sectors_hi;\r
161 UINT16 reserved_62;\r
162 UINT16 multi_word_dma_mode;\r
163 UINT16 advanced_pio_modes;\r
164 UINT16 min_multi_word_dma_cycle_time;\r
165 UINT16 rec_multi_word_dma_cycle_time;\r
166 UINT16 min_pio_cycle_time_without_flow_control;\r
167 UINT16 min_pio_cycle_time_with_flow_control;\r
168 UINT16 reserved_69_79[11];\r
169 UINT16 major_version_no;\r
170 UINT16 minor_version_no;\r
2bbaeb0d 171 UINT16 command_set_supported_82; ///< word 82\r
172 UINT16 command_set_supported_83; ///< word 83\r
173 UINT16 command_set_feature_extn; ///< word 84\r
174 UINT16 command_set_feature_enb_85; ///< word 85\r
175 UINT16 command_set_feature_enb_86; ///< word 86\r
176 UINT16 command_set_feature_default; ///< word 87\r
177 UINT16 ultra_dma_mode; ///< word 88\r
ef1ad620 178 UINT16 reserved_89_105[17];\r
2bbaeb0d 179 UINT16 phy_logic_sector_support; ///< word 106\r
ef1ad620 180 UINT16 reserved_107_116[10];\r
2bbaeb0d 181 UINT16 logic_sector_size_lo; ///< word 117\r
182 UINT16 logic_sector_size_hi; ///< word 118\r
ef1ad620 183 UINT16 reserved_119_127[9];\r
79964ac8 184 UINT16 security_status;\r
185 UINT16 vendor_data_129_159[31];\r
ef1ad620 186 UINT16 reserved_160_208[49];\r
2bbaeb0d 187 UINT16 alignment_logic_in_phy_blocks; ///< word 209\r
ef1ad620 188 UINT16 reserved_210_255[46];\r
79964ac8 189} EFI_ATA_IDENTIFY_DATA;\r
190\r
191#pragma pack()\r
192//\r
193//*******************************************************\r
194// EFI_ATAPI_IDENTIFY_DATA\r
195//*******************************************************\r
196//\r
197#pragma pack(1)\r
198typedef struct {\r
2bbaeb0d 199 UINT16 config; ///< General Configuration\r
79964ac8 200 UINT16 obsolete_1;\r
201 UINT16 specific_config;\r
202 UINT16 obsolete_3;\r
203 UINT16 retired_4_5[2];\r
204 UINT16 obsolete_6;\r
205 UINT16 cfa_reserved_7_8[2];\r
206 UINT16 retired_9;\r
2bbaeb0d 207 CHAR8 SerialNo[20]; ///< ASCII\r
79964ac8 208 UINT16 retired_20_21[2];\r
209 UINT16 obsolete_22;\r
2bbaeb0d 210 CHAR8 FirmwareVer[8]; ///< ASCII\r
211 CHAR8 ModelName[40]; ///< ASCII\r
79964ac8 212 UINT16 multi_sector_cmd_max_sct_cnt;\r
213 UINT16 reserved_48;\r
214 UINT16 capabilities_49;\r
215 UINT16 capabilities_50;\r
216 UINT16 obsolete_51_52[2];\r
217 UINT16 field_validity;\r
218 UINT16 obsolete_54_58[5];\r
219 UINT16 mutil_sector_setting;\r
220 UINT16 user_addressable_sectors_lo;\r
221 UINT16 user_addressable_sectors_hi;\r
222 UINT16 obsolete_62;\r
223 UINT16 multi_word_dma_mode;\r
224 UINT16 advanced_pio_modes;\r
225 UINT16 min_multi_word_dma_cycle_time;\r
226 UINT16 rec_multi_word_dma_cycle_time;\r
227 UINT16 min_pio_cycle_time_without_flow_control;\r
228 UINT16 min_pio_cycle_time_with_flow_control;\r
229 UINT16 reserved_69_74[6];\r
230 UINT16 queue_depth;\r
231 UINT16 reserved_76_79[4];\r
232 UINT16 major_version_no;\r
233 UINT16 minor_version_no;\r
234 UINT16 cmd_set_support_82;\r
235 UINT16 cmd_set_support_83;\r
236 UINT16 cmd_feature_support;\r
237 UINT16 cmd_feature_enable_85;\r
238 UINT16 cmd_feature_enable_86;\r
239 UINT16 cmd_feature_default;\r
240 UINT16 ultra_dma_select;\r
241 UINT16 time_required_for_sec_erase;\r
242 UINT16 time_required_for_enhanced_sec_erase;\r
243 UINT16 current_advanced_power_mgmt_value;\r
244 UINT16 master_pwd_revison_code;\r
245 UINT16 hardware_reset_result;\r
246 UINT16 current_auto_acoustic_mgmt_value;\r
247 UINT16 reserved_95_99[5];\r
248 UINT16 max_user_lba_for_48bit_addr[4];\r
249 UINT16 reserved_104_126[23];\r
250 UINT16 removable_media_status_notification_support;\r
251 UINT16 security_status;\r
252 UINT16 vendor_data_129_159[31];\r
253 UINT16 cfa_power_mode;\r
254 UINT16 cfa_reserved_161_175[15];\r
255 UINT16 current_media_serial_no[30];\r
256 UINT16 reserved_206_254[49];\r
257 UINT16 integrity_word;\r
258} EFI_ATAPI_IDENTIFY_DATA;\r
259\r
260#pragma pack()\r
261//\r
262//*******************************************************\r
263// EFI_IDENTIFY_DATA\r
264//*******************************************************\r
265//\r
266typedef union {\r
267 EFI_ATA_IDENTIFY_DATA AtaData;\r
268 EFI_ATAPI_IDENTIFY_DATA AtapiData;\r
269} EFI_IDENTIFY_DATA;\r
270\r
271#define EFI_ATAPI_DEVICE_IDENTIFY_DATA 0x8000\r
272\r
273//\r
274/////////////////////////////////////////////////////////////////////////////////////////\r
275// Function prototype declaration, for ANSI compatability\r
276//\r
277/**\r
278 Returns the information about the specified IDE channel.\r
279\r
280 @param This Pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
281 @param Channel Zero-based channel number.\r
282 @param Enabled TRUE if this channel is enabled. Disabled channels are not scanned\r
283 to see if any devices are present.\r
284 @param MaxDevices The maximum number of IDE devices that the bus driver\r
285 can expect on this channel.\r
286\r
287 @retval EFI_SUCCESS Information was returned without any errors.\r
288 @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).\r
289\r
290**/\r
291typedef\r
292EFI_STATUS\r
69686d56 293(EFIAPI *EFI_IDE_CONTROLLER_GET_CHANNEL_INFO)(\r
79964ac8 294 IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,\r
295 IN UINT8 Channel,\r
296 OUT BOOLEAN *Enabled,\r
297 OUT UINT8 *MaxDevices\r
298);\r
299\r
300/**\r
301 The notifications from the IDE bus driver that it is about to enter a certain\r
302 phase of the IDE channel enumeration process.\r
303\r
304 @param This Pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
305 @param Phase The phase during enumeration.\r
306 @param Channel Zero-based channel number.\r
307\r
308 @retval EFI_SUCCESS The notification was accepted without any errors.\r
309 @retval EFI_NOT_SUPPORTED Phase is not supported.\r
310 @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).\r
311 @retval EFI_NOT_READY This phase cannot be entered at this time.\r
312\r
313**/\r
314typedef\r
315EFI_STATUS\r
69686d56 316(EFIAPI *EFI_IDE_CONTROLLER_NOTIFY_PHASE)(\r
79964ac8 317 IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,\r
318 IN EFI_IDE_CONTROLLER_ENUM_PHASE Phase,\r
319 IN UINT8 Channel\r
320);\r
321\r
322/**\r
323 Submits the device information to the IDE controller driver.\r
324\r
325 @param This Pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
326 @param Channel Zero-based channel number.\r
327 @param Device Zero-based device number on the Channel.\r
328 @param IdentifyData The device's response to the ATA IDENTIFY_DEVICE command.\r
329\r
330 @retval EFI_SUCCESS The information was accepted without any errors.\r
331 @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).\r
332 Or Device is invalid.\r
333\r
334**/\r
335typedef\r
336EFI_STATUS\r
69686d56 337(EFIAPI *EFI_IDE_CONTROLLER_SUBMIT_DATA)(\r
79964ac8 338 IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,\r
339 IN UINT8 Channel,\r
340 IN UINT8 Device,\r
341 IN EFI_IDENTIFY_DATA *IdentifyData\r
342);\r
343\r
344/**\r
345 Disqualifies specific modes for an IDE device.\r
346\r
347 @param This Pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
348 @param Channel Zero-based channel number.\r
349 @param Device Zero-based device number on the Channel.\r
350 @param BadModes The modes that the device does not support and that\r
351 should be disqualified.\r
352\r
353 @retval EFI_SUCCESS The modes were accepted without any errors.\r
354 @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).\r
66ea28df 355 Or Device is invalid.\r
356 \r
357 @note: Inconsistent with specification here: \r
358 Framework Spec IdeCont defined another case to return EFI_INVALID_PARAMETER when\r
359 IdentifyData is NULL. However in the function there is no parameter named IdentifyData.\r
360 So that should be a typo error in spec.\r
79964ac8 361\r
362**/\r
363typedef\r
364EFI_STATUS\r
69686d56 365(EFIAPI *EFI_IDE_CONTROLLER_DISQUALIFY_MODE)(\r
79964ac8 366 IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,\r
367 IN UINT8 Channel,\r
368 IN UINT8 Device,\r
369 IN EFI_ATA_COLLECTIVE_MODE *BadModes\r
370);\r
371\r
372/**\r
373 Returns the information about the optimum modes for the specified IDE device.\r
374\r
375 @param This Pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
376 @param Channel Zero-based channel number.\r
377 @param Device Zero-based device number on the Channel.\r
378 @param SupportedModes The optimum modes for the device.\r
379\r
380 @retval EFI_SUCCESS SupportedModes was returned.\r
381 @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).\r
382 Or Device is invalid. Or SupportedModes is NULL.\r
383 @retval EFI_NOT_READY Modes cannot be calculated due to a lack of data.\r
384\r
385**/\r
386typedef\r
387EFI_STATUS\r
69686d56 388(EFIAPI *EFI_IDE_CONTROLLER_CALCULATE_MODE)(\r
79964ac8 389 IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,\r
390 IN UINT8 Channel,\r
391 IN UINT8 Device,\r
392 OUT EFI_ATA_COLLECTIVE_MODE **SupportedModes\r
393);\r
394\r
395/**\r
396 Commands the IDE controller driver to program the IDE controller hardware\r
397 so that the specified device can operate at the specified mode.\r
398\r
399 @param This Pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
400 @param Channel Zero-based channel number.\r
401 @param Device Zero-based device number on the Channel.\r
402 @param Modes The modes to set.\r
403\r
404 @retval EFI_SUCCESS The command was accepted without any errors.\r
405 @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).\r
406 Or Device is invalid.\r
407 @retval EFI_NOT_READY Modes cannot be set at this time due to lack of data.\r
408 @retval EFI_DEVICE_ERROR Modes cannot be set due to hardware failure.\r
409 The IDE bus driver should not use this device.\r
410\r
411**/\r
412typedef\r
413EFI_STATUS\r
69686d56 414(EFIAPI *EFI_IDE_CONTROLLER_SET_TIMING)(\r
79964ac8 415 IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,\r
416 IN UINT8 Channel,\r
417 IN UINT8 Device,\r
418 IN EFI_ATA_COLLECTIVE_MODE *Modes\r
419);\r
420\r
421//\r
422////////////////////////////////////////////////////////////////////////////////////////////////////\r
423// Interface structure\r
424// EFI_IDE_CONTROLLER_INIT_PROTOCOL protocol provides the chipset specific information to the IDE bus driver.\r
425// An IDE Bus driver wants to manage an IDE bus and possible IDE devices will have to retrieve the\r
426// EFI_IDE_CONTROLLER_INIT_PROTOCOL instances.\r
427//\r
428/**\r
79964ac8 429 Provides the basic interfaces to abstract an IDE controller.\r
79964ac8 430**/\r
431struct _EFI_IDE_CONTROLLER_INIT_PROTOCOL {\r
2bbaeb0d 432 ///\r
433 /// Returns the information about a specific channel.\r
434 ///\r
79964ac8 435 EFI_IDE_CONTROLLER_GET_CHANNEL_INFO GetChannelInfo;\r
2bbaeb0d 436 \r
437 ///\r
438 /// The notification that the IDE bus driver is about to enter the\r
439 /// specified phase during the enumeration process. \r
440 ///\r
79964ac8 441 EFI_IDE_CONTROLLER_NOTIFY_PHASE NotifyPhase;\r
2bbaeb0d 442 \r
443 ///\r
444 /// Submits the Drive Identify data that was returned by the device.\r
445 ///\r
79964ac8 446 EFI_IDE_CONTROLLER_SUBMIT_DATA SubmitData;\r
2bbaeb0d 447 \r
448 ///\r
449 /// Submits information about modes that should be disqualified.\r
450 ///\r
79964ac8 451 EFI_IDE_CONTROLLER_DISQUALIFY_MODE DisqualifyMode;\r
2bbaeb0d 452 \r
453 ///\r
454 /// Calculates and returns the optimum mode for a particular IDE device.\r
455 ///\r
79964ac8 456 EFI_IDE_CONTROLLER_CALCULATE_MODE CalculateMode;\r
2bbaeb0d 457 \r
458 ///\r
459 /// Programs the IDE controller hardware to the default timing or per the modes\r
460 /// that were returned by the last call to CalculateMode(). \r
461 ///\r
79964ac8 462 EFI_IDE_CONTROLLER_SET_TIMING SetTiming;\r
2bbaeb0d 463 \r
464 ///\r
465 /// Set to TRUE if the enumeration group includes all the channels that are\r
466 /// produced by this controller. FALSE if an enumeration group consists of\r
467 /// only one channel. \r
468 ///\r
79964ac8 469 BOOLEAN EnumAll;\r
2bbaeb0d 470 \r
471 ///\r
472 /// The number of channels that are produced by this controller.\r
473 ///\r
79964ac8 474 UINT8 ChannelCount;\r
475};\r
476\r
477extern EFI_GUID gEfiIdeControllerInitProtocolGuid;\r
478\r
479#endif\r