[mirror_edk2.git] / IntelFrameworkPkg / Include / Protocol / Legacy8259.h

/** @file\r
  This protocol abstracts the 8259 interrupt controller. This includes\r
  PCI IRQ routing needed to program the PCI Interrupt Line register.\r
\r
Copyright (c) 2007 - 2010, Intel Corporation.  All rights reserved<BR>\r
This program and the accompanying materials are licensed and made available under \r
the terms and conditions of the BSD License that accompanies this distribution.  \r
The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php.                                          \r
    \r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
  @par Revision Reference:\r
  This protocol is defined in Framework for EFI Compatibility Support Module spec\r
  Version 0.97.\r
\r
**/\r
\r
#ifndef _EFI_LEGACY_8259_H_\r
#define _EFI_LEGACY_8259_H_\r
\r
\r
#define EFI_LEGACY_8259_PROTOCOL_GUID \\r
  { \\r
    0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1 } \\r
  }\r
\r
typedef struct _EFI_LEGACY_8259_PROTOCOL EFI_LEGACY_8259_PROTOCOL;\r
\r
typedef enum {\r
  Efi8259Irq0,\r
  Efi8259Irq1,\r
  Efi8259Irq2,\r
  Efi8259Irq3,\r
  Efi8259Irq4,\r
  Efi8259Irq5,\r
  Efi8259Irq6,\r
  Efi8259Irq7,\r
  Efi8259Irq8,\r
  Efi8259Irq9,\r
  Efi8259Irq10,\r
  Efi8259Irq11,\r
  Efi8259Irq12,\r
  Efi8259Irq13,\r
  Efi8259Irq14,\r
  Efi8259Irq15,\r
  Efi8259IrqMax\r
} EFI_8259_IRQ;\r
\r
typedef enum {\r
  Efi8259LegacyMode,\r
  Efi8259ProtectedMode,\r
  Efi8259MaxMode\r
} EFI_8259_MODE;\r
\r
/**\r
  Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for\r
  the legacy mode mask and the protected mode mask. The base address for the 8259\r
  is different for legacy and protected mode, so two masks are required.\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  MasterBase            The base vector for the Master PIC in the 8259 controller.\r
  @param  SlaveBase             The base vector for the Slave PIC in the 8259 controller.\r
\r
  @retval EFI_SUCCESS           The new bases were programmed.\r
  @retval EFI_DEVICE_ERROR      A device error occured programming the vector bases.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_8259_SET_VECTOR_BASE)(\r
  IN EFI_LEGACY_8259_PROTOCOL           *This,\r
  IN  UINT8                             MasterBase,\r
  IN  UINT8                             SlaveBase\r
  );\r
\r
/**\r
  Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for\r
  the legacy mode mask and the protected mode mask. The base address for the 8259\r
  is different for legacy and protected mode, so two masks are required.\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  LegacyMask            Bit 0 is Irq0 - Bit 15 is Irq15.\r
  @param  LegacyEdgeLevel       Bit 0 is Irq0 - Bit 15 is Irq15.\r
  @param  ProtectedMask         Bit 0 is Irq0 - Bit 15 is Irq15.\r
  @param  ProtectedEdgeLevel    Bit 0 is Irq0 - Bit 15 is Irq15.\r
\r
  @retval EFI_SUCCESS           8259 status returned.\r
  @retval EFI_DEVICE_ERROR      Error reading 8259.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_8259_GET_MASK)(\r
  IN EFI_LEGACY_8259_PROTOCOL           *This,\r
  OUT UINT16                            *LegacyMask, OPTIONAL\r
  OUT UINT16                            *LegacyEdgeLevel, OPTIONAL\r
  OUT UINT16                            *ProtectedMask, OPTIONAL\r
  OUT UINT16                            *ProtectedEdgeLevel OPTIONAL\r
  );\r
\r
/**\r
  Set the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for\r
  the legacy mode mask and the protected mode mask. The base address for the 8259\r
  is different for legacy and protected mode, so two masks are required.\r
  Also set the edge/level masks.\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  LegacyMask            Bit 0 is Irq0 - Bit 15 is Irq15.\r
  @param  LegacyEdgeLevel       Bit 0 is Irq0 - Bit 15 is Irq15.\r
  @param  ProtectedMask         Bit 0 is Irq0 - Bit 15 is Irq15.\r
  @param  ProtectedEdgeLevel    Bit 0 is Irq0 - Bit 15 is Irq15.\r
\r
  @retval EFI_SUCCESS           8259 status returned.\r
  @retval EFI_DEVICE_ERROR      Error writing 8259.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_8259_SET_MASK)(\r
  IN EFI_LEGACY_8259_PROTOCOL           *This,\r
  IN  UINT16                            *LegacyMask, OPTIONAL\r
  IN  UINT16                            *LegacyEdgeLevel, OPTIONAL\r
  IN  UINT16                            *ProtectedMask, OPTIONAL\r
  IN  UINT16                            *ProtectedEdgeLevel OPTIONAL\r
  );\r
\r
/**\r
  Set the 8259 mode of operation. The base address for the 8259 is different for\r
  legacy and protected mode. The legacy mode requires the master 8259 to have a\r
  master base of 0x08 and the slave base of 0x70. The protected mode base locations\r
  are not defined. Interrupts must be masked by the caller before this function\r
  is called. The interrupt mask from the current mode is saved. The interrupt\r
  mask for the new mode is Mask, or if Mask does not exist the previously saved\r
  mask is used.\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  Mode                  The mode of operation. i.e. the real mode or protected mode.\r
  @param  Mask                  Optional interupt mask for the new mode.\r
  @param  EdgeLevel             Optional trigger mask for the new mode.\r
\r
  @retval EFI_SUCCESS           8259 programmed.\r
  @retval EFI_DEVICE_ERROR      Error writing to 8259.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_8259_SET_MODE)(\r
  IN EFI_LEGACY_8259_PROTOCOL         *This,\r
  IN  EFI_8259_MODE                   Mode,\r
  IN  UINT16                          *Mask, OPTIONAL\r
  IN  UINT16                          *EdgeLevel OPTIONAL\r
  );\r
\r
/**\r
  Convert from IRQ to processor interrupt vector number.\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  Irq                   8259 IRQ0 - IRQ15.\r
  @param  Vector                The processor vector number that matches an Irq.\r
\r
  @retval EFI_SUCCESS           The Vector matching Irq is returned.\r
  @retval EFI_INVALID_PARAMETER The Irq not valid.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_8259_GET_VECTOR)(\r
  IN EFI_LEGACY_8259_PROTOCOL           *This,\r
  IN  EFI_8259_IRQ                      Irq,\r
  OUT UINT8                             *Vector\r
  );\r
\r
/**\r
  Enable Irq by unmasking interrupt in 8259\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  Irq                   8259 IRQ0 - IRQ15.\r
  @param  LevelTriggered        TRUE if level triggered. FALSE if edge triggered.\r
\r
  @retval EFI_SUCCESS           The Irq was enabled on 8259.\r
  @retval EFI_INVALID_PARAMETER The Irq is not valid.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_8259_ENABLE_IRQ)(\r
  IN EFI_LEGACY_8259_PROTOCOL           *This,\r
  IN  EFI_8259_IRQ                      Irq,\r
  IN  BOOLEAN                           LevelTriggered\r
  );\r
\r
/**\r
  Disable Irq by masking interrupt in 8259\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  Irq                   8259 IRQ0 - IRQ15.\r
\r
  @retval EFI_SUCCESS           The Irq was disabled on 8259.\r
  @retval EFI_INVALID_PARAMETER The Irq is not valid.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_8259_DISABLE_IRQ)(\r
  IN EFI_LEGACY_8259_PROTOCOL           *This,\r
  IN  EFI_8259_IRQ                      Irq\r
  );\r
\r
/**\r
  PciHandle represents a PCI config space of a PCI function. Vector\r
  represents Interrupt Pin (from PCI config space) and it is the data\r
  that is programmed into the Interrupt Line (from the PCI config space)\r
  register.\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  PciHandle             The PCI function to return the vector for.\r
  @param  Vector                The vector for the function it matches.\r
\r
  @retval EFI_SUCCESS           A valid Vector was returned.\r
  @retval EFI_INVALID_PARAMETER PciHandle not valid.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_8259_GET_INTERRUPT_LINE)(\r
  IN EFI_LEGACY_8259_PROTOCOL           *This,\r
  IN  EFI_HANDLE                        PciHandle,\r
  OUT UINT8                             *Vector\r
  );\r
\r
/**\r
  Send an EOI to 8259\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  Irq                   8259 IRQ0 - IRQ15.\r
\r
  @retval EFI_SUCCESS           EOI was successfully sent to 8259.\r
  @retval EFI_INVALID_PARAMETER The Irq isnot valid.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_8259_END_OF_INTERRUPT)(\r
  IN EFI_LEGACY_8259_PROTOCOL           *This,\r
  IN  EFI_8259_IRQ                      Irq\r
  );\r
\r
/**\r
  @par Protocol Description:\r
  Abstracts the 8259 and APIC hardware control between EFI usage and\r
  Compatibility16 usage.\r
\r
  @param SetVectorBase\r
  Sets the vector bases for master and slave PICs.\r
\r
  @param GetMask\r
  Gets IRQ and edge/level masks for 16-bit real mode and 32-bit protected mode.\r
\r
  @param SetMask\r
  Sets the IRQ and edge\level masks for 16-bit real mode and 32-bit protected mode.\r
\r
  @param SetMode\r
  Sets PIC mode to 16-bit real mode or 32-bit protected mode.\r
\r
  @param GetVector\r
  Gets the base vector assigned to an IRQ.\r
\r
  @param EnableIrq\r
  Enables an IRQ.\r
\r
  @param DisableIrq\r
  Disables an IRQ.\r
\r
  @param GetInterruptLine\r
  Gets an IRQ that is assigned to a PCI device.\r
\r
  @param EndOfInterrupt\r
  Issues the end of interrupt command.\r
\r
**/\r
struct _EFI_LEGACY_8259_PROTOCOL {\r
  EFI_LEGACY_8259_SET_VECTOR_BASE     SetVectorBase;\r
  EFI_LEGACY_8259_GET_MASK            GetMask;\r
  EFI_LEGACY_8259_SET_MASK            SetMask;\r
  EFI_LEGACY_8259_SET_MODE            SetMode;\r
  EFI_LEGACY_8259_GET_VECTOR          GetVector;\r
  EFI_LEGACY_8259_ENABLE_IRQ          EnableIrq;\r
  EFI_LEGACY_8259_DISABLE_IRQ         DisableIrq;\r
  EFI_LEGACY_8259_GET_INTERRUPT_LINE  GetInterruptLine;\r
  EFI_LEGACY_8259_END_OF_INTERRUPT    EndOfInterrupt;\r
};\r
\r
extern EFI_GUID gEfiLegacy8259ProtocolGuid;\r
\r
#endif\r
Commit	Line	Data
79964ac8	1	/** @file\r
79964ac8	2	This protocol abstracts the 8259 interrupt controller. This includes\r
5259c97d	3	PCI IRQ routing needed to program the PCI Interrupt Line register.\r
79964ac8	4	\r
f22f941e	5	Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved<BR>\r
	6	This program and the accompanying materials are licensed and made available under \r
	7	the terms and conditions of the BSD License that accompanies this distribution. \r
	8	The full text of the license may be found at\r
	9	http://opensource.org/licenses/bsd-license.php. \r
	10	\r
	11	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
	12	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
79964ac8	13	\r
79964ac8	14	@par Revision Reference:\r
79964ac8	15	This protocol is defined in Framework for EFI Compatibility Support Module spec\r
0f899407	16	Version 0.97.\r
79964ac8	17	\r
	18	**/\r
	19	\r
	20	#ifndef _EFI_LEGACY_8259_H_\r
	21	#define _EFI_LEGACY_8259_H_\r
	22	\r
b80fbe85	23	\r
79964ac8	24	#define EFI_LEGACY_8259_PROTOCOL_GUID \\r
	25	{ \\r
	26	0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1 } \\r
	27	}\r
	28	\r
	29	typedef struct _EFI_LEGACY_8259_PROTOCOL EFI_LEGACY_8259_PROTOCOL;\r
	30	\r
	31	typedef enum {\r
	32	Efi8259Irq0,\r
	33	Efi8259Irq1,\r
	34	Efi8259Irq2,\r
	35	Efi8259Irq3,\r
	36	Efi8259Irq4,\r
	37	Efi8259Irq5,\r
	38	Efi8259Irq6,\r
	39	Efi8259Irq7,\r
	40	Efi8259Irq8,\r
	41	Efi8259Irq9,\r
	42	Efi8259Irq10,\r
	43	Efi8259Irq11,\r
	44	Efi8259Irq12,\r
	45	Efi8259Irq13,\r
	46	Efi8259Irq14,\r
	47	Efi8259Irq15,\r
	48	Efi8259IrqMax\r
	49	} EFI_8259_IRQ;\r
	50	\r
	51	typedef enum {\r
	52	Efi8259LegacyMode,\r
	53	Efi8259ProtectedMode,\r
	54	Efi8259MaxMode\r
	55	} EFI_8259_MODE;\r
	56	\r
	57	/**\r
	58	Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for\r
	59	the legacy mode mask and the protected mode mask. The base address for the 8259\r
	60	is different for legacy and protected mode, so two masks are required.\r
	61	\r
f22f941e	62	@param This The protocol instance pointer.\r
	63	@param MasterBase The base vector for the Master PIC in the 8259 controller.\r
	64	@param SlaveBase The base vector for the Slave PIC in the 8259 controller.\r
79964ac8	65	\r
f22f941e	66	@retval EFI_SUCCESS The new bases were programmed.\r
f22f941e	67	@retval EFI_DEVICE_ERROR A device error occured programming the vector bases.\r
79964ac8	68	\r
	69	**/\r
	70	typedef\r
	71	EFI_STATUS\r
69686d56	72	(EFIAPI *EFI_LEGACY_8259_SET_VECTOR_BASE)(\r
79964ac8	73	IN EFI_LEGACY_8259_PROTOCOL *This,\r
	74	IN UINT8 MasterBase,\r
	75	IN UINT8 SlaveBase\r
	76	);\r
	77	\r
	78	/**\r
	79	Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for\r
	80	the legacy mode mask and the protected mode mask. The base address for the 8259\r
	81	is different for legacy and protected mode, so two masks are required.\r
	82	\r
f22f941e	83	@param This The protocol instance pointer.\r
	84	@param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15.\r
	85	@param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.\r
	86	@param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15.\r
	87	@param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.\r
79964ac8	88	\r
f22f941e	89	@retval EFI_SUCCESS 8259 status returned.\r
f22f941e	90	@retval EFI_DEVICE_ERROR Error reading 8259.\r
79964ac8	91	\r
	92	**/\r
	93	typedef\r
	94	EFI_STATUS\r
69686d56	95	(EFIAPI *EFI_LEGACY_8259_GET_MASK)(\r
79964ac8	96	IN EFI_LEGACY_8259_PROTOCOL *This,\r
	97	OUT UINT16 *LegacyMask, OPTIONAL\r
	98	OUT UINT16 *LegacyEdgeLevel, OPTIONAL\r
	99	OUT UINT16 *ProtectedMask, OPTIONAL\r
	100	OUT UINT16 *ProtectedEdgeLevel OPTIONAL\r
	101	);\r
	102	\r
	103	/**\r
	104	Set the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for\r
	105	the legacy mode mask and the protected mode mask. The base address for the 8259\r
	106	is different for legacy and protected mode, so two masks are required.\r
	107	Also set the edge/level masks.\r
	108	\r
f22f941e	109	@param This The protocol instance pointer.\r
	110	@param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15.\r
	111	@param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.\r
	112	@param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15.\r
	113	@param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.\r
79964ac8	114	\r
f22f941e	115	@retval EFI_SUCCESS 8259 status returned.\r
f22f941e	116	@retval EFI_DEVICE_ERROR Error writing 8259.\r
79964ac8	117	\r
	118	**/\r
	119	typedef\r
	120	EFI_STATUS\r
69686d56	121	(EFIAPI *EFI_LEGACY_8259_SET_MASK)(\r
79964ac8	122	IN EFI_LEGACY_8259_PROTOCOL *This,\r
	123	IN UINT16 *LegacyMask, OPTIONAL\r
	124	IN UINT16 *LegacyEdgeLevel, OPTIONAL\r
	125	IN UINT16 *ProtectedMask, OPTIONAL\r
	126	IN UINT16 *ProtectedEdgeLevel OPTIONAL\r
	127	);\r
	128	\r
	129	/**\r
	130	Set the 8259 mode of operation. The base address for the 8259 is different for\r
	131	legacy and protected mode. The legacy mode requires the master 8259 to have a\r
	132	master base of 0x08 and the slave base of 0x70. The protected mode base locations\r
	133	are not defined. Interrupts must be masked by the caller before this function\r
	134	is called. The interrupt mask from the current mode is saved. The interrupt\r
	135	mask for the new mode is Mask, or if Mask does not exist the previously saved\r
	136	mask is used.\r
	137	\r
f22f941e	138	@param This The protocol instance pointer.\r
f22f941e	139	@param Mode The mode of operation. i.e. the real mode or protected mode.\r
79964ac8	140	@param Mask Optional interupt mask for the new mode.\r
	141	@param EdgeLevel Optional trigger mask for the new mode.\r
	142	\r
f22f941e	143	@retval EFI_SUCCESS 8259 programmed.\r
f22f941e	144	@retval EFI_DEVICE_ERROR Error writing to 8259.\r
79964ac8	145	\r
	146	**/\r
	147	typedef\r
	148	EFI_STATUS\r
69686d56	149	(EFIAPI *EFI_LEGACY_8259_SET_MODE)(\r
79964ac8	150	IN EFI_LEGACY_8259_PROTOCOL *This,\r
	151	IN EFI_8259_MODE Mode,\r
	152	IN UINT16 *Mask, OPTIONAL\r
	153	IN UINT16 *EdgeLevel OPTIONAL\r
	154	);\r
	155	\r
	156	/**\r
	157	Convert from IRQ to processor interrupt vector number.\r
	158	\r
f22f941e	159	@param This The protocol instance pointer.\r
	160	@param Irq 8259 IRQ0 - IRQ15.\r
	161	@param Vector The processor vector number that matches an Irq.\r
79964ac8	162	\r
f22f941e	163	@retval EFI_SUCCESS The Vector matching Irq is returned.\r
f22f941e	164	@retval EFI_INVALID_PARAMETER The Irq not valid.\r
79964ac8	165	\r
	166	**/\r
	167	typedef\r
	168	EFI_STATUS\r
69686d56	169	(EFIAPI *EFI_LEGACY_8259_GET_VECTOR)(\r
79964ac8	170	IN EFI_LEGACY_8259_PROTOCOL *This,\r
	171	IN EFI_8259_IRQ Irq,\r
	172	OUT UINT8 *Vector\r
	173	);\r
	174	\r
	175	/**\r
	176	Enable Irq by unmasking interrupt in 8259\r
	177	\r
f22f941e	178	@param This The protocol instance pointer.\r
f22f941e	179	@param Irq 8259 IRQ0 - IRQ15.\r
79964ac8	180	@param LevelTriggered TRUE if level triggered. FALSE if edge triggered.\r
79964ac8	181	\r
f22f941e	182	@retval EFI_SUCCESS The Irq was enabled on 8259.\r
f22f941e	183	@retval EFI_INVALID_PARAMETER The Irq is not valid.\r
79964ac8	184	\r
	185	**/\r
	186	typedef\r
	187	EFI_STATUS\r
69686d56	188	(EFIAPI *EFI_LEGACY_8259_ENABLE_IRQ)(\r
79964ac8	189	IN EFI_LEGACY_8259_PROTOCOL *This,\r
	190	IN EFI_8259_IRQ Irq,\r
	191	IN BOOLEAN LevelTriggered\r
	192	);\r
	193	\r
	194	/**\r
	195	Disable Irq by masking interrupt in 8259\r
	196	\r
f22f941e	197	@param This The protocol instance pointer.\r
f22f941e	198	@param Irq 8259 IRQ0 - IRQ15.\r
79964ac8	199	\r
f22f941e	200	@retval EFI_SUCCESS The Irq was disabled on 8259.\r
f22f941e	201	@retval EFI_INVALID_PARAMETER The Irq is not valid.\r
79964ac8	202	\r
	203	**/\r
	204	typedef\r
	205	EFI_STATUS\r
69686d56	206	(EFIAPI *EFI_LEGACY_8259_DISABLE_IRQ)(\r
79964ac8	207	IN EFI_LEGACY_8259_PROTOCOL *This,\r
	208	IN EFI_8259_IRQ Irq\r
	209	);\r
	210	\r
	211	/**\r
	212	PciHandle represents a PCI config space of a PCI function. Vector\r
	213	represents Interrupt Pin (from PCI config space) and it is the data\r
	214	that is programmed into the Interrupt Line (from the PCI config space)\r
	215	register.\r
	216	\r
f22f941e	217	@param This The protocol instance pointer.\r
	218	@param PciHandle The PCI function to return the vector for.\r
	219	@param Vector The vector for the function it matches.\r
79964ac8	220	\r
f22f941e	221	@retval EFI_SUCCESS A valid Vector was returned.\r
f22f941e	222	@retval EFI_INVALID_PARAMETER PciHandle not valid.\r
79964ac8	223	\r
	224	**/\r
	225	typedef\r
	226	EFI_STATUS\r
69686d56	227	(EFIAPI *EFI_LEGACY_8259_GET_INTERRUPT_LINE)(\r
79964ac8	228	IN EFI_LEGACY_8259_PROTOCOL *This,\r
	229	IN EFI_HANDLE PciHandle,\r
	230	OUT UINT8 *Vector\r
	231	);\r
	232	\r
	233	/**\r
	234	Send an EOI to 8259\r
	235	\r
f22f941e	236	@param This The protocol instance pointer.\r
f22f941e	237	@param Irq 8259 IRQ0 - IRQ15.\r
79964ac8	238	\r
f22f941e	239	@retval EFI_SUCCESS EOI was successfully sent to 8259.\r
f22f941e	240	@retval EFI_INVALID_PARAMETER The Irq isnot valid.\r
79964ac8	241	\r
	242	**/\r
	243	typedef\r
	244	EFI_STATUS\r
69686d56	245	(EFIAPI *EFI_LEGACY_8259_END_OF_INTERRUPT)(\r
79964ac8	246	IN EFI_LEGACY_8259_PROTOCOL *This,\r
	247	IN EFI_8259_IRQ Irq\r
	248	);\r
	249	\r
	250	/**\r
	251	@par Protocol Description:\r
	252	Abstracts the 8259 and APIC hardware control between EFI usage and\r
	253	Compatibility16 usage.\r
	254	\r
	255	@param SetVectorBase\r
	256	Sets the vector bases for master and slave PICs.\r
	257	\r
	258	@param GetMask\r
	259	Gets IRQ and edge/level masks for 16-bit real mode and 32-bit protected mode.\r
	260	\r
	261	@param SetMask\r
	262	Sets the IRQ and edge\level masks for 16-bit real mode and 32-bit protected mode.\r
	263	\r
	264	@param SetMode\r
	265	Sets PIC mode to 16-bit real mode or 32-bit protected mode.\r
	266	\r
	267	@param GetVector\r
	268	Gets the base vector assigned to an IRQ.\r
	269	\r
	270	@param EnableIrq\r
	271	Enables an IRQ.\r
	272	\r
	273	@param DisableIrq\r
	274	Disables an IRQ.\r
	275	\r
	276	@param GetInterruptLine\r
	277	Gets an IRQ that is assigned to a PCI device.\r
	278	\r
	279	@param EndOfInterrupt\r
	280	Issues the end of interrupt command.\r
	281	\r
	282	**/\r
	283	struct _EFI_LEGACY_8259_PROTOCOL {\r
	284	EFI_LEGACY_8259_SET_VECTOR_BASE SetVectorBase;\r
	285	EFI_LEGACY_8259_GET_MASK GetMask;\r
	286	EFI_LEGACY_8259_SET_MASK SetMask;\r
	287	EFI_LEGACY_8259_SET_MODE SetMode;\r
	288	EFI_LEGACY_8259_GET_VECTOR GetVector;\r
	289	EFI_LEGACY_8259_ENABLE_IRQ EnableIrq;\r
	290	EFI_LEGACY_8259_DISABLE_IRQ DisableIrq;\r
	291	EFI_LEGACY_8259_GET_INTERRUPT_LINE GetInterruptLine;\r
	292	EFI_LEGACY_8259_END_OF_INTERRUPT EndOfInterrupt;\r
	293	};\r
	294	\r
	295	extern EFI_GUID gEfiLegacy8259ProtocolGuid;\r
	296	\r
	297	#endif\r