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79964ac8 | 1 | /** @file\r |
2 | The EFI Legacy BIOS Protocol is used to abstract legacy Option ROM usage\r | |
87d63447 | 3 | under EFI and Legacy OS boot. This file also includes all the related\r |
4 | COMPATIBILIY16 structures and defintions.\r | |
79964ac8 | 5 | \r |
6 | Note: The names for EFI_IA32_REGISTER_SET elements were picked to follow\r | |
7 | well known naming conventions.\r | |
8 | \r | |
5259c97d | 9 | Thunk is the code that switches from 32-bit protected environment into the 16-bit real-mode\r |
10 | environment. Reverse thunk is the code that does the opposite.\r | |
79964ac8 | 11 | \r |
881644d7 | 12 | Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>\r |
f22f941e | 13 | This program and the accompanying materials are licensed and made available under \r |
14 | the terms and conditions of the BSD License that accompanies this distribution. \r | |
15 | The full text of the license may be found at\r | |
16 | http://opensource.org/licenses/bsd-license.php. \r | |
17 | \r | |
18 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
19 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
79964ac8 | 20 | \r |
79964ac8 | 21 | @par Revision Reference:\r |
22 | This protocol is defined in Framework for EFI Compatibility Support Module spec\r | |
881644d7 | 23 | Version 0.98.\r |
79964ac8 | 24 | \r |
25 | **/\r | |
26 | \r | |
27 | #ifndef _EFI_LEGACY_BIOS_H_\r | |
28 | #define _EFI_LEGACY_BIOS_H_\r | |
29 | \r | |
87d63447 | 30 | ///\r |
31 | /// \r | |
32 | ///\r | |
33 | #pragma pack(1)\r | |
34 | \r | |
35 | typedef UINT8 SERIAL_MODE;\r | |
36 | typedef UINT8 PARALLEL_MODE;\r | |
37 | \r | |
38 | #define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$')\r | |
39 | \r | |
40 | ///\r | |
41 | /// There is a table located within the traditional BIOS in either the 0xF000:xxxx or 0xE000:xxxx\r | |
42 | /// physical address range. It is located on a 16-byte boundary and provides the physical address of the\r | |
43 | /// entry point for the Compatibility16 functions. These functions provide the platform-specific\r | |
44 | /// information that is required by the generic EfiCompatibility code. The functions are invoked via\r | |
45 | /// thunking by using EFI_LEGACY_BIOS_PROTOCOL.FarCall86() with the 32-bit physical\r | |
46 | /// entry point.\r | |
47 | ///\r | |
48 | typedef struct {\r | |
49 | ///\r | |
50 | /// The string "$EFI" denotes the start of the EfiCompatibility table. Byte 0 is "I," byte\r | |
51 | /// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed as a DWORD or UINT32.\r | |
52 | ///\r | |
53 | UINT32 Signature;\r | |
54 | \r | |
55 | ///\r | |
56 | /// The value required such that byte checksum of TableLength equals zero.\r | |
57 | ///\r | |
58 | UINT8 TableChecksum;\r | |
59 | \r | |
60 | ///\r | |
61 | /// The length of this table.\r | |
62 | ///\r | |
63 | UINT8 TableLength;\r | |
64 | \r | |
65 | ///\r | |
66 | /// The major EFI revision for which this table was generated.\r | |
67 | /// \r | |
68 | UINT8 EfiMajorRevision;\r | |
69 | \r | |
70 | ///\r | |
71 | /// The minor EFI revision for which this table was generated.\r | |
72 | ///\r | |
73 | UINT8 EfiMinorRevision;\r | |
74 | \r | |
75 | ///\r | |
76 | /// The major revision of this table.\r | |
77 | ///\r | |
78 | UINT8 TableMajorRevision;\r | |
79 | \r | |
80 | ///\r | |
81 | /// The minor revision of this table.\r | |
82 | ///\r | |
83 | UINT8 TableMinorRevision;\r | |
84 | \r | |
85 | ///\r | |
86 | /// Reserved for future usage.\r | |
87 | ///\r | |
88 | UINT16 Reserved;\r | |
89 | \r | |
90 | ///\r | |
91 | /// The segment of the entry point within the traditional BIOS for Compatibility16 functions.\r | |
92 | ///\r | |
93 | UINT16 Compatibility16CallSegment;\r | |
94 | \r | |
95 | ///\r | |
96 | /// The offset of the entry point within the traditional BIOS for Compatibility16 functions.\r | |
97 | ///\r | |
98 | UINT16 Compatibility16CallOffset;\r | |
99 | \r | |
100 | ///\r | |
f22f941e | 101 | /// The segment of the entry point within the traditional BIOS for EfiCompatibility \r |
102 | /// to invoke the PnP installation check.\r | |
87d63447 | 103 | ///\r |
104 | UINT16 PnPInstallationCheckSegment;\r | |
105 | \r | |
106 | ///\r | |
f22f941e | 107 | /// The Offset of the entry point within the traditional BIOS for EfiCompatibility \r |
108 | /// to invoke the PnP installation check.\r | |
87d63447 | 109 | ///\r |
110 | UINT16 PnPInstallationCheckOffset;\r | |
111 | \r | |
112 | ///\r | |
f22f941e | 113 | /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform \r |
114 | ///Innovation Framework for EFI Driver Execution Environment Core Interface Specification (DXE CIS).\r | |
87d63447 | 115 | ///\r |
116 | UINT32 EfiSystemTable; \r | |
117 | \r | |
118 | ///\r | |
119 | /// The address of an OEM-provided identifier string. The string is null terminated.\r | |
120 | ///\r | |
121 | UINT32 OemIdStringPointer;\r | |
122 | \r | |
123 | ///\r | |
124 | /// The 32-bit physical address where ACPI RSD PTR is stored within the traditional\r | |
125 | /// BIOS. The remained of the ACPI tables are located at their EFI addresses. The size\r | |
126 | /// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill in the ACPI\r | |
127 | /// RSD PTR with either the ACPI 1.0b or 2.0 values.\r | |
128 | ///\r | |
129 | UINT32 AcpiRsdPtrPointer;\r | |
130 | \r | |
131 | ///\r | |
132 | /// The OEM revision number. Usage is undefined but provided for OEM module usage.\r | |
133 | ///\r | |
134 | UINT16 OemRevision;\r | |
135 | \r | |
136 | ///\r | |
137 | /// The 32-bit physical address where INT15 E820 data is stored within the traditional\r | |
138 | /// BIOS. The EfiCompatibility code will fill in the E820Pointer value and copy the\r | |
139 | /// data to the indicated area.\r | |
140 | ///\r | |
141 | UINT32 E820Pointer;\r | |
142 | \r | |
143 | ///\r | |
144 | /// The length of the E820 data and is filled in by the EfiCompatibility code.\r | |
145 | ///\r | |
146 | UINT32 E820Length;\r | |
147 | \r | |
148 | ///\r | |
149 | /// The 32-bit physical address where the $PIR table is stored in the traditional BIOS.\r | |
150 | /// The EfiCompatibility code will fill in the IrqRoutingTablePointer value and\r | |
151 | /// copy the data to the indicated area.\r | |
152 | ///\r | |
153 | UINT32 IrqRoutingTablePointer;\r | |
154 | \r | |
155 | ///\r | |
156 | /// The length of the $PIR table and is filled in by the EfiCompatibility code.\r | |
157 | ///\r | |
158 | UINT32 IrqRoutingTableLength;\r | |
159 | \r | |
160 | ///\r | |
161 | /// The 32-bit physical address where the MP table is stored in the traditional BIOS.\r | |
f22f941e | 162 | /// The EfiCompatibility code will fill in the MpTablePtr value and copy the data \r |
163 | /// to the indicated area.\r | |
87d63447 | 164 | ///\r |
165 | UINT32 MpTablePtr;\r | |
166 | \r | |
167 | ///\r | |
168 | /// The length of the MP table and is filled in by the EfiCompatibility code.\r | |
169 | ///\r | |
170 | UINT32 MpTableLength;\r | |
171 | \r | |
172 | ///\r | |
173 | /// The segment of the OEM-specific INT table/code.\r | |
174 | /// \r | |
175 | UINT16 OemIntSegment;\r | |
176 | \r | |
177 | ///\r | |
178 | /// The offset of the OEM-specific INT table/code.\r | |
179 | ///\r | |
180 | UINT16 OemIntOffset;\r | |
181 | \r | |
182 | ///\r | |
183 | /// The segment of the OEM-specific 32-bit table/code.\r | |
184 | ///\r | |
185 | UINT16 Oem32Segment;\r | |
186 | \r | |
187 | ///\r | |
188 | /// The offset of the OEM-specific 32-bit table/code.\r | |
189 | ///\r | |
190 | UINT16 Oem32Offset;\r | |
191 | \r | |
192 | ///\r | |
193 | /// The segment of the OEM-specific 16-bit table/code.\r | |
194 | ///\r | |
195 | UINT16 Oem16Segment;\r | |
196 | \r | |
197 | ///\r | |
198 | /// The offset of the OEM-specific 16-bit table/code.\r | |
199 | ///\r | |
200 | UINT16 Oem16Offset;\r | |
201 | \r | |
202 | ///\r | |
203 | /// The segment of the TPM binary passed to 16-bit CSM.\r | |
204 | ///\r | |
205 | UINT16 TpmSegment;\r | |
206 | \r | |
207 | ///\r | |
208 | /// The offset of the TPM binary passed to 16-bit CSM.\r | |
209 | ///\r | |
210 | UINT16 TpmOffset;\r | |
211 | \r | |
212 | ///\r | |
213 | /// A pointer to a string identifying the independent BIOS vendor.\r | |
214 | ///\r | |
215 | UINT32 IbvPointer;\r | |
216 | \r | |
217 | ///\r | |
218 | /// This field is NULL for all systems not supporting PCI Express. This field is the base\r | |
219 | /// value of the start of the PCI Express memory-mapped configuration registers and\r | |
220 | /// must be filled in prior to EfiCompatibility code issuing the Compatibility16 function\r | |
221 | /// Compatibility16InitializeYourself().\r | |
222 | /// Compatibility16InitializeYourself() is defined in Compatability16\r | |
223 | /// Functions.\r | |
224 | ///\r | |
225 | UINT32 PciExpressBase;\r | |
226 | \r | |
227 | ///\r | |
228 | /// Maximum PCI bus number assigned.\r | |
229 | ///\r | |
230 | UINT8 LastPciBus;\r | |
881644d7 DW |
231 | \r |
232 | ///\r | |
233 | /// Start Address of Upper Memory Area (UMA) to be set as Read/Write. If\r | |
234 | /// UmaAddress is a valid address in the shadow RAM, it also indicates that the region\r | |
235 |