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79964ac8 1/** @file\r
2 The EFI Legacy BIOS Protocol is used to abstract legacy Option ROM usage\r
87d63447 3 under EFI and Legacy OS boot. This file also includes all the related\r
4 COMPATIBILIY16 structures and defintions.\r
79964ac8 5\r
6 Note: The names for EFI_IA32_REGISTER_SET elements were picked to follow\r
7 well known naming conventions.\r
8\r
5259c97d 9 Thunk is the code that switches from 32-bit protected environment into the 16-bit real-mode\r
10 environment. Reverse thunk is the code that does the opposite.\r
79964ac8 11\r
ce9b1e3a 12 Copyright (c) 2007 - 2010, Intel Corporation\r
79964ac8 13 All rights reserved. This program and the accompanying materials\r
14 are licensed and made available under the terms and conditions of the BSD License\r
15 which accompanies this distribution. The full text of the license may be found at\r
16 http://opensource.org/licenses/bsd-license.php\r
17\r
18 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
19 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
20\r
79964ac8 21 @par Revision Reference:\r
22 This protocol is defined in Framework for EFI Compatibility Support Module spec\r
0f899407 23 Version 0.97.\r
79964ac8 24\r
25**/\r
26\r
27#ifndef _EFI_LEGACY_BIOS_H_\r
28#define _EFI_LEGACY_BIOS_H_\r
29\r
87d63447 30///\r
31/// \r
32///\r
33#pragma pack(1)\r
34\r
35typedef UINT8 SERIAL_MODE;\r
36typedef UINT8 PARALLEL_MODE;\r
37\r
38#define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$')\r
39\r
40///\r
41/// There is a table located within the traditional BIOS in either the 0xF000:xxxx or 0xE000:xxxx\r
42/// physical address range. It is located on a 16-byte boundary and provides the physical address of the\r
43/// entry point for the Compatibility16 functions. These functions provide the platform-specific\r
44/// information that is required by the generic EfiCompatibility code. The functions are invoked via\r
45/// thunking by using EFI_LEGACY_BIOS_PROTOCOL.FarCall86() with the 32-bit physical\r
46/// entry point.\r
47///\r
48typedef struct {\r
49 ///\r
50 /// The string "$EFI" denotes the start of the EfiCompatibility table. Byte 0 is "I," byte\r
51 /// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed as a DWORD or UINT32.\r
52 ///\r
53 UINT32 Signature;\r
54 \r
55 ///\r
56 /// The value required such that byte checksum of TableLength equals zero.\r
57 ///\r
58 UINT8 TableChecksum;\r
59 \r
60 ///\r
61 /// The length of this table.\r
62 ///\r
63 UINT8 TableLength;\r
64 \r
65 ///\r
66 /// The major EFI revision for which this table was generated.\r
67 /// \r
68 UINT8 EfiMajorRevision;\r
69 \r
70 ///\r
71 /// The minor EFI revision for which this table was generated.\r
72 ///\r
73 UINT8 EfiMinorRevision;\r
74 \r
75 ///\r
76 /// The major revision of this table.\r
77 ///\r
78 UINT8 TableMajorRevision;\r
79 \r
80 ///\r
81 /// The minor revision of this table.\r
82 ///\r
83 UINT8 TableMinorRevision;\r
84 \r
85 ///\r
86 /// Reserved for future usage.\r
87 ///\r
88 UINT16 Reserved;\r
89 \r
90 ///\r
91 /// The segment of the entry point within the traditional BIOS for Compatibility16 functions.\r
92 ///\r
93 UINT16 Compatibility16CallSegment;\r
94 \r
95 ///\r
96 /// The offset of the entry point within the traditional BIOS for Compatibility16 functions.\r
97 ///\r
98 UINT16 Compatibility16CallOffset;\r
99 \r
100 ///\r
101 /// The segment of the entry point within the traditional BIOS for EfiCompatibility to invoke the PnP installation check.\r
102 ///\r
103 UINT16 PnPInstallationCheckSegment;\r
104 \r
105 ///\r
106 /// The Offset of the entry point within the traditional BIOS for EfiCompatibility to invoke the PnP installation check.\r
107 ///\r
108 UINT16 PnPInstallationCheckOffset;\r
109 \r
110 ///\r
111 /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform Innovation Framework for EFI \r
112 /// Driver Execution Environment Core Interface Specification (DXE CIS).\r
113 ///\r
114 UINT32 EfiSystemTable; \r
115 \r
116 ///\r
117 /// The address of an OEM-provided identifier string. The string is null terminated.\r
118 ///\r
119 UINT32 OemIdStringPointer;\r
120 \r
121 ///\r
122 /// The 32-bit physical address where ACPI RSD PTR is stored within the traditional\r
123 /// BIOS. The remained of the ACPI tables are located at their EFI addresses. The size\r
124 /// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill in the ACPI\r
125 /// RSD PTR with either the ACPI 1.0b or 2.0 values.\r
126 ///\r
127 UINT32 AcpiRsdPtrPointer;\r
128 \r
129 ///\r
130 /// The OEM revision number. Usage is undefined but provided for OEM module usage.\r
131 ///\r
132 UINT16 OemRevision;\r
133 \r
134 ///\r
135 /// The 32-bit physical address where INT15 E820 data is stored within the traditional\r
136 /// BIOS. The EfiCompatibility code will fill in the E820Pointer value and copy the\r
137 /// data to the indicated area.\r
138 ///\r
139 UINT32 E820Pointer;\r
140 \r
141 ///\r
142 /// The length of the E820 data and is filled in by the EfiCompatibility code.\r
143 ///\r
144 UINT32 E820Length;\r
145 \r
146 ///\r
147 /// The 32-bit physical address where the $PIR table is stored in the traditional BIOS.\r
148 /// The EfiCompatibility code will fill in the IrqRoutingTablePointer value and\r
149 /// copy the data to the indicated area.\r
150 ///\r
151 UINT32 IrqRoutingTablePointer;\r
152 \r
153 ///\r
154 /// The length of the $PIR table and is filled in by the EfiCompatibility code.\r
155 ///\r
156 UINT32 IrqRoutingTableLength;\r
157 \r
158 ///\r
159 /// The 32-bit physical address where the MP table is stored in the traditional BIOS.\r
160 /// The EfiCompatibility code will fill in the MpTablePtr value and copy the data to the indicated area.\r
161 ///\r
162 UINT32 MpTablePtr;\r
163 \r
164 ///\r
165 /// The length of the MP table and is filled in by the EfiCompatibility code.\r
166 ///\r
167 UINT32 MpTableLength;\r
168 \r
169 ///\r
170 /// The segment of the OEM-specific INT table/code.\r
171 /// \r
172 UINT16 OemIntSegment;\r
173 \r
174 ///\r
175 /// The offset of the OEM-specific INT table/code.\r
176 ///\r
177 UINT16 OemIntOffset;\r
178 \r
179 ///\r
180 /// The segment of the OEM-specific 32-bit table/code.\r
181 ///\r
182 UINT16 Oem32Segment;\r
183 \r
184 ///\r
185 /// The offset of the OEM-specific 32-bit table/code.\r
186 ///\r
187 UINT16 Oem32Offset;\r
188 \r
189 ///\r
190 /// The segment of the OEM-specific 16-bit table/code.\r
191 ///\r
192 UINT16 Oem16Segment;\r
193 \r
194 ///\r
195 /// The offset of the OEM-specific 16-bit table/code.\r
196 ///\r
197 UINT16 Oem16Offset;\r
198 \r
199 ///\r
200 /// The segment of the TPM binary passed to 16-bit CSM.\r
201 ///\r
202 UINT16 TpmSegment;\r
203 \r
204 ///\r
205 /// The offset of the TPM binary passed to 16-bit CSM.\r
206 ///\r
207 UINT16 TpmOffset;\r
208 \r
209 ///\r
210 /// A pointer to a string identifying the independent BIOS vendor.\r
211 ///\r
212 UINT32 IbvPointer;\r
213 \r
214 ///\r
215 /// This field is NULL for all systems not supporting PCI Express. This field is the base\r
216 /// value of the start of the PCI Express memory-mapped configuration registers and\r
217 /// must be filled in prior to EfiCompatibility code issuing the Compatibility16 function\r
218 /// Compatibility16InitializeYourself().\r
219 /// Compatibility16InitializeYourself() is defined in Compatability16\r
220 /// Functions.\r
221 ///\r
222 UINT32 PciExpressBase;\r
223 \r
224 ///\r
225 /// Maximum PCI bus number assigned.\r
226 ///\r
227 UINT8 LastPciBus;\r
228} EFI_COMPATIBILITY16_TABLE;\r
229\r
230///\r
231/// Functions provided by the CSM binary which communicate between the EfiCompatibility \r
232/// and Compatability16 code.\r
233///\r
234/// Inconsistent with specification here: \r
235/// The member's name started with "Compatibility16" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version] \r
236/// has been changed to "Legacy16" since keeping backward compatible.\r
237///\r
238typedef enum {\r
239 ///\r
240 /// Causes the Compatibility16 code to do any internal initialization required.\r
241 /// Input:\r
242 /// AX = Compatibility16InitializeYourself\r
243 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_INIT_TABLE\r
244 /// Return:\r
245 /// AX = Return Status codes\r
246 ///\r
247 Legacy16InitializeYourself = 0x0000,\r
248 \r
249 ///\r
250 /// Causes the Compatibility16 BIOS to perform any drive number translations to match the boot sequence.\r
251 /// Input:\r
252 /// AX = Compatibility16UpdateBbs\r
253 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE\r
254 /// Return:\r
255 /// AX = Returned status codes\r
256 ///\r
257 Legacy16UpdateBbs = 0x0001,\r
258 \r
259 ///\r
260 /// Allows the Compatibility16 code to perform any final actions before booting. The Compatibility16\r
261 /// code is read/write.\r
262 /// Input:\r
263 /// AX = Compatibility16PrepareToBoot\r
264 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure \r
265 /// Return:\r
266 /// AX = Returned status codes\r
267 ///\r
268 Legacy16PrepareToBoot = 0x0002,\r
269 \r
270 ///\r
271 /// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is Read/Only.\r
272 /// Input:\r
273 /// AX = Compatibility16Boot\r
274 /// Output:\r
275 /// AX = Returned status codes\r
276 ///\r
277 Legacy16Boot = 0x0003,\r
278 \r
279 ///\r
280 /// Allows the Compatibility16 code to get the last device from which a boot was attempted. This is\r
281 /// stored in CMOS and is the priority number of the last attempted boot device.\r
282 /// Input:\r
283 /// AX = Compatibility16RetrieveLastBootDevice\r
284 /// Output:\r
285 /// AX = Returned status codes\r
286 /// BX = Priority number of the boot device.\r
287 ///\r
288 Legacy16RetrieveLastBootDevice = 0x0004,\r
289 \r
290 ///\r
291 /// Allows the Compatibility16 code rehook INT13, INT18, and/or INT19 after dispatching a legacy OpROM.\r
292 /// Input:\r
293 /// AX = Compatibility16DispatchOprom\r
294 /// ES:BX = Pointer to EFI_DISPATCH_OPROM_TABLE\r
295 /// Output:\r
296 /// AX = Returned status codes\r
297 /// BX = Number of non-BBS-compliant devices found. Equals 0 if BBS compliant.\r
298 ///\r
299 Legacy16DispatchOprom = 0x0005,\r
300 \r
301 ///\r
302 /// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified length and returns the address\r
303 /// of that region.\r
304 /// Input:\r
305 /// AX = Compatibility16GetTableAddress\r
306 /// BX = Allocation region\r
307 /// 00 = Allocate from either 0xE0000 or 0xF0000 64 KB blocks.\r
308 /// Bit 0 = 1 Allocate from 0xF0000 64 KB block\r
309 /// Bit 1 = 1 Allocate from 0xE0000 64 KB block\r
310 /// CX = Requested length in bytes.\r
311 /// DX = Required address alignment. Bit mapped. First non-zero bit from the right is the alignment.\r
312 /// Output:\r
313 /// AX = Returned status codes\r
314 /// DS:BX = Address of the region\r
315 ///\r
316 Legacy16GetTableAddress = 0x0006,\r
317 \r
318 ///\r
319 /// Enables the EfiCompatibility module to do any nonstandard processing of keyboard LEDs or state.\r
320 /// Input:\r
321 /// AX = Compatibility16SetKeyboardLeds\r
322 /// CL = LED status.\r
323 /// Bit 0 Scroll Lock 0 = Off\r
324 /// Bit 1 NumLock\r
325 /// Bit 2 Caps Lock\r
326 /// Output:\r
327 /// AX = Returned status codes\r
328 ///\r
329 Legacy16SetKeyboardLeds = 0x0007,\r
330 \r
331 ///\r
332 /// Enables the EfiCompatibility module to install an interrupt handler for PCI mass media devices that\r
333 /// do not have an OpROM associated with them. An example is SATA.\r
334 /// Input:\r
335 /// AX = Compatibility16InstallPciHandler\r
336 /// ES:BX = Pointer to EFI_LEGACY_INSTALL_PCI_HANDLER structure\r
337 /// Output:\r
338 /// AX = Returned status codes\r
339 ///\r
340 Legacy16InstallPciHandler = 0x0008\r
341} EFI_COMPATIBILITY_FUNCTIONS;\r
342\r
343\r
344///\r
345/// EFI_DISPATCH_OPROM_TABLE\r
346///\r
347typedef struct {\r
348 UINT16 PnPInstallationCheckSegment; ///< Pointer to the PnpInstallationCheck data structure.\r
349 UINT16 PnPInstallationCheckOffset; ///< Pointer to the PnpInstallationCheck data structure.\r
350 UINT16 OpromSegment; ///< The segment where the OpROM was placed. Offset is assumed to be 3.\r
351 UINT8 PciBus; ///< The PCI bus.\r
352 UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI function.\r
353 UINT8 NumberBbsEntries; ///< The number of valid BBS table entries upon entry and exit. The IBV code may\r
354 ///< increase this number, if BBS-compliant devices also hook INTs in order to force the\r
355 ///< OpROM BIOS Setup to be executed.\r
356 VOID *BbsTablePointer; ///< Pointer to the BBS table.\r
357 UINT16 RuntimeSegment; ///< The segment where the OpROM can be relocated to. If this value is 0x0000, this\r
358 ///< means that the relocation of this run time code is not supported.\r
359 ///< Inconsistent with specification here: \r
360 ///< The member's name "OpromDestinationSegment" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version] \r
361 ///< has been changed to "RuntimeSegment" since keeping backward compatible.\r
362\r
363} EFI_DISPATCH_OPROM_TABLE;\r
364\r
365///\r
366/// EFI_TO_COMPATIBILITY16_INIT_TABLE\r
367///\r
368typedef struct {\r
369 ///\r
370 /// Starting address of memory under 1 MB. The ending address is assumed to be 640 KB or 0x9FFFF.\r
371 ///\r
372 UINT32 BiosLessThan1MB;\r
373 \r
374 ///\r
375 /// Starting address of the high memory block.\r
376 ///\r
377 UINT32 HiPmmMemory;\r
378 \r
379 ///\r
380 /// Length of high memory block.\r
381 ///\r
382 UINT32 HiPmmMemorySizeInBytes;\r
383 \r
384 ///\r
385 /// The segment of the reverse thunk call code.\r
386 ///\r
387 UINT16 ReverseThunkCallSegment;\r
388 \r
389 ///\r
390 /// The offset of the reverse thunk call code.\r
391 ///\r
392 UINT16 ReverseThunkCallOffset;\r
393 \r
394 ///\r
395 /// The number of E820 entries copied to the Compatibility16 BIOS.\r
396 ///\r
397 UINT32 NumberE820Entries;\r
398 \r
399 ///\r
400 /// The amount of usable memory above 1 MB, e.g., E820 type 1 memory.\r
401 ///\r
402 UINT32 OsMemoryAbove1Mb;\r
403 \r
404 ///\r
405 /// The start of thunk code in main memory. Memory cannot be used by BIOS or PMM.\r
406 ///\r
407 UINT32 ThunkStart;\r
408 \r
409 ///\r
410 /// The size of the thunk code.\r
411 ///\r
412 UINT32 ThunkSizeInBytes;\r
413 \r
414 ///\r
415 /// Starting address of memory under 1 MB.\r
416 ///\r
417 UINT32 LowPmmMemory;\r
418 \r
419 ///\r
420 /// Length of low Memory block.\r
421 ///\r
422 UINT32 LowPmmMemorySizeInBytes;\r
423} EFI_TO_COMPATIBILITY16_INIT_TABLE;\r
424\r
425///\r
426/// DEVICE_PRODUCER_SERIAL\r
427///\r
428typedef struct {\r
429 UINT16 Address; ///< I/O address assigned to the serial port\r
430 UINT8 Irq; ///< IRQ assigned to the serial port.\r
431 SERIAL_MODE Mode; ///< Mode of serial port. Values are defined below.\r
432} DEVICE_PRODUCER_SERIAL;\r
433\r
434///\r
435/// DEVICE_PRODUCER_SERIAL's modes\r
436///@{\r
437#define DEVICE_SERIAL_MODE_NORMAL 0x00\r
438#define DEVICE_SERIAL_MODE_IRDA 0x01\r
439#define DEVICE_SERIAL_MODE_ASK_IR 0x02\r
440#define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00\r
441#define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10\r
442///@)\r
443\r
444///\r
445/// DEVICE_PRODUCER_PARALLEL\r
446///\r
447typedef struct {\r
448 UINT16 Address; ///< I/O address assigned to the parallel port\r
449 UINT8 Irq; ///< IRQ assigned to the parallel port.\r
450 UINT8 Dma; ///< DMA assigned to the parallel port.\r
451 PARALLEL_MODE Mode; ///< Mode of the parallel port. Values are defined below.\r
452} DEVICE_PRODUCER_PARALLEL;\r
453\r
454///\r
455/// DEVICE_PRODUCER_PARALLEL's modes\r
456///@{\r
457#define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00\r
458#define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01\r
459#define DEVICE_PARALLEL_MODE_MODE_EPP 0x02\r
460#define DEVICE_PARALLEL_MODE_MODE_ECP 0x03\r
461///@}\r
462\r
463///\r
464/// DEVICE_PRODUCER_FLOPPY\r
465///\r
466typedef struct {\r
467 UINT16 Address; ///< I/O address assigned to the floppy\r
468 UINT8 Irq; ///< IRQ assigned to the floppy.\r
469 UINT8 Dma; ///< DMA assigned to the floppy.\r
470 UINT8 NumberOfFloppy; ///< Number of floppies in the system.\r
471} DEVICE_PRODUCER_FLOPPY;\r
472\r
473///\r
474/// LEGACY_DEVICE_FLAGS\r
475///\r
476typedef struct {\r
477 UINT32 A20Kybd : 1; ///< A20 controller by keyboard controller.\r
478 UINT32 A20Port90 : 1; ///< A20 controlled by port 0x92.\r
479 UINT32 Reserved : 30; ///< Reserved for future usage.\r
480} LEGACY_DEVICE_FLAGS;\r
481\r
482///\r
483/// DEVICE_PRODUCER_DATA_HEADER\r
484///\r
485typedef struct {\r
486 DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial port x. Type DEVICE_PRODUCER_SERIAL is defined below.\r
487 DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel port x. Type DEVICE_PRODUCER_PARALLEL is defined below.\r
488 DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. Type DEVICE_PRODUCER_FLOPPY is defined below.\r
489 UINT8 MousePresent; ///< Flag to indicate if mouse is present.\r
490 LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boolean state information passed to CSM.\r
491} DEVICE_PRODUCER_DATA_HEADER;\r
492\r
493///\r
494/// ATAPI_IDENTIFY\r
495///\r
496typedef struct {\r
497 UINT16 Raw[256]; ///< Raw data from the IDE IdentifyDrive command.\r
498} ATAPI_IDENTIFY;\r
499\r
500///\r
501/// HDD_INFO\r
502///\r
503typedef struct {\r
504 ///\r
505 /// Status of IDE device. Values are defined below. There is one HDD_INFO structure\r
506 /// per IDE controller. The IdentifyDrive is per drive. Index 0 is master and index\r
507 /// 1 is slave.\r
508 ///\r
509 UINT16 Status; \r
510 \r
511 ///\r
512 /// PCI bus of IDE controller.\r
513 ///\r
514 UINT32 Bus;\r
515 \r
516 ///\r
517 /// PCI device of IDE controller.\r
518 ///\r
519 UINT32 Device;\r
520 \r
521 ///\r
522 /// PCI function of IDE controller.\r
523 ///\r
524 UINT32 Function;\r
525 \r
526 ///\r
527 /// Command ports base address.\r
528 ///\r
529 UINT16 CommandBaseAddress;\r
530 \r
531 ///\r
532 /// Control ports base address.\r
533 ///\r
534 UINT16 ControlBaseAddress;\r
535 \r
536 ///\r
537 /// Bus master address\r
538 ///\r
539 UINT16 BusMasterAddress;\r
540 \r
541 UINT8 HddIrq;\r
542 \r
543 ///\r
544 /// Data that identifies the drive data, one per possible attached drive\r
545 ///\r
546 ATAPI_IDENTIFY IdentifyDrive[2];\r
547} HDD_INFO;\r
548\r
549///\r
550/// HDD_INFO status bits\r
551///\r
552#define HDD_PRIMARY 0x01\r
553#define HDD_SECONDARY 0x02\r
554#define HDD_MASTER_ATAPI_CDROM 0x04\r
555#define HDD_SLAVE_ATAPI_CDROM 0x08\r
556#define HDD_MASTER_IDE 0x20\r
557#define HDD_SLAVE_IDE 0x40\r
558#define HDD_MASTER_ATAPI_ZIPDISK 0x10\r
559#define HDD_SLAVE_ATAPI_ZIPDISK 0x80\r
560\r
561///\r
562/// BBS_STATUS_FLAGS\r
563///\r
564typedef struct {\r
565 UINT16 OldPosition : 4; ///< Prior priority.\r
566 UINT16 Reserved1 : 4; ///< Reserved for future use.\r
567 UINT16 Enabled : 1; ///< If 0, ignore this entry.\r
568 UINT16 Failed : 1; ///< 0 = Not known if boot failure occurred.\r
569 ///< 1 = Boot attempted failed.\r
570 \r
571 ///\r
572 /// State of media present.\r
573 /// 00 = No bootable media is present in the device.\r
574 /// 01 = Unknown if a bootable media present.\r
575 /// 10 = Media is present and appears bootable.\r
576 /// 11 = Reserved.\r
577 ///\r
578 UINT16 MediaPresent : 2;\r
579 UINT16 Reserved2 : 4; ///< Reserved for future use.\r
580} BBS_STATUS_FLAGS;\r
581\r
582///\r
583/// BBS_TABLE, device type values & boot priority values\r
584///\r
585typedef struct {\r
586 ///\r
587 /// The boot priority for this boot device. Values are defined below.\r
588 ///\r
589 UINT16 BootPriority;\r
590 \r
591 ///\r
592 /// The PCI bus for this boot device.\r
593 ///\r
594 UINT32 Bus;\r
595 \r
596 ///\r
597 /// The PCI device for this boot device.\r
598 ///\r
599 UINT32 Device;\r
600 \r
601 ///\r
602 /// The PCI function for the boot device.\r
603 ///\r
604 UINT32 Function;\r
605 \r
606 ///\r
607 /// The PCI class for this boot device.\r
608 ///\r
609 UINT8 Class;\r
610 \r
611 ///\r
612 /// The PCI Subclass for this boot device.\r
613 ///\r
614 UINT8 SubClass;\r
615 \r
616 ///\r
617 /// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r
618 ///\r
619 UINT16 MfgStringOffset;\r
620 \r
621 ///\r
622 /// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r
623 /// \r
624 UINT16 MfgStringSegment;\r
625 \r
626 ///\r
627 /// BBS device type. BBS device types are defined below.\r
628 ///\r
629 UINT16 DeviceType;\r
630 \r
631 ///\r
632 /// Status of this boot device. Type BBS_STATUS_FLAGS is defined below.\r
633 ///\r
634 BBS_STATUS_FLAGS StatusFlags;\r
635 \r
636 ///\r
637 /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r
638 /// BCV devices.\r
639 ///\r
640 UINT16 BootHandlerOffset;\r
641 \r
642 ///\r
643 /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r
644 /// BCV devices.\r
645 /// \r
646 UINT16 BootHandlerSegment;\r
647 \r
648 ///\r
649 /// Segment:offset address of an ASCIIZ description string describing this device.\r
650 ///\r
651 UINT16 DescStringOffset;\r
652\r
653 ///\r
654 /// Segment:offset address of an ASCIIZ description string describing this device.\r
655 ///\r
656 UINT16 DescStringSegment;\r
657 \r
658 ///\r
659 /// Reserved.\r
660 ///\r
661 UINT32 InitPerReserved;\r
662 \r
663 ///\r
664 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
665 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
666 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
667 ///\r
668 UINT32 AdditionalIrq13Handler;\r
669 \r
670 ///\r
671 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
672 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
673 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
674 /// \r
675 UINT32 AdditionalIrq18Handler;\r
676 \r
677 ///\r
678 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
679 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
680 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
681 /// \r
682 UINT32 AdditionalIrq19Handler;\r
683 \r
684 ///\r
685 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
686 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
687 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
688 /// \r
689 UINT32 AdditionalIrq40Handler;\r
690 UINT8 AssignedDriveNumber;\r
691 UINT32 AdditionalIrq41Handler;\r
692 UINT32 AdditionalIrq46Handler;\r
693 UINT32 IBV1;\r
694 UINT32 IBV2;\r
695} BBS_TABLE;\r
696\r
697///\r
698/// BBS device type values\r
699///@{\r
700#define BBS_FLOPPY 0x01\r
701#define BBS_HARDDISK 0x02\r
702#define BBS_CDROM 0x03\r
703#define BBS_PCMCIA 0x04\r
704#define BBS_USB 0x05\r
705#define BBS_EMBED_NETWORK 0x06\r
706#define BBS_BEV_DEVICE 0x80\r
707#define BBS_UNKNOWN 0xff\r
708///@}\r
709\r
710///\r
711/// BBS boot priority values\r
712///@{\r
713#define BBS_DO_NOT_BOOT_FROM 0xFFFC\r
714#define BBS_LOWEST_PRIORITY 0xFFFD\r
715#define BBS_UNPRIORITIZED_ENTRY 0xFFFE\r
716#define BBS_IGNORE_ENTRY 0xFFFF\r
717///@}\r
718\r
719///\r
720/// SMM_ATTRIBUTES\r
721///\r
722typedef struct {\r
723 ///\r
724 /// Access mechanism used to generate the soft SMI. Defined types are below. The other\r
725 /// values are reserved for future usage.\r
726 ///\r
727 UINT16 Type : 3;\r
728 \r
729 ///\r
730 /// Size of "port" in bits. Defined values are below.\r
731 ///\r
732 UINT16 PortGranularity : 3;\r
733 \r
734 ///\r
735 /// Size of data in bits. Defined values are below.\r
736 ///\r
737 UINT16 DataGranularity : 3;\r
738 \r
739 ///\r
740 /// Reserved for future use.\r
741 ///\r
742 UINT16 Reserved : 7;\r
743} SMM_ATTRIBUTES;\r
744\r
745///\r
746/// SMM_ATTRIBUTES type values\r
747///@{\r
748#define STANDARD_IO 0x00\r
749#define STANDARD_MEMORY 0x01\r
750///@}\r
751\r
752///\r
753/// SMM_ATTRIBUTES port size constants\r
754///@{\r
755#define PORT_SIZE_8 0x00\r
756#define PORT_SIZE_16 0x01\r
757#define PORT_SIZE_32 0x02\r
758#define PORT_SIZE_64 0x03\r
759///@}\r
760\r
761///\r
762/// SMM_ATTRIBUTES data size constants\r
763///@{\r
764#define DATA_SIZE_8 0x00\r
765#define DATA_SIZE_16 0x01\r
766#define DATA_SIZE_32 0x02\r
767#define DATA_SIZE_64 0x03\r
768///@}\r
769\r
770///\r
771/// SMM_FUNCTION & relating constants\r
772///\r
773typedef struct {\r
774 UINT16 Function : 15;\r
775 UINT16 Owner : 1;\r
776} SMM_FUNCTION;\r
777\r
778///\r
779/// SMM_FUNCTION Function constants\r
780///@{\r
781#define INT15_D042 0x0000\r
782#define GET_USB_BOOT_INFO 0x0001\r
783#define DMI_PNP_50_57 0x0002\r
784///@}\r
785\r
786///\r
787/// SMM_FUNCTION Owner constants\r
788///@{\r
789#define STANDARD_OWNER 0x0\r
790#define OEM_OWNER 0x1\r
791///@}\r
792\r
050b79eb 793///\r
794/// This structure assumes both port and data sizes are 1. SmmAttribute must be\r
795/// properly to reflect that assumption.\r
796///\r
87d63447 797typedef struct {\r
798 ///\r
799 /// Describes the access mechanism, SmmPort, and SmmData sizes. Type\r
800 /// SMM_ATTRIBUTES is defined below.\r
801 ///\r
802 SMM_ATTRIBUTES SmmAttributes;\r
803 \r
804 ///\r
805 /// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below.\r
806 ///\r
807 SMM_FUNCTION SmmFunction;\r
808 \r
809 ///\r
810 /// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16 bytes\r
811 ///\r
812 UINT8 SmmPort;\r
813 \r
814 ///\r
815 /// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16 bytes\r
816 ///\r
817 UINT8 SmmData;\r
818} SMM_ENTRY;\r
819\r
820///\r
821/// SMM_TABLE\r
822///\r
823typedef struct {\r
824 UINT16 NumSmmEntries; ///< Number of entries represented by SmmEntry.\r
825 SMM_ENTRY SmmEntry; ///< One entry per function. Type SMM_ENTRY is defined below.\r
826} SMM_TABLE;\r
827\r
828///\r
829/// UDC_ATTRIBUTES\r
830///\r
831typedef struct {\r
832 ///\r
833 /// This bit set indicates that the ServiceAreaData is valid.\r
834 ///\r
835 UINT8 DirectoryServiceValidity : 1;\r
836 \r
837 ///\r
838 /// This bit set indicates to use the Reserve Area Boot Code Address (RACBA) only if\r
839 /// DirectoryServiceValidity is 0.\r
840 ///\r
841 UINT8 RabcaUsedFlag : 1;\r
842 \r
843 ///\r
844 /// This bit set indicates to execute hard disk diagnostics.\r
845 ///\r
846 UINT8 ExecuteHddDiagnosticsFlag : 1;\r
847 \r
848 ///\r
849 /// Reserved for future use. Set to 0.\r
850 ///\r
851 UINT8 Reserved : 5;\r
852} UDC_ATTRIBUTES;\r
853\r
854///\r
855/// UD_TABLE\r
856///\r
857typedef struct {\r
858 ///\r
859 /// This field contains the bit-mapped attributes of the PARTIES information. Type\r
860 /// UDC_ATTRIBUTES is defined below.\r
861 ///\r
862 UDC_ATTRIBUTES Attributes;\r
863 \r
864 ///\r
865 /// This field contains the zero-based device on which the selected\r
866 /// ServiceDataArea is present. It is 0 for master and 1 for the slave device. \r
867 ///\r
868 UINT8 DeviceNumber;\r
869 \r
870 ///\r
871 /// This field contains the zero-based index into the BbsTable for the parent device.\r
872 /// This index allows the user to reference the parent device information such as PCI\r
873 /// bus, device function.\r
874 ///\r
875 UINT8 BbsTableEntryNumberForParentDevice;\r
876 \r
877 ///\r
878 /// This field contains the zero-based index into the BbsTable for the boot entry.\r
879 ///\r
880 UINT8 BbsTableEntryNumberForBoot;\r
881 \r
882 ///\r
883 /// This field contains the zero-based index into the BbsTable for the HDD diagnostics entry.\r
884 ///\r
885 UINT8 BbsTableEntryNumberForHddDiag;\r
886 \r
887 ///\r
888 /// The raw Beer data.\r
889 ///\r
890 UINT8 BeerData[128];\r
891 \r
892 ///\r
893 /// The raw data of selected service area.\r
894 ///\r
895 UINT8 ServiceAreaData[64];\r
896} UD_TABLE;\r
897\r
898#define EFI_TO_LEGACY_MAJOR_VERSION 0x02\r
899#define EFI_TO_LEGACY_MINOR_VERSION 0x00\r
900#define MAX_IDE_CONTROLLER 8\r
901\r
902///\r
903/// EFI_TO_COMPATIBILITY16_BOOT_TABLE\r
904///\r
905typedef struct {\r
906 UINT16 MajorVersion; ///< The EfiCompatibility major version number.\r
907 UINT16 MinorVersion; ///< The EfiCompatibility minor version number.\r
908 UINT32 AcpiTable; ///< Location of the RSDT ACPI table. < 4G range\r
909 UINT32 SmbiosTable; ///< Location of the SMBIOS table in EFI memory. < 4G range\r
910 UINT32 SmbiosTableLength;\r
911 //\r
912 // Legacy SIO state\r
913 //\r
914 DEVICE_PRODUCER_DATA_HEADER SioData; ///< Standard traditional device information.\r
915 UINT16 DevicePathType; ///< The default boot type.\r
916 UINT16 PciIrqMask; ///< Mask of which IRQs have been assigned to PCI.\r
917 UINT32 NumberE820Entries; ///< Number of E820 entries. The number can change from the\r
918 ///< Compatibility16InitializeYourself() function.\r
919 //\r
920 // Controller & Drive Identify[2] per controller information\r
921 //\r
922 HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Hard disk drive information, including raw Identify Drive data.\r
923 UINT32 NumberBbsEntries; ///< Number of entries in the BBS table\r
924 UINT32 BbsTable; ///< Pointer to the BBS table. Type BBS_TABLE is defined below.\r
925 UINT32 SmmTable; ///< Pointer to the SMM table. Type SMM_TABLE is defined below.\r
926 UINT32 OsMemoryAbove1Mb; ///< The amount of usable memory above 1 MB, i.e. E820 type 1 memory. This value can\r
927 ///< differ from the value in EFI_TO_COMPATIBILITY16_INIT_TABLE as more\r
928 ///< memory may have been discovered.\r
929 UINT32 UnconventionalDeviceTable; ///< Information to boot off an unconventional device like a PARTIES partition. Type\r
930 ///< UD_TABLE is defined below.\r
931} EFI_TO_COMPATIBILITY16_BOOT_TABLE;\r
932\r
933///\r
934/// EFI_LEGACY_INSTALL_PCI_HANDLER\r
935///\r
936typedef struct {\r
937 UINT8 PciBus; ///< The PCI bus of the device.\r
938 UINT8 PciDeviceFun; ///< The PCI device in bits 7:3 and function in bits 2:0.\r
939 UINT8 PciSegment; ///< The PCI segment of the device.\r
940 UINT8 PciClass; ///< The PCI class code of the device.\r
941 UINT8 PciSubclass; ///< The PCI subclass code of the device.\r
942 UINT8 PciInterface; ///< The PCI interface code of the device.\r
943 //\r
944 // Primary section\r
945 //\r
946 UINT8 PrimaryIrq; ///< The primary device IRQ.\r
947 UINT8 PrimaryReserved; ///< Reserved.\r
948 UINT16 PrimaryControl; ///< The primary device control I/O base.\r
949 UINT16 PrimaryBase; ///< The primary device I/O base.\r
950 UINT16 PrimaryBusMaster; ///< The primary device bus master I/O base.\r
951 //\r
952 // Secondary Section\r
953 //\r
954 UINT8 SecondaryIrq; ///< The secondary device IRQ.\r
955 UINT8 SecondaryReserved; ///< Reserved.\r
956 UINT16 SecondaryControl; ///< The secondary device control I/O base.\r
957 UINT16 SecondaryBase; ///< The secondary device I/O base.\r
958 UINT16 SecondaryBusMaster; ///< The secondary device bus master I/O base.\r
959} EFI_LEGACY_INSTALL_PCI_HANDLER;\r
960\r
961//\r
962// Restore default pack value\r
963//\r
964#pragma pack()\r
b80fbe85 965\r
79964ac8 966#define EFI_LEGACY_BIOS_PROTOCOL_GUID \\r
967 { \\r
968 0xdb9a1e3d, 0x45cb, 0x4abb, {0x85, 0x3b, 0xe5, 0x38, 0x7f, 0xdb, 0x2e, 0x2d } \\r
969 }\r
970\r
971typedef struct _EFI_LEGACY_BIOS_PROTOCOL EFI_LEGACY_BIOS_PROTOCOL;\r
972\r
050b79eb 973///\r
974/// Flags returned by CheckPciRom()\r
975///\r
9226e4ee 976#define NO_ROM 0x00\r
977#define ROM_FOUND 0x01\r
978#define VALID_LEGACY_ROM 0x02\r
a543bca5 979#define ROM_WITH_CONFIG 0x04 ///< Not defined in the Framework CSM Specification\r
9226e4ee 980\r
050b79eb 981///\r
982/// The following macros do not appear in the Framework CSM Specification and \r
983/// are kept for backward compatibility only. They convert 32-bit address (_Adr) \r
984/// to Segment:Offset 16-bit form.\r
985///\r
ce9b1e3a 986///@{\r
79964ac8 987#define EFI_SEGMENT(_Adr) (UINT16) ((UINT16) (((UINTN) (_Adr)) >> 4) & 0xf000)\r
988#define EFI_OFFSET(_Adr) (UINT16) (((UINT16) ((UINTN) (_Adr))) & 0xffff)\r
ce9b1e3a 989///@}\r
79964ac8 990\r
991#define CARRY_FLAG 0x01\r
992\r
050b79eb 993///\r
994/// EFI_EFLAGS_REG\r
995///\r
79964ac8 996typedef struct {\r
997 UINT32 CF:1;\r
998 UINT32 Reserved1:1;\r
999 UINT32 PF:1;\r
1000 UINT32 Reserved2:1;\r
1001 UINT32 AF:1;\r
1002 UINT32 Reserved3:1;\r
1003 UINT32 ZF:1;\r
1004 UINT32 SF:1;\r
1005 UINT32 TF:1;\r
1006 UINT32 IF:1;\r
1007 UINT32 DF:1;\r
1008 UINT32 OF:1;\r
1009 UINT32 IOPL:2;\r
1010 UINT32 NT:1;\r
1011 UINT32 Reserved4:2;\r
1012 UINT32 VM:1;\r
1013 UINT32 Reserved5:14;\r
1014} EFI_EFLAGS_REG;\r
1015\r
050b79eb 1016///\r
1017/// EFI_DWORD_REGS\r
1018///\r
79964ac8 1019typedef struct {\r
1020 UINT32 EAX;\r
1021 UINT32 EBX;\r
1022 UINT32 ECX;\r
1023 UINT32 EDX;\r
1024 UINT32 ESI;\r
1025 UINT32 EDI;\r
1026 EFI_EFLAGS_REG EFlags;\r
1027 UINT16 ES;\r
1028 UINT16 CS;\r
1029 UINT16 SS;\r
1030 UINT16 DS;\r
1031 UINT16 FS;\r
1032 UINT16 GS;\r
1033 UINT32 EBP;\r
1034 UINT32 ESP;\r
1035} EFI_DWORD_REGS;\r
1036\r
050b79eb 1037///\r
1038/// EFI_FLAGS_REG\r
1039///\r
79964ac8 1040typedef struct {\r
1041 UINT16 CF:1;\r
1042 UINT16 Reserved1:1;\r
1043 UINT16 PF:1;\r
1044 UINT16 Reserved2:1;\r
1045 UINT16 AF:1;\r
1046 UINT16 Reserved3:1;\r
1047 UINT16 ZF:1;\r
1048 UINT16 SF:1;\r
1049 UINT16 TF:1;\r
1050 UINT16 IF:1;\r
1051 UINT16 DF:1;\r
1052 UINT16 OF:1;\r
1053 UINT16 IOPL:2;\r
1054 UINT16 NT:1;\r
1055 UINT16 Reserved4:1;\r
1056} EFI_FLAGS_REG;\r
1057\r
050b79eb 1058///\r
1059/// EFI_WORD_REGS\r
1060///\r
79964ac8 1061typedef struct {\r
1062 UINT16 AX;\r
1063 UINT16 ReservedAX;\r
1064 UINT16 BX;\r
1065 UINT16 ReservedBX;\r
1066 UINT16 CX;\r
1067 UINT16 ReservedCX;\r
1068 UINT16 DX;\r
1069 UINT16 ReservedDX;\r
1070 UINT16 SI;\r
1071 UINT16 ReservedSI;\r
1072 UINT16 DI;\r
1073 UINT16 ReservedDI;\r
1074 EFI_FLAGS_REG Flags;\r
1075 UINT16 ReservedFlags;\r
1076 UINT16 ES;\r
1077 UINT16 CS;\r
1078 UINT16 SS;\r
1079 UINT16 DS;\r
1080 UINT16 FS;\r
1081 UINT16 GS;\r
1082 UINT16 BP;\r
1083 UINT16 ReservedBP;\r
1084 UINT16 SP;\r
1085 UINT16 ReservedSP;\r
1086} EFI_WORD_REGS;\r
1087\r
050b79eb 1088///\r
1089/// EFI_BYTE_REGS\r
1090///\r
79964ac8 1091typedef struct {\r
1092 UINT8 AL, AH;\r
1093 UINT16 ReservedAX;\r
1094 UINT8 BL, BH;\r
1095 UINT16 ReservedBX;\r
1096 UINT8 CL, CH;\r
1097 UINT16 ReservedCX;\r
1098 UINT8 DL, DH;\r
1099 UINT16 ReservedDX;\r
1100} EFI_BYTE_REGS;\r
1101\r
050b79eb 1102///\r
1103/// EFI_IA32_REGISTER_SET\r
1104///\r
79964ac8 1105typedef union {\r
1106 EFI_DWORD_REGS E;\r
1107 EFI_WORD_REGS X;\r
1108 EFI_BYTE_REGS H;\r
1109} EFI_IA32_REGISTER_SET;\r
1110\r
1111/**\r
1112 Thunk to 16-bit real mode and execute a software interrupt with a vector\r
1113 of BiosInt. Regs will contain the 16-bit register context on entry and\r
1114 exit.\r
1115\r
050b79eb 1116 @param[in] This Protocol instance pointer.\r
1117 @param[in] BiosInt Processor interrupt vector to invoke\r
1118 @param[in,out] Reg Register contexted passed into (and returned) from thunk to\r
1119 16-bit mode\r
79964ac8 1120\r
5259c97d 1121 @retval TRUE Thunk completed with no BIOS errors in the target code. See Regs for status. \r
1122 @retval FALSE There was a BIOS error in the target code.\r
79964ac8 1123**/\r
1124typedef\r
1125BOOLEAN\r
69686d56 1126(EFIAPI *EFI_LEGACY_BIOS_INT86)(\r
050b79eb 1127 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1128 IN UINT8 BiosInt,\r
1129 IN OUT EFI_IA32_REGISTER_SET *Regs\r
79964ac8 1130 );\r
1131\r
1132/**\r
1133 Thunk to 16-bit real mode and call Segment:Offset. Regs will contain the\r
1134 16-bit register context on entry and exit. Arguments can be passed on\r
1135 the Stack argument\r
1136\r
050b79eb 1137 @param[in] This Protocol instance pointer.\r
1138 @param[in] Segment Segemnt of 16-bit mode call\r
1139 @param[in] Offset Offset of 16-bit mdoe call\r
1140 @param[in] Reg Register contexted passed into (and returned) from thunk to\r
1141 16-bit mode\r
1142 @param[in] Stack Caller allocated stack used to pass arguments\r
1143 @param[in] StackSize Size of Stack in bytes\r
79964ac8 1144\r
5259c97d 1145 @retval FALSE Thunk completed with no BIOS errors in the target code. See Regs for status. @retval TRUE There was a BIOS error in the target code.\r
79964ac8 1146**/\r
1147typedef\r
1148BOOLEAN\r
69686d56 1149(EFIAPI *EFI_LEGACY_BIOS_FARCALL86)(\r
050b79eb 1150 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1151 IN UINT16 Segment,\r
1152 IN UINT16 Offset,\r
1153 IN EFI_IA32_REGISTER_SET *Regs,\r
1154 IN VOID *Stack,\r
1155 IN UINTN StackSize\r
79964ac8 1156 );\r
1157\r
1158/**\r
1159 Test to see if a legacy PCI ROM exists for this device. Optionally return\r
1160 the Legacy ROM instance for this PCI device.\r
1161\r
050b79eb 1162 @param[in] This Protocol instance pointer.\r
1163 @param[in] PciHandle The PCI PC-AT OPROM from this devices ROM BAR will be loaded\r
1164 @param[out] RomImage Return the legacy PCI ROM for this device\r
1165 @param[out] RomSize Size of ROM Image\r
1166 @param[out] Flags Indicates if ROM found and if PC-AT. Multiple bits can be set as follows:\r
1167 - 00 = No ROM\r
1168 - 01 = ROM Found\r
1169 - 02 = ROM is a valid legacy ROM\r
79964ac8 1170\r
050b79eb 1171 @retval EFI_SUCCESS Legacy Option ROM availible for this device\r
1172 @retval EFI_UNSUPPORTED Legacy Option ROM not supported.\r
79964ac8 1173\r
1174**/\r
1175typedef\r
1176EFI_STATUS\r
69686d56 1177(EFIAPI *EFI_LEGACY_BIOS_CHECK_ROM)(\r
050b79eb 1178 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1179 IN EFI_HANDLE PciHandle,\r
1180 OUT VOID **RomImage, OPTIONAL\r
1181 OUT UINTN *RomSize, OPTIONAL\r
1182 OUT UINTN *Flags\r
79964ac8 1183 );\r
1184\r
1185/**\r
1186 Load a legacy PC-AT OPROM on the PciHandle device. Return information\r
1187 about how many disks were added by the OPROM and the shadow address and\r
1188 size. DiskStart & DiskEnd are INT 13h drive letters. Thus 0x80 is C:\r
1189\r
050b79eb 1190 @param[in] This Protocol instance pointer.\r
1191 @param[in] PciHandle The PCI PC-AT OPROM from this devices ROM BAR will be loaded.\r
1192 This value is NULL if RomImage is non-NULL. This is the normal\r
1193 case.\r
1194 @param[in] RomImage A PCI PC-AT ROM image. This argument is non-NULL if there is\r
1195 no hardware associated with the ROM and thus no PciHandle,\r
1196 otherwise is must be NULL.\r
1197 Example is PXE base code.\r
1198 @param[out] Flags The type of ROM discovered. Multiple bits can be set, as follows:\r
1199 - 00 = No ROM.\r
1200 - 01 = ROM found.\r
1201 - 02 = ROM is a valid legacy ROM.\r
1202 @param[out] DiskStart Disk number of first device hooked by the ROM. If DiskStart\r
1203 is the same as DiskEnd no disked were hooked.\r
1204 @param[out] DiskEnd disk number of the last device hooked by the ROM.\r
1205 @param[out] RomShadowAddress Shadow address of PC-AT ROM\r
1206 @param[out] RomShadowSize Size of RomShadowAddress in bytes\r
1207\r
1208 @retval EFI_SUCCESS Thunk completed, see Regs for status.\r
1209 @retval EFI_INVALID_PARAMETER PciHandle not found\r
79964ac8 1210\r
1211**/\r
1212typedef\r
1213EFI_STATUS\r
69686d56 1214(EFIAPI *EFI_LEGACY_BIOS_INSTALL_ROM)(\r
050b79eb 1215 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1216 IN EFI_HANDLE PciHandle,\r
1217 IN VOID **RomImage,\r
1218 OUT UINTN *Flags,\r
1219 OUT UINT8 *DiskStart, OPTIONAL\r
1220 OUT UINT8 *DiskEnd, OPTIONAL\r
1221 OUT VOID **RomShadowAddress, OPTIONAL\r
1222 OUT UINT32 *ShadowedRomSize OPTIONAL\r
79964ac8 1223 );\r
1224\r
1225/**\r
ef1ac015 1226 This function attempts to traditionally boot the specified BootOption. If the EFI context has\r
5259c97d 1227 been compromised, this function will not return. This procedure is not used for loading an EFI-aware\r
ef1ac015 1228 OS off a traditional device. The following actions occur:\r
1229 - Get EFI SMBIOS data structures, convert them to a traditional format, and copy to\r
1230 Compatibility16.\r
1231 - Get a pointer to ACPI data structures and copy the Compatibility16 RSD PTR to F0000 block.\r
1232 - Find the traditional SMI handler from a firmware volume and register the traditional SMI\r
1233 handler with the EFI SMI handler.\r
1234 - Build onboard IDE information and pass this information to the Compatibility16 code.\r
1235 - Make sure all PCI Interrupt Line registers are programmed to match 8259.\r
1236 - Reconfigure SIO devices from EFI mode (polled) into traditional mode (interrupt driven).\r
1237 - Shadow all PCI ROMs.\r
1238 - Set up BDA and EBDA standard areas before the legacy boot.\r
1239 - Construct the Compatibility16 boot memory map and pass it to the Compatibility16 code.\r
1240 - Invoke the Compatibility16 table function Compatibility16PrepareToBoot(). This\r
1241 invocation causes a thunk into the Compatibility16 code, which sets all appropriate internal\r
1242 data structures. The boot device list is a parameter.\r
1243 - Invoke the Compatibility16 Table function Compatibility16Boot(). This invocation\r
1244 causes a thunk into the Compatibility16 code, which does an INT19.\r
1245 - If the Compatibility16Boot() function returns, then the boot failed in a graceful\r
5259c97d 1246 manner--meaning that the EFI code is still valid. An ungraceful boot failure causes a reset because the state\r
ef1ac015 1247 of EFI code is unknown.\r
79964ac8 1248\r
050b79eb 1249 @param[in] This Protocol instance pointer.\r
1250 @param[in] BootOption EFI Device Path from BootXXXX variable.\r
1251 @param[in] LoadOptionSize Size of LoadOption in size.\r
1252 @param[in] LoadOption LoadOption from BootXXXX variable\r
79964ac8 1253\r
5259c97d 1254 @retval EFI_DEVICE_ERROR Failed to boot from any boot device and memory is uncorrupted. Note: This function normally does not returns. It will either boot the OS or reset the system if memory has been "corrupted" by loading a boot sector and passing control to it.\r
79964ac8 1255**/\r
1256typedef\r
1257EFI_STATUS\r
69686d56 1258(EFIAPI *EFI_LEGACY_BIOS_BOOT)(\r
050b79eb 1259 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1260 IN BBS_BBS_DEVICE_PATH *BootOption,\r
1261 IN UINT32 LoadOptionsSize,\r
1262 IN VOID *LoadOptions\r
79964ac8 1263 );\r
1264\r
1265/**\r
ef1ac015 1266 This function takes the Leds input parameter and sets/resets the BDA accordingly. \r
1267 Leds is also passed to Compatibility16 code, in case any special processing is required. \r
5259c97d 1268 This function is normally called from EFI Setup drivers that handle user-selectable\r
ef1ac015 1269 keyboard options such as boot with NUM LOCK on/off. This function does not\r
1270 touch the keyboard or keyboard LEDs but only the BDA.\r
79964ac8 1271\r
050b79eb 1272 @param[in] This Protocol instance pointer.\r
1273 @param[in] Leds Status of current Scroll, Num & Cap lock LEDS\r
1274 - Bit 0 is Scroll Lock 0 = Not locked\r
1275 - Bit 1 is Num Lock\r
1276 - Bit 2 is Caps Lock\r
79964ac8 1277\r
050b79eb 1278 @retval EFI_SUCCESS The BDA was updated successfully.\r
79964ac8 1279\r
1280**/\r
1281typedef\r
1282EFI_STATUS\r
69686d56 1283(EFIAPI *EFI_LEGACY_BIOS_UPDATE_KEYBOARD_LED_STATUS)(\r
050b79eb 1284 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1285 IN UINT8 Leds\r
79964ac8 1286 );\r
1287\r
1288/**\r
1289 Retrieve legacy BBS info and assign boot priority.\r
1290\r
050b79eb 1291 @param[in] This Protocol instance pointer.\r
1292 @param[out] HddCount Number of HDD_INFO structures\r
1293 @param[out] HddInfo Onboard IDE controller information\r
1294 @param[out] BbsCount Number of BBS_TABLE structures\r
1295 @param[in,out] BbsTable Point to List of BBS_TABLE\r
79964ac8 1296\r
050b79eb 1297 @retval EFI_SUCCESS Tables returned\r
79964ac8 1298\r
1299**/\r
1300typedef\r
1301EFI_STATUS\r
69686d56 1302(EFIAPI *EFI_LEGACY_BIOS_GET_BBS_INFO)(\r
050b79eb 1303 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1304 OUT UINT16 *HddCount,\r
1305 OUT HDD_INFO **HddInfo,\r
1306 OUT UINT16 *BbsCount,\r
1307 IN OUT BBS_TABLE **BbsTable\r
79964ac8 1308 );\r
1309\r
1310/**\r
1311 Assign drive number to legacy HDD drives prior to booting an EFI\r
1312 aware OS so the OS can access drives without an EFI driver.\r
1313\r
050b79eb 1314 @param[in] This Protocol instance pointer.\r
1315 @param[out] BbsCount Number of BBS_TABLE structures\r
1316 @param[out] BbsTable List BBS entries\r
79964ac8 1317\r
050b79eb 1318 @retval EFI_SUCCESS Drive numbers assigned\r
79964ac8 1319\r
1320**/\r
1321typedef\r
1322EFI_STATUS\r
69686d56 1323(EFIAPI *EFI_LEGACY_BIOS_PREPARE_TO_BOOT_EFI)(\r
050b79eb 1324 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1325 OUT UINT16 *BbsCount,\r
1326 OUT BBS_TABLE **BbsTable\r
79964ac8 1327 );\r
1328\r
1329/**\r
1330 To boot from an unconventional device like parties and/or execute\r
1331 HDD diagnostics.\r
1332\r
050b79eb 1333 @param[in] This Protocol instance pointer.\r
1334 @param[in] Attributes How to interpret the other input parameters\r
1335 @param[in] BbsEntry The 0-based index into the BbsTable for the parent\r
79964ac8 1336 device.\r
050b79eb 1337 @param[in] BeerData Pointer to the 128 bytes of ram BEER data.\r
1338 @param[in] ServiceAreaData Pointer to the 64 bytes of raw Service Area data. The\r
79964ac8 1339 caller must provide a pointer to the specific Service\r
1340 Area and not the start all Service Areas.\r
1341\r
050b79eb 1342 @retval EFI_INVALID_PARAMETER If error. Does NOT return if no error.\r
79964ac8 1343\r
1344**/\r
1345typedef\r
1346EFI_STATUS\r
69686d56 1347(EFIAPI *EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE)(\r
050b79eb 1348 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1349 IN UDC_ATTRIBUTES Attributes,\r
1350 IN UINTN BbsEntry,\r
1351 IN VOID *BeerData,\r
1352 IN VOID *ServiceAreaData\r
79964ac8 1353 );\r
1354\r
1355/**\r
1356 Shadow all legacy16 OPROMs that haven't been shadowed.\r
1357 Warning: Use this with caution. This routine disconnects all EFI\r
1358 drivers. If used externally then caller must re-connect EFI\r
1359 drivers.\r
050b79eb 1360 \r
1361 @param[in] This Protocol instance pointer.\r
1362 \r
1363 @retval EFI_SUCCESS OPROMs shadowed\r
79964ac8 1364\r
1365**/\r
1366typedef\r
1367EFI_STATUS\r
69686d56 1368(EFIAPI *EFI_LEGACY_BIOS_SHADOW_ALL_LEGACY_OPROMS)(\r
050b79eb 1369 IN EFI_LEGACY_BIOS_PROTOCOL *This\r
79964ac8 1370 );\r
1371\r
1372/**\r
1373 Get a region from the LegacyBios for S3 usage.\r
1374\r
050b79eb 1375 @param[in] This Protocol instance pointer.\r
1376 @param[in] LegacyMemorySize Size of required region\r
1377 @param[in] Region Region to use.\r
1378 00 = Either 0xE0000 or 0xF0000 block\r
1379 - Bit0 = 1 0xF0000 block\r
1380 - Bit1 = 1 0xE0000 block\r
1381 @param[in] Alignment Address alignment. Bit mapped. First non-zero\r
1382 bit from right is alignment.\r
1383 @param[out] LegacyMemoryAddress Region Assigned\r
79964ac8 1384\r
1385 @retval EFI_SUCCESS Region assigned\r
ef1ac015 1386 @retval EFI_ACCESS_DENIED The function was previously invoked.\r
79964ac8 1387 @retval Other Region not assigned\r
1388\r
1389**/\r
1390typedef\r
1391EFI_STATUS\r
69686d56 1392(EFIAPI *EFI_LEGACY_BIOS_GET_LEGACY_REGION)(\r
050b79eb 1393 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1394 IN UINTN LegacyMemorySize,\r
1395 IN UINTN Region,\r
1396 IN UINTN Alignment,\r
1397 OUT VOID **LegacyMemoryAddress\r
79964ac8 1398 );\r
1399\r
1400/**\r
1401 Get a region from the LegacyBios for Tiano usage. Can only be invoked once.\r
1402\r
050b79eb 1403 @param[in] This Protocol instance pointer.\r
1404 @param[in] LegacyMemorySize Size of data to copy\r
1405 @param[in] LegacyMemoryAddress Legacy Region destination address\r
1406 Note: must be in region assigned by\r
1407 LegacyBiosGetLegacyRegion\r
1408 @param[in] LegacyMemorySourceAddress Source of the data to copy.\r
79964ac8 1409\r
1410 @retval EFI_SUCCESS Region assigned\r
1411 @retval EFI_ACCESS_DENIED Destination outside assigned region\r
1412\r
1413**/\r
1414typedef\r
1415EFI_STATUS\r
69686d56 1416(EFIAPI *EFI_LEGACY_BIOS_COPY_LEGACY_REGION)(\r
050b79eb 1417 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1418 IN UINTN LegacyMemorySize,\r
1419 IN VOID *LegacyMemoryAddress,\r
1420 IN VOID *LegacyMemorySourceAddress\r
79964ac8 1421 );\r
1422\r
050b79eb 1423///\r
1424/// Abstracts the traditional BIOS from the rest of EFI. The LegacyBoot()\r
1425/// member function allows the BDS to support booting a traditional OS.\r
1426/// EFI thunks drivers that make EFI bindings for BIOS INT services use\r
1427/// all the other member functions.\r
1428///\r
79964ac8 1429struct _EFI_LEGACY_BIOS_PROTOCOL {\r
2bbaeb0d 1430 ///\r
1431 /// Performs traditional software INT. See the Int86() function description.\r
1432 ///\r
79964ac8 1433 EFI_LEGACY_BIOS_INT86 Int86;\r
2bbaeb0d 1434 \r
1435 ///\r
1436 /// Performs a far call into Compatibility16 or traditional OpROM code.\r
1437 ///\r
79964ac8 1438 EFI_LEGACY_BIOS_FARCALL86 FarCall86;\r
2bbaeb0d 1439 \r
1440 ///\r
1441 /// Checks if a traditional OpROM exists for this device.\r
1442 ///\r
79964ac8 1443 EFI_LEGACY_BIOS_CHECK_ROM CheckPciRom;\r
2bbaeb0d 1444 \r
1445 ///\r
1446 /// Loads a traditional OpROM in traditional OpROM address space.\r
1447 ///\r
79964ac8 1448 EFI_LEGACY_BIOS_INSTALL_ROM InstallPciRom;\r
2bbaeb0d 1449 \r
1450 ///\r
1451 /// Boots a traditional OS.\r
1452 ///\r
79964ac8 1453 EFI_LEGACY_BIOS_BOOT LegacyBoot;\r
2bbaeb0d 1454 \r
1455 ///\r
1456 /// Updates BDA to reflect the current EFI keyboard LED status.\r
1457 ///\r
79964ac8 1458 EFI_LEGACY_BIOS_UPDATE_KEYBOARD_LED_STATUS UpdateKeyboardLedStatus;\r
2bbaeb0d 1459 \r
1460 ///\r
1461 /// Allows an external agent, such as BIOS Setup, to get the BBS data.\r
1462 ///\r
79964ac8 1463 EFI_LEGACY_BIOS_GET_BBS_INFO GetBbsInfo;\r
2bbaeb0d 1464 \r
1465 ///\r
1466 /// Causes all legacy OpROMs to be shadowed.\r
1467 ///\r
79964ac8 1468 EFI_LEGACY_BIOS_SHADOW_ALL_LEGACY_OPROMS ShadowAllLegacyOproms;\r
2bbaeb0d 1469 \r
1470 ///\r
1471 /// Performs all actions prior to boot. Used when booting an EFI-aware OS\r
1472 /// rather than a legacy OS. \r
1473 ///\r
79964ac8 1474 EFI_LEGACY_BIOS_PREPARE_TO_BOOT_EFI PrepareToBootEfi;\r
2bbaeb0d 1475 \r
1476 ///\r
1477 /// Allows EFI to reserve an area in the 0xE0000 or 0xF0000 block.\r
1478 ///\r
79964ac8 1479 EFI_LEGACY_BIOS_GET_LEGACY_REGION GetLegacyRegion;\r
2bbaeb0d 1480 \r
1481 ///\r
1482 /// Allows EFI to copy data to the area specified by GetLegacyRegion.\r
1483 ///\r
79964ac8 1484 EFI_LEGACY_BIOS_COPY_LEGACY_REGION CopyLegacyRegion;\r
2bbaeb0d 1485 \r
1486 ///\r
1487 /// Allows the user to boot off an unconventional device such as a PARTIES partition.\r
1488 ///\r
79964ac8 1489 EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE BootUnconventionalDevice;\r
1490};\r
1491\r
1492extern EFI_GUID gEfiLegacyBiosProtocolGuid;\r
1493\r
1494#endif\r