]> git.proxmox.com Git - mirror_edk2.git/blame - IntelFrameworkPkg/Include/Protocol/PciPlatform.h
Add the following PI 1.2 Protocols to the MdePkg
[mirror_edk2.git] / IntelFrameworkPkg / Include / Protocol / PciPlatform.h
CommitLineData
79964ac8 1/** @file\r
8411f1c0 2 This file declares PlatfromOpRom protocols which provides the interface between \r
3 the PCI bus driver/PCI Host Bridge Resource Allocation driver and a platform-specific \r
4 driver to describe the unique features of a platform. This\r
5 protocol is optional.\r
6 \r
7698f336 7 Copyright (c) 2007 - 2009, Intel Corporation\r
79964ac8 8 All rights reserved. This program and the accompanying materials\r
9 are licensed and made available under the terms and conditions of the BSD License\r
10 which accompanies this distribution. The full text of the license may be found at\r
11 http://opensource.org/licenses/bsd-license.php\r
12\r
13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
15\r
79964ac8 16 @par Revision Reference:\r
17 This protocol is defined in PCI Platform Support Specification\r
18 Version 0.9\r
19\r
20**/\r
21\r
22#ifndef _PCI_PLATFORM_H_\r
23#define _PCI_PLATFORM_H_\r
24\r
b80fbe85 25#include <Protocol/PciHostBridgeResourceAllocation.h>\r
26\r
79964ac8 27//\r
28// Protocol for GUID.\r
29//\r
30\r
31#define EFI_PCI_PLATFORM_PROTOCOL_GUID \\r
32{ 0x7d75280, 0x27d4, 0x4d69, {0x90, 0xd0, 0x56, 0x43, 0xe2, 0x38, 0xb3, 0x41} }\r
33\r
34typedef struct _EFI_PCI_PLATFORM_PROTOCOL EFI_PCI_PLATFORM_PROTOCOL;\r
35\r
36typedef UINT32 EFI_PCI_PLATFORM_POLICY;\r
37\r
7698f336 38//\r
39// There are 4 legal combinations of following bit values:\r
40// EFI_RESERVE_NONE_IO_ALIAS,\r
41// EFI_RESERVE_ISA_IO_ALIAS | EFI_RESERVE_VGA_IO_ALIAS,\r
42// EFI_RESERVE_ISA_IO_NO_ALIAS | EFI_RESERVE_VGA_IO_ALIAS,\r
43// EFI_RESERVE_ISA_IO_NO_ALIAS | EFI_RESERVE_VGA_IO_NO_ALIAS\r
44//\r
79964ac8 45#define EFI_RESERVE_NONE_IO_ALIAS 0x0000\r
46#define EFI_RESERVE_ISA_IO_ALIAS 0x0001\r
47#define EFI_RESERVE_ISA_IO_NO_ALIAS 0x0002\r
48#define EFI_RESERVE_VGA_IO_ALIAS 0x0004\r
49#define EFI_RESERVE_VGA_IO_NO_ALIAS 0x0008\r
50\r
7698f336 51///\r
52/// EFI_PCI_CHIPSET_EXECUTION_PHASE is used to call a platform protocol and execute\r
53/// platform-specific code.\r
54///\r
79964ac8 55typedef enum {\r
7698f336 56 ///\r
57 /// The phase that indicates the entry point to the PCI Bus Notify phase. This\r
58 /// platform hook is called before the PCI bus driver calls the\r
59 /// EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL driver.\r
60 ///\r
79964ac8 61 ChipsetEntry,\r
7698f336 62 ///\r
63 /// The phase that indicates the exit point to the Chipset Notify phase before\r
64 /// returning to the PCI Bus Driver Notify phase. This platform hook is called after\r
65 /// the PCI bus driver calls the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
66 /// driver.\r
67 ///\r
79964ac8 68 ChipsetExit,\r
69 MaximumChipsetPhase\r
70} EFI_PCI_CHIPSET_EXECUTION_PHASE;\r
71\r
72\r
73/**\r
7698f336 74 The notification from the PCI bus enumerator to the platform that it is\r
75 about to enter a certain phase during the enumeration process.\r
76\r
79964ac8 77 The PlatformNotify() function can be used to notify the platform driver so that\r
78 it can perform platform-specific actions. No specific actions are required.\r
79 Eight notification points are defined at this time. More synchronization points\r
80 may be added as required in the future. The PCI bus driver calls the platform driver\r
81 twice for every Phase-once before the PCI Host Bridge Resource Allocation Protocol\r
82 driver is notified, and once after the PCI Host Bridge Resource Allocation Protocol\r
83 driver has been notified.\r
84 This member function may not perform any error checking on the input parameters. It\r
85 also does not return any error codes. If this member function detects any error condition,\r
86 it needs to handle those errors on its own because there is no way to surface any\r
87 errors to the caller.\r
88\r
89 @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.\r
90 @param HostBridge The handle of the host bridge controller.\r
91 @param Phase The phase of the PCI bus enumeration.\r
92 @param ChipsetPhase Defines the execution phase of the PCI chipset driver.\r
93\r
94 @retval EFI_SUCCESS The function completed successfully.\r
95\r
96**/\r
97typedef\r
98EFI_STATUS\r
69686d56 99(EFIAPI *EFI_PCI_PLATFORM_PHASE_NOTIFY)(\r
412fb9ef 100 IN EFI_PCI_PLATFORM_PROTOCOL *This,\r
101 IN EFI_HANDLE HostBridge,\r
79964ac8 102 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase,\r
103 IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase\r
ed66e1bc 104);\r
79964ac8 105\r
106\r
107/**\r
7698f336 108 The notification from the PCI bus enumerator to the platform for each PCI\r
109 controller at several predefined points during PCI controller initialization.\r
110\r
79964ac8 111 The PlatformPrepController() function can be used to notify the platform driver so that\r
112 it can perform platform-specific actions. No specific actions are required.\r
113 Several notification points are defined at this time. More synchronization points may be\r
114 added as required in the future. The PCI bus driver calls the platform driver twice for\r
115 every PCI controller-once before the PCI Host Bridge Resource Allocation Protocol driver\r
116 is notified, and once after the PCI Host Bridge Resource Allocation Protocol driver has\r
117 been notified.\r
118 This member function may not perform any error checking on the input parameters. It also\r
119 does not return any error codes. If this member function detects any error condition, it\r
120 needs to handle those errors on its own because there is no way to surface any errors to\r
121 the caller.\r
122\r
123 @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.\r
124 @param HostBridge The associated PCI host bridge handle.\r
125 @param RootBridge The associated PCI root bridge handle.\r
126 @param PciAddress The address of the PCI device on the PCI bus.\r
127 @param Phase The phase of the PCI controller enumeration.\r
128 @param ChipsetPhase Defines the execution phase of the PCI chipset driver.\r
129\r
130 @retval EFI_SUCCESS The function completed successfully.\r
131\r
132**/\r
133typedef\r
134EFI_STATUS\r
69686d56 135(EFIAPI *EFI_PCI_PLATFORM_PREPROCESS_CONTROLLER)(\r
79964ac8 136 IN EFI_PCI_PLATFORM_PROTOCOL *This,\r
137 IN EFI_HANDLE HostBridge,\r
138 IN EFI_HANDLE RootBridge,\r
139 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,\r
140 IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase,\r
141 IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase\r
ed66e1bc 142);\r
79964ac8 143\r
144\r
145/**\r
7698f336 146 Retrieves the platform policy regarding enumeration.\r
147\r
79964ac8 148 The GetPlatformPolicy() function retrieves the platform policy regarding PCI\r
149 enumeration. The PCI bus driver and the PCI Host Bridge Resource Allocation Protocol\r
150 driver can call this member function to retrieve the policy.\r
151\r
152 @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.\r
153 @param PciPolicy The platform policy with respect to VGA and ISA aliasing.\r
154\r
155 @retval EFI_SUCCESS The function completed successfully.\r
156 @retval EFI_INVALID_PARAMETER PciPolicy is NULL.\r
157\r
158**/\r
159typedef\r
160EFI_STATUS\r
69686d56 161(EFIAPI *EFI_PCI_PLATFORM_GET_PLATFORM_POLICY)(\r
79964ac8 162 IN EFI_PCI_PLATFORM_PROTOCOL *This,\r
163 OUT EFI_PCI_PLATFORM_POLICY *PciPolicy\r
ed66e1bc 164);\r
79964ac8 165\r
166\r
167/**\r
7698f336 168 Gets the PCI device's option ROM from a platform-specific location.\r
169\r
79964ac8 170 The GetPciRom() function gets the PCI device's option ROM from a platform-specific location.\r
171 The option ROM will be loaded into memory. This member function is used to return an image\r
172 that is packaged as a PCI 2.2 option ROM. The image may contain both legacy and EFI option\r
8a7d75b0 173 ROMs. See the UEFI 2.0 Specification for details. This member function can be used to return\r
79964ac8 174 option ROM images for embedded controllers. Option ROMs for embedded controllers are typically\r
175 stored in platform-specific storage, and this member function can retrieve it from that storage\r
176 and return it to the PCI bus driver. The PCI bus driver will call this member function before\r
177 scanning the ROM that is attached to any controller, which allows a platform to specify a ROM\r
178 image that is different from the ROM image on a PCI card.\r
179\r
180 @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.\r
181 @param PciHandle The handle of the PCI device.\r
182 @param RomImage If the call succeeds, the pointer to the pointer to the option ROM image.\r
183 Otherwise, this field is undefined. The memory for RomImage is allocated\r
184 by EFI_PCI_PLATFORM_PROTOCOL.GetPciRom() using the EFI Boot Service AllocatePool().\r
185 It is the caller's responsibility to free the memory using the EFI Boot Service\r
186 FreePool(), when the caller is done with the option ROM.\r
187 @param RomSize If the call succeeds, a pointer to the size of the option ROM size. Otherwise,\r
188 this field is undefined.\r
189\r
190 @retval EFI_SUCCESS The option ROM was available for this device and loaded into memory.\r
191 @retval EFI_NOT_FOUND No option ROM was available for this device.\r
192 @retval EFI_OUT_OF_RESOURCES No memory was available to load the option ROM.\r
193 @retval EFI_DEVICE_ERROR An error occurred in getting the option ROM.\r
194\r
195**/\r
196typedef\r
197EFI_STATUS\r
69686d56 198(EFIAPI *EFI_PCI_PLATFORM_GET_PCI_ROM)(\r
79964ac8 199 IN EFI_PCI_PLATFORM_PROTOCOL *This,\r
200 IN EFI_HANDLE PciHandle,\r
201 OUT VOID **RomImage,\r
202 OUT UINTN *RomSize\r
ed66e1bc 203);\r
79964ac8 204\r
7698f336 205///\r
206/// This protocol provides the interface between the PCI bus driver/PCI Host\r
207/// Bridge Resource Allocation driver and a platform-specific driver to describe\r
208/// the unique features of a platform.\r
209///\r
79964ac8 210struct _EFI_PCI_PLATFORM_PROTOCOL {\r
412fb9ef 211 ///\r
212 /// The notification from the PCI bus enumerator to the platform that it is about to \r
213 /// enter a certain phase during the enumeration process.\r
214 ///\r
7698f336 215 EFI_PCI_PLATFORM_PHASE_NOTIFY PlatformNotify;\r
412fb9ef 216 ///\r
217 /// The notification from the PCI bus enumerator to the platform for each PCI \r
218 /// controller at several predefined points during PCI controller initialization.\r
219 /// \r
79964ac8 220 EFI_PCI_PLATFORM_PREPROCESS_CONTROLLER PlatformPrepController;\r
412fb9ef 221 /// \r
222 /// Retrieves the platform policy regarding enumeration.\r
223 ///\r
79964ac8 224 EFI_PCI_PLATFORM_GET_PLATFORM_POLICY GetPlatformPolicy;\r
412fb9ef 225 ///\r
226