IntelFrameworkPkg: Clean up source files

[mirror_edk2.git] / IntelFrameworkPkg / Include / Protocol / SmmControl.h

/** @file\r
  This file declares the SMM Control abstraction protocol.\r
  This protocol is used to initiate SMI/PMI activations. This protocol could be published by either:\r
  - A processor driver to abstract the SMI/PMI IPI\r
  - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an\r
  Intel chipset\r
  Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this\r
  event from a platform chipset agent is an optional capability for both IA-32 and Itanium-based\r
  systems.\r
\r
Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials are licensed and made available under\r
the terms and conditions of the BSD License that accompanies this distribution.\r
The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php.\r
\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
  @par Revision Reference:\r
  This Protocol is defined in Framework of EFI SMM Core Interface Spec\r
  Version 0.9.\r
\r
**/\r
\r
#ifndef _SMM_CONTROL_H_\r
#define _SMM_CONTROL_H_\r
\r
\r
typedef struct _EFI_SMM_CONTROL_PROTOCOL              EFI_SMM_CONTROL_PROTOCOL;\r
\r
#define EFI_SMM_CONTROL_PROTOCOL_GUID \\r
  { \\r
    0x8d12e231, 0xc667, 0x4fd1, {0x98, 0xf2, 0x24, 0x49, 0xa7, 0xe7, 0xb2, 0xe5 } \\r
  }\r
//\r
// SMM Access specification Data Structures\r
//\r
typedef struct {\r
  ///\r
  ///  Describes the I/O location of the particular port that engendered the synchronous\r
  ///  SMI. For example, this location can include but is not limited to the traditional\r
  ///  PCAT* APM port of 0B2h.\r
  ///\r
  UINT8 SmiTriggerRegister;\r
  ///\r
  ///  Describes the value that was written to the respective activation port.\r
  ///\r
  UINT8 SmiDataRegister;\r
} EFI_SMM_CONTROL_REGISTER;\r
\r
//\r
// SMM Control specification member function\r
//\r
/**\r
  Invokes SMI activation from either the preboot or runtime environment.\r
\r
  @param  This                  The EFI_SMM_CONTROL_PROTOCOL instance.\r
  @param  ArgumentBuffer        The optional sized data to pass into the protocol activation.\r
  @param  ArgumentBufferSize    The optional size of the data.\r
  @param  Periodic              An optional mechanism to periodically repeat activation.\r
  @param  ActivationInterval    An optional parameter to repeat at this period one\r
                                time or, if the Periodic Boolean is set, periodically.\r
\r
  @retval EFI_SUCCESS           The SMI/PMI has been engendered.\r
  @retval EFI_DEVICE_ERROR      The timing is unsupported.\r
  @retval EFI_INVALID_PARAMETER The activation period is unsupported.\r
  @retval EFI_NOT_STARTED       The SMM base service has not been initialized.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SMM_ACTIVATE)(\r
  IN EFI_SMM_CONTROL_PROTOCOL                             *This,\r
  IN OUT INT8                                             *ArgumentBuffer OPTIONAL,\r
  IN OUT UINTN                                            *ArgumentBufferSize OPTIONAL,\r
  IN BOOLEAN                                              Periodic OPTIONAL,\r
  IN UINTN                                                ActivationInterval OPTIONAL\r
  );\r
\r
/**\r
  Clears any system state that was created in response to the Active call.\r
\r
  @param  This                  The EFI_SMM_CONTROL_PROTOCOL instance.\r
  @param  Periodic              Optional parameter to repeat at this period one\r
                                time or, if the Periodic Boolean is set, periodically.\r
\r
  @retval EFI_SUCCESS           The SMI/PMI has been engendered.\r
  @retval EFI_DEVICE_ERROR      The source could not be cleared.\r
  @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SMM_DEACTIVATE)(\r
  IN EFI_SMM_CONTROL_PROTOCOL                   *This,\r
  IN BOOLEAN                                    Periodic OPTIONAL\r
  );\r
\r
/**\r
  Provides information on the source register used to generate the SMI.\r
\r
  @param  This                  The EFI_SMM_CONTROL_PROTOCOL instance.\r
  @param  SmiRegister           A pointer to the SMI register description structure.\r
\r
  @retval EFI_SUCCESS           The register structure has been returned.\r
  @retval EFI_DEVICE_ERROR      The source could not be cleared.\r
  @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SMM_GET_REGISTER_INFO)(\r
  IN EFI_SMM_CONTROL_PROTOCOL           *This,\r
  IN OUT EFI_SMM_CONTROL_REGISTER       *SmiRegister\r
  );\r
\r
/**\r
  @par Protocol Description:\r
  This protocol is used to initiate SMI/PMI activations.\r
\r
  @param Trigger\r
  Initiates the SMI/PMI activation.\r
\r
  @param Clear\r
  Quiesces the SMI/PMI activation.\r
\r
  @param GetRegisterInfo\r
  Provides data on the register used as the source of the SMI.\r
\r
  @param MinimumTriggerPeriod\r
  Minimum interval at which the platform can set the period.\r
\r
  @retval EFI_SUCCESS The register structure has been returned.\r
**/\r
\r
//\r
// SMM Control Protocol\r
//\r
/**\r
  This protocol is used to initiate SMI/PMI activations.\r
  This protocol could be published by either:\r
    - A processor driver to abstract the SMI/PMI IPI.\r
    - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an Intel chipset.\r
  Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this.\r
\r
  The EFI_SMM_CONTROL_PROTOCOL is used by the platform chipset or processor driver. This\r
  protocol is usable both in boot services and at runtime. The runtime aspect enables an\r
  implementation of EFI_SMM_BASE_PROTOCOL.Communicate() to layer upon this service\r
  and provide an SMI callback from a general EFI runtime driver.\r
  This protocol provides an abstraction to the platform hardware that generates an\r
  SMI or PMI. There are often I/O ports that, when accessed, will engender the SMI or PMI.\r
  Also, this hardware optionally supports the periodic genearation of these signals.\r
\r
**/\r
struct _EFI_SMM_CONTROL_PROTOCOL {\r
  ///\r
  ///  Initiates the SMI/PMI activation.\r
  ///\r
  EFI_SMM_ACTIVATE          Trigger;\r
  ///\r
  ///  Quiesces the SMI/PMI activation.\r
  ///\r
  EFI_SMM_DEACTIVATE        Clear;\r
  ///\r
  /// Provides data on the register used as the source of the SMI.\r
  ///\r
  EFI_SMM_GET_REGISTER_INFO GetRegisterInfo;\r
  ///\r
  /// Minimum interval at which the platform can set the period. A maximum is not\r
  /// specified in that the SMM infrastructure code can emulate a maximum interval that is\r
  /// greater than the hardware capabilities by using software emulation in the SMM\r
  /// infrastructure code.\r
  ///\r
  UINTN                     MinimumTriggerPeriod;\r
};\r
\r
extern EFI_GUID gEfiSmmControlProtocolGuid;\r
\r
#endif\r