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79964ac8 | 1 | /** @file\r |
2 | Internal include file of DXE CPU IO Library.\r | |
c4fa3eac | 3 | It includes all necessary protocol/library class's header file\r |
1c2f052d | 4 | for implementation of IoLib library instance. It is included\r |
c4fa3eac | 5 | all source code of this library instance.\r |
1c2f052d LG |
6 | \r |
7 | Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r | |
29ddc5f7 LD |
8 | Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r |
9 | \r | |
22a69a5e | 10 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
79964ac8 | 11 | \r |
12 | Module Name: DxeCpuIoLibInternal.h\r | |
13 | \r | |
14 | **/\r | |
15 | \r | |
16 | #ifndef _DXE_CPUIO_LIB_INTERNAL_H_\r | |
17 | #define _DXE_CPUIO_LIB_INTERNAL_H_\r | |
18 | \r | |
ed7748fe | 19 | \r |
79964ac8 | 20 | #include <FrameworkDxe.h>\r |
53f93f7e | 21 | \r |
53f93f7e | 22 | #include <Protocol/CpuIo.h>\r |
ed7748fe | 23 | \r |
79964ac8 | 24 | #include <Library/IoLib.h>\r |
25 | #include <Library/UefiBootServicesTableLib.h>\r | |
26 | #include <Library/DebugLib.h>\r | |
27 | #include <Library/BaseLib.h>\r | |
28 | \r | |
79964ac8 | 29 | \r |
30 | /**\r | |
31 | Reads registers in the EFI CPU I/O space.\r | |
32 | \r | |
33 | Reads the I/O port specified by Port with registers width specified by Width.\r | |
29ddc5f7 LD |
34 | The read value is returned.\r |
35 | \r | |
79964ac8 | 36 | This function must guarantee that all I/O read and write operations are serialized.\r |
29ddc5f7 | 37 | If such operations are not supported, then ASSERT().\r |
79964ac8 | 38 | \r |
39 | @param Port The base address of the I/O operation.\r | |
40 | The caller is responsible for aligning the Address if required.\r | |
41 | @param Width The width of the I/O operation.\r | |
42 | \r | |
43 | @return Data read from registers in the EFI CPU I/O space.\r | |
44 | \r | |
45 | **/\r | |
46 | UINT64\r | |
47 | EFIAPI\r | |
48 | IoReadWorker (\r | |
29ddc5f7 LD |
49 | IN UINTN Port,\r |
50 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r | |
79964ac8 | 51 | );\r |
52 | \r | |
53 | /**\r | |
54 | Writes registers in the EFI CPU I/O space.\r | |
55 | \r | |
56 | Writes the I/O port specified by Port with registers width and value specified by Width\r | |
29ddc5f7 LD |
57 | and Data respectively. Data is returned.\r |
58 | \r | |
79964ac8 | 59 | This function must guarantee that all I/O read and write operations are serialized.\r |
29ddc5f7 | 60 | If such operations are not supported, then ASSERT().\r |
79964ac8 | 61 | \r |
62 | @param Port The base address of the I/O operation.\r | |
63 | The caller is responsible for aligning the Address if required.\r | |
64 | @param Width The width of the I/O operation.\r | |
65 | @param Data The value to write to the I/O port.\r | |
66 | \r | |
d6a1c70d | 67 | @return The parameter of Data.\r |
79964ac8 | 68 | \r |
69 | **/\r | |
70 | UINT64\r | |
71 | EFIAPI\r | |
72 | IoWriteWorker (\r | |
29ddc5f7 LD |
73 | IN UINTN Port,\r |
74 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
75 | IN UINT64 Data\r | |
76 | );\r | |
77 | \r | |
78 | /**\r | |
79 | Reads registers in the EFI CPU I/O space.\r | |
80 | \r | |
81 | Reads the I/O port specified by Port with registers width specified by Width.\r | |
82 | The port is read Count times, and the read data is stored in the provided Buffer.\r | |
83 | \r | |
84 | This function must guarantee that all I/O read and write operations are serialized.\r | |
85 | If such operations are not supported, then ASSERT().\r | |
86 | \r | |
87 | @param Port The base address of the I/O operation.\r | |
88 | The caller is responsible for aligning the Address if required.\r | |
89 | @param Width The width of the I/O operation.\r | |
90 | @param Count The number of times to read I/O port.\r | |
91 | @param Buffer The buffer to store the read data into.\r | |
92 | \r | |
93 | **/\r | |
94 | VOID\r | |
95 | EFIAPI\r | |
96 | IoReadFifoWorker (\r | |
97 | IN UINTN Port,\r | |
98 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
99 | IN UINTN Count,\r | |
100 | IN VOID *Buffer\r | |
101 | );\r | |
102 | \r | |
103 | /**\r | |
104 | Writes registers in the EFI CPU I/O space.\r | |
105 | \r | |
106 | Writes the I/O port specified by Port with registers width specified by Width.\r | |
107 | The port is written Count times, and the write data is retrieved from the provided Buffer.\r | |
108 | \r | |
109 | This function must guarantee that all I/O read and write operations are serialized.\r | |
110 | If such operations are not supported, then ASSERT().\r | |
111 | \r | |
112 | @param Port The base address of the I/O operation.\r | |
113 | The caller is responsible for aligning the Address if required.\r | |
114 | @param Width The width of the I/O operation.\r | |
115 | @param Count The number of times to write I/O port.\r | |
116 | @param Buffer The buffer to store the read data into.\r | |
117 | \r | |
118 | **/\r | |
119 | VOID\r | |
120 | EFIAPI\r | |
121 | IoWriteFifoWorker (\r | |
122 | IN UINTN Port,\r | |
123 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
124 | IN UINTN Count,\r | |
125 | IN VOID *Buffer\r | |
79964ac8 | 126 | );\r |
127 | \r | |
128 | /**\r | |
129 | Reads memory-mapped registers in the EFI system memory space.\r | |
130 | \r | |
131 | Reads the MMIO registers specified by Address with registers width specified by Width.\r | |
132 | The read value is returned. If such operations are not supported, then ASSERT().\r | |
133 | This function must guarantee that all MMIO read and write operations are serialized.\r | |
134 | \r | |
135 | @param Address The MMIO register to read.\r | |
136 | The caller is responsible for aligning the Address if required.\r | |
137 | @param Width The width of the I/O operation.\r | |
138 | \r | |
139 | @return Data read from registers in the EFI system memory space.\r | |
140 | \r | |
141 | **/\r | |
142 | UINT64\r | |
143 | EFIAPI\r | |
144 | MmioReadWorker (\r | |
145 | IN UINTN Address,\r | |
146 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r | |
147 | );\r | |
148 | \r | |
149 | /**\r | |
150 | Writes memory-mapped registers in the EFI system memory space.\r | |
151 | \r | |
152 | Writes the MMIO registers specified by Address with registers width and value specified by Width\r | |
153 | and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r | |
154 | This function must guarantee that all MMIO read and write operations are serialized.\r | |
155 | \r | |
156 | @param Address The MMIO register to read.\r | |
157 | The caller is responsible for aligning the Address if required.\r | |
158 | @param Width The width of the I/O operation.\r | |
7459094d | 159 | @param Data The value to write to the I/O port.\r |
1c2f052d | 160 | \r |
79964ac8 | 161 | @return Data read from registers in the EFI system memory space.\r |
162 | \r | |
163 | **/\r | |
164 | UINT64\r | |
165 | EFIAPI\r | |
166 | MmioWriteWorker (\r | |
167 | IN UINTN Address,\r | |
168 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
169 | IN UINT64 Data\r | |
170 | );\r | |
171 | \r | |
172 | #endif\r |