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79964ac8 1/** @file\r
2 I/O Library.\r
1c2f052d 3 The implementation of I/O operation for this library instance\r
c4fa3eac 4 are based on EFI_CPU_IO_PROTOCOL.\r
1c2f052d
LG
5\r
6 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
29ddc5f7
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7 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
8\r
22a69a5e 9 SPDX-License-Identifier: BSD-2-Clause-Patent\r
79964ac8 10\r
11 Module Name: IoLib.c\r
12\r
13**/\r
14\r
694363f8 15\r
79964ac8 16#include "DxeCpuIoLibInternal.h"\r
17\r
18//\r
19// Globle varible to cache pointer to CpuIo protocol.\r
20//\r
33338afe 21EFI_CPU_IO_PROTOCOL *mCpuIo = NULL;\r
79964ac8 22\r
23/**\r
24 The constructor function caches the pointer to CpuIo protocol.\r
25\r
26 The constructor function locates CpuIo protocol from protocol database.\r
27 It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.\r
28\r
29 @param ImageHandle The firmware allocated handle for the EFI image.\r
30 @param SystemTable A pointer to the EFI System Table.\r
31\r
32 @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.\r
33\r
34**/\r
35EFI_STATUS\r
36EFIAPI\r
37IoLibConstructor (\r
38 IN EFI_HANDLE ImageHandle,\r
39 IN EFI_SYSTEM_TABLE *SystemTable\r
40 )\r
41{\r
33338afe 42 EFI_STATUS Status;\r
79964ac8 43\r
33338afe 44 Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID **) &mCpuIo);\r
79964ac8 45 ASSERT_EFI_ERROR (Status);\r
46\r
47 return Status;\r
48}\r
49\r
50/**\r
51 Reads registers in the EFI CPU I/O space.\r
52\r
53 Reads the I/O port specified by Port with registers width specified by Width.\r
54 The read value is returned. If such operations are not supported, then ASSERT().\r
55 This function must guarantee that all I/O read and write operations are serialized.\r
56\r
57 @param Port The base address of the I/O operation.\r
58 The caller is responsible for aligning the Address if required.\r
59 @param Width The width of the I/O operation.\r
60\r
61 @return Data read from registers in the EFI CPU I/O space.\r
62\r
63**/\r
64UINT64\r
65EFIAPI\r
66IoReadWorker (\r
33338afe 67 IN UINTN Port,\r
68 IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r
79964ac8 69 )\r
70{\r
71 EFI_STATUS Status;\r
72 UINT64 Data;\r
73\r
33338afe 74 Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);\r
79964ac8 75 ASSERT_EFI_ERROR (Status);\r
76\r
77 return Data;\r
78}\r
79\r
80/**\r
81 Writes registers in the EFI CPU I/O space.\r
82\r
83 Writes the I/O port specified by Port with registers width and value specified by Width\r
84 and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r
85 This function must guarantee that all I/O read and write operations are serialized.\r
86\r
87 @param Port The base address of the I/O operation.\r
88 The caller is responsible for aligning the Address if required.\r
89 @param Width The width of the I/O operation.\r
90 @param Data The value to write to the I/O port.\r
91\r
d6a1c70d 92 @return The parameter of Data.\r
79964ac8 93\r
94**/\r
95UINT64\r
96EFIAPI\r
97IoWriteWorker (\r
33338afe 98 IN UINTN Port,\r
99 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
100 IN UINT64 Data\r
79964ac8 101 )\r
102{\r
33338afe 103 EFI_STATUS Status;\r
79964ac8 104\r
33338afe 105 Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);\r
79964ac8 106 ASSERT_EFI_ERROR (Status);\r
107\r
108 return Data;\r
109}\r
110\r
29ddc5f7
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111/**\r
112 Reads registers in the EFI CPU I/O space.\r
113\r
114 Reads the I/O port specified by Port with registers width specified by Width.\r
115 The port is read Count times, and the read data is stored in the provided Buffer.\r
116\r
117 This function must guarantee that all I/O read and write operations are serialized.\r
118 If such operations are not supported, then ASSERT().\r
119\r
120 @param Port The base address of the I/O operation.\r
121 The caller is responsible for aligning the Address if required.\r
122 @param Width The width of the I/O operation.\r
123 @param Count The number of times to read I/O port.\r
124 @param Buffer The buffer to store the read data into.\r
125\r
126**/\r
127VOID\r
128EFIAPI\r
129IoReadFifoWorker (\r
130 IN UINTN Port,\r
131 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
132 IN UINTN Count,\r
133 IN VOID *Buffer\r
134 )\r
135{\r
136 EFI_STATUS Status;\r
137\r
138 Status = mCpuIo->Io.Read (mCpuIo, Width, Port, Count, Buffer);\r
139 ASSERT_EFI_ERROR (Status);\r
140}\r
141\r
142/**\r
143 Writes registers in the EFI CPU I/O space.\r
144\r
145 Writes the I/O port specified by Port with registers width specified by Width.\r
146 The port is written Count times, and the write data is retrieved from the provided Buffer.\r
147\r
148 This function must guarantee that all I/O read and write operations are serialized.\r
149 If such operations are not supported, then ASSERT().\r
150\r
151 @param Port The base address of the I/O operation.\r
152 The caller is responsible for aligning the Address if required.\r
153 @param Width The width of the I/O operation.\r
154 @param Count The number of times to write I/O port.\r
155 @param Buffer The buffer to store the read data into.\r
156\r
157**/\r
158VOID\r
159EFIAPI\r
160IoWriteFifoWorker (\r
161 IN UINTN Port,\r
162 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
163 IN UINTN Count,\r
164 IN VOID *Buffer\r
165 )\r
166{\r
167 EFI_STATUS Status;\r
168\r
169 Status = mCpuIo->Io.Write (mCpuIo, Width, Port, Count, Buffer);\r
170 ASSERT_EFI_ERROR (Status);\r
171}\r
172\r
79964ac8 173/**\r
174 Reads memory-mapped registers in the EFI system memory space.\r
175\r
176 Reads the MMIO registers specified by Address with registers width specified by Width.\r
177 The read value is returned. If such operations are not supported, then ASSERT().\r
178 This function must guarantee that all MMIO read and write operations are serialized.\r
179\r
180 @param Address The MMIO register to read.\r
181 The caller is responsible for aligning the Address if required.\r
182 @param Width The width of the I/O operation.\r
183\r
184 @return Data read from registers in the EFI system memory space.\r
185\r
186**/\r
187UINT64\r
188EFIAPI\r
189MmioReadWorker (\r
33338afe 190 IN UINTN Address,\r
191 IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r
79964ac8 192 )\r
193{\r
33338afe 194 EFI_STATUS Status;\r
195 UINT64 Data;\r
79964ac8 196\r
33338afe 197 Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);\r
79964ac8 198 ASSERT_EFI_ERROR (Status);\r
199\r
200 return Data;\r
201}\r
202\r
203/**\r
204 Writes memory-mapped registers in the EFI system memory space.\r
205\r
206 Writes the MMIO registers specified by Address with registers width and value specified by Width\r
207 and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r
208 This function must guarantee that all MMIO read and write operations are serialized.\r
209\r
210 @param Address The MMIO register to read.\r
211 The caller is responsible for aligning the Address if required.\r
212 @param Width The width of the I/O operation.\r
7459094d 213 @param Data The value to write to the I/O port.\r
1c2f052d 214\r
79964ac8 215 @return Data read from registers in the EFI system memory space.\r
216\r
217**/\r
218UINT64\r
219EFIAPI\r
220MmioWriteWorker (\r
33338afe 221 IN UINTN Address,\r
222 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
223 IN UINT64 Data\r
79964ac8 224 )\r
225{\r
33338afe 226 EFI_STATUS Status;\r
79964ac8 227\r
33338afe 228 Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);\r
79964ac8 229 ASSERT_EFI_ERROR (Status);\r
230\r
231 return Data;\r
232}\r
233\r
234/**\r
235 Reads an 8-bit I/O port.\r
236\r
237 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r
238 This function must guarantee that all I/O read and write operations are\r
239 serialized.\r
240\r
241 If 8-bit I/O port operations are not supported, then ASSERT().\r
242\r
243 @param Port The I/O port to read.\r
244\r
245 @return The value read.\r
246\r
247**/\r
248UINT8\r
249EFIAPI\r
250IoRead8 (\r
251 IN UINTN Port\r
252 )\r
253{\r
254 return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);\r
255}\r
256\r
257/**\r
258 Writes an 8-bit I/O port.\r
259\r
260 Writes the 8-bit I/O port specified by Port with the value specified by Value\r
261 and returns Value. This function must guarantee that all I/O read and write\r
262 operations are serialized.\r
263\r
264 If 8-bit I/O port operations are not supported, then ASSERT().\r
265\r
266 @param Port The I/O port to write.\r
267 @param Value The value to write to the I/O port.\r
268\r
269 @return The value written the I/O port.\r
270\r
271**/\r
272UINT8\r
273EFIAPI\r
274IoWrite8 (\r
275 IN UINTN Port,\r
276 IN UINT8 Value\r
277 )\r
278{\r
279 return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);\r
280}\r
281\r
282/**\r
283 Reads a 16-bit I/O port.\r
284\r
285 Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r
286 This function must guarantee that all I/O read and write operations are\r
287 serialized.\r
288\r
596cecff 289 If Port is not aligned on a 16-bit boundary, then ASSERT().\r
1c2f052d 290\r
79964ac8 291 If 16-bit I/O port operations are not supported, then ASSERT().\r
292\r
293 @param Port The I/O port to read.\r
294\r
295 @return The value read.\r
296\r
297**/\r
298UINT16\r
299EFIAPI\r
300IoRead16 (\r
301 IN UINTN Port\r
302 )\r
303{\r
304 //\r
305 // Make sure Port is aligned on a 16-bit boundary.\r
306 //\r
307 ASSERT ((Port & 1) == 0);\r
308 return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);\r
309}\r
310\r
311/**\r
312 Writes a 16-bit I/O port.\r
313\r
314 Writes the 16-bit I/O port specified by Port with the value specified by Value\r
315 and returns Value. This function must guarantee that all I/O read and write\r
316 operations are serialized.\r
317\r
596cecff 318 If Port is not aligned on a 16-bit boundary, then ASSERT().\r
319\r
79964ac8 320 If 16-bit I/O port operations are not supported, then ASSERT().\r
321\r
322 @param Port The I/O port to write.\r
323 @param Value The value to write to the I/O port.\r
324\r
325 @return The value written the I/O port.\r
326\r
327**/\r
328UINT16\r
329EFIAPI\r
330IoWrite16 (\r
331 IN UINTN Port,\r
332 IN UINT16 Value\r
333 )\r
334{\r
335 //\r
336 // Make sure Port is aligned on a 16-bit boundary.\r
337 //\r
338 ASSERT ((Port & 1) == 0);\r
339 return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);\r
340}\r
341\r
342/**\r
343 Reads a 32-bit I/O port.\r
344\r
345 Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r
346 This function must guarantee that all I/O read and write operations are\r
347 serialized.\r
1c2f052d 348\r
596cecff 349 If Port is not aligned on a 32-bit boundary, then ASSERT().\r
79964ac8 350\r
351 If 32-bit I/O port operations are not supported, then ASSERT().\r
352\r
353 @param Port The I/O port to read.\r
354\r
355 @return The value read.\r
356\r
357**/\r
358UINT32\r
359EFIAPI\r
360IoRead32 (\r
361 IN UINTN Port\r
362 )\r
363{\r
364 //\r
365 // Make sure Port is aligned on a 32-bit boundary.\r
366 //\r
367 ASSERT ((Port & 3) == 0);\r
368 return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);\r
369}\r
370\r
371/**\r
372 Writes a 32-bit I/O port.\r
373\r
374 Writes the 32-bit I/O port specified by Port with the value specified by Value\r
375 and returns Value. This function must guarantee that all I/O read and write\r
376 operations are serialized.\r
377\r
596cecff 378 If Port is not aligned on a 32-bit boundary, then ASSERT().\r
379\r
79964ac8 380 If 32-bit I/O port operations are not supported, then ASSERT().\r
381\r
382 @param Port The I/O port to write.\r
383 @param Value The value to write to the I/O port.\r
384\r
385 @return The value written the I/O port.\r
386\r
387**/\r
388UINT32\r
389EFIAPI\r
390IoWrite32 (\r
391 IN UINTN Port,\r
392 IN UINT32 Value\r
393 )\r
394{\r
395 //\r
396 // Make sure Port is aligned on a 32-bit boundary.\r
397 //\r
398 ASSERT ((Port & 3) == 0);\r
399 return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);\r
400}\r
401\r
402/**\r
403 Reads a 64-bit I/O port.\r
404\r
405 Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r
406 This function must guarantee that all I/O read and write operations are\r
407 serialized.\r
408\r
596cecff 409 If Port is not aligned on a 64-bit boundary, then ASSERT().\r
410\r
79964ac8 411 If 64-bit I/O port operations are not supported, then ASSERT().\r
412\r
413 @param Port The I/O port to read.\r
414\r
415 @return The value read.\r
416\r
417**/\r
418UINT64\r
419EFIAPI\r
420IoRead64 (\r
421 IN UINTN Port\r
422 )\r
423{\r
424 //\r
425 // Make sure Port is aligned on a 64-bit boundary.\r
426 //\r
427 ASSERT ((Port & 7) == 0);\r
428 return IoReadWorker (Port, EfiCpuIoWidthUint64);\r
429}\r
430\r
431/**\r
432 Writes a 64-bit I/O port.\r
433\r
434 Writes the 64-bit I/O port specified by Port with the value specified by Value\r
435 and returns Value. This function must guarantee that all I/O read and write\r
436 operations are serialized.\r
437\r
596cecff 438 If Port is not aligned on a 64-bit boundary, then ASSERT().\r
1c2f052d 439\r
79964ac8 440 If 64-bit I/O port operations are not supported, then ASSERT().\r
441\r
442 @param Port The I/O port to write.\r
443 @param Value The value to write to the I/O port.\r
444\r
445 @return The value written the I/O port.\r
446\r
447**/\r
448UINT64\r
449EFIAPI\r
450IoWrite64 (\r
451 IN UINTN Port,\r
452 IN UINT64 Value\r
453 )\r
454{\r
455 //\r
456 // Make sure Port is aligned on a 64-bit boundary.\r
457 //\r
458 ASSERT ((Port & 7) == 0);\r
459 return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);\r
460}\r
461\r
29ddc5f7
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462/**\r
463 Reads an 8-bit I/O port fifo into a block of memory.\r
464\r
465 Reads the 8-bit I/O fifo port specified by Port.\r
466 The port is read Count times, and the read data is\r
467 stored in the provided Buffer.\r
468\r
469 This function must guarantee that all I/O read and write operations are\r
470 serialized.\r
471\r
472 If 8-bit I/O port operations are not supported, then ASSERT().\r
473\r
474 @param Port The I/O port to read.\r
475 @param Count The number of times to read I/O port.\r
476 @param Buffer The buffer to store the read data into.\r
477\r
478**/\r
479VOID\r
480EFIAPI\r
481IoReadFifo8 (\r
482 IN UINTN Port,\r
483 IN UINTN Count,\r
484 OUT VOID *Buffer\r
485 )\r
486{\r
487 IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);\r
488}\r
489\r
490/**\r
491 Writes a block of memory into an 8-bit I/O port fifo.\r
492\r
493 Writes the 8-bit I/O fifo port specified by Port.\r
494 The port is written Count times, and the write data is\r
495 retrieved from the provided Buffer.\r
496\r
497 This function must guarantee that all I/O write and write operations are\r
498 serialized.\r
499\r
500 If 8-bit I/O port operations are not supported, then ASSERT().\r
501\r
502 @param Port The I/O port to write.\r
503 @param Count The number of times to write I/O port.\r
504 @param Buffer The buffer to retrieve the write data from.\r
505\r
506**/\r
507VOID\r
508EFIAPI\r
509IoWriteFifo8 (\r
510 IN UINTN Port,\r
511 IN UINTN Count,\r
512 IN VOID *Buffer\r
513 )\r
514{\r
515 IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);\r
516}\r
517\r
518/**\r
519 Reads a 16-bit I/O port fifo into a block of memory.\r
520\r
521 Reads the 16-bit I/O fifo port specified by Port.\r
522 The port is read Count times, and the read data is\r
523 stored in the provided Buffer.\r
524\r
525 This function must guarantee that all I/O read and write operations are\r
526 serialized.\r
527\r
528 If 16-bit I/O port operations are not supported, then ASSERT().\r
529\r
530 @param Port The I/O port to read.\r
531 @param Count The number of times to read I/O port.\r
532 @param Buffer The buffer to store the read data into.\r
533\r
534**/\r
535VOID\r
536EFIAPI\r
537IoReadFifo16 (\r
538 IN UINTN Port,\r
539 IN UINTN Count,\r
540 OUT VOID *Buffer\r
541 )\r
542{\r
543 //\r
544 // Make sure Port is aligned on a 16-bit boundary.\r
545 //\r
546 ASSERT ((Port & 1) == 0);\r
547 IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);\r
548}\r
549\r
550/**\r
551 Writes a block of memory into a 16-bit I/O port fifo.\r
552\r
553 Writes the 16-bit I/O fifo port specified by Port.\r
554 The port is written Count times, and the write data is\r
555 retrieved from the provided Buffer.\r
556\r
557 This function must guarantee that all I/O write and write operations are\r
558 serialized.\r
559\r
560 If 16-bit I/O port operations are not supported, then ASSERT().\r
561\r
562 @param Port The I/O port to write.\r
563 @param Count The number of times to write I/O port.\r
564 @param Buffer The buffer to retrieve the write data from.\r
565\r
566**/\r
567VOID\r
568EFIAPI\r
569IoWriteFifo16 (\r
570 IN UINTN Port,\r
571 IN UINTN Count,\r
572 IN VOID *Buffer\r
573 )\r
574{\r
575 //\r
576 // Make sure Port is aligned on a 16-bit boundary.\r
577 //\r
578 ASSERT ((Port & 1) == 0);\r
579 IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);\r
580}\r
581\r
582/**\r
583 Reads a 32-bit I/O port fifo into a block of memory.\r
584\r
585 Reads the 32-bit I/O fifo port specified by Port.\r
586 The port is read Count times, and the read data is\r
587 stored in the provided Buffer.\r
588\r
589 This function must guarantee that all I/O read and write operations are\r
590 serialized.\r
591\r
592 If 32-bit I/O port operations are not supported, then ASSERT().\r
593\r
594 @param Port The I/O port to read.\r
595 @param Count The number of times to read I/O port.\r
596 @param Buffer The buffer to store the read data into.\r
597\r
598**/\r
599VOID\r
600EFIAPI\r
601IoReadFifo32 (\r
602 IN UINTN Port,\r
603 IN UINTN Count,\r
604 OUT VOID *Buffer\r
605 )\r
606{\r
607 //\r
608 // Make sure Port is aligned on a 32-bit boundary.\r
609 //\r
610 ASSERT ((Port & 3) == 0);\r
611 IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);\r
612}\r
613\r
614/**\r
615 Writes a block of memory into a 32-bit I/O port fifo.\r
616\r
617 Writes the 32-bit I/O fifo port specified by Port.\r
618 The port is written Count times, and the write data is\r
619 retrieved from the provided Buffer.\r
620\r
621 This function must guarantee that all I/O write and write operations are\r
622 serialized.\r
623\r
624 If 32-bit I/O port operations are not supported, then ASSERT().\r
625\r
626 @param Port The I/O port to write.\r
627 @param Count The number of times to write I/O port.\r
628 @param Buffer The buffer to retrieve the write data from.\r
629\r
630**/\r
631VOID\r
632EFIAPI\r
633IoWriteFifo32 (\r
634 IN UINTN Port,\r
635 IN UINTN Count,\r
636 IN VOID *Buffer\r
637 )\r
638{\r
639 //\r
640 // Make sure Port is aligned on a 32-bit boundary.\r
641 //\r
642 ASSERT ((Port & 3) == 0);\r
643 IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);\r
644}\r
645\r
79964ac8 646/**\r
647 Reads an 8-bit MMIO register.\r
648\r
649 Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r
650 returned. This function must guarantee that all MMIO read and write\r
651 operations are serialized.\r
652\r
653 If 8-bit MMIO register operations are not supported, then ASSERT().\r
654\r
655 @param Address The MMIO register to read.\r
656\r
657 @return The value read.\r
658\r
659**/\r
660UINT8\r
661EFIAPI\r
662MmioRead8 (\r
663 IN UINTN Address\r
664 )\r
665{\r
666 return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);\r
667}\r
668\r
669/**\r
670 Writes an 8-bit MMIO register.\r
671\r
672 Writes the 8-bit MMIO register specified by Address with the value specified\r
673 by Value and returns Value. This function must guarantee that all MMIO read\r
674 and write operations are serialized.\r
675\r
676 If 8-bit MMIO register operations are not supported, then ASSERT().\r
677\r
678 @param Address The MMIO register to write.\r
679 @param Value The value to write to the MMIO register.\r
680\r
681**/\r
682UINT8\r
683EFIAPI\r
684MmioWrite8 (\r
685 IN UINTN Address,\r
686 IN UINT8 Value\r
687 )\r
688{\r
689 return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);\r
690}\r
691\r
692/**\r
693 Reads a 16-bit MMIO register.\r
694\r
695 Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r
696 returned. This function must guarantee that all MMIO read and write\r
697 operations are serialized.\r
698\r
596cecff 699 If Address is not aligned on a 16-bit boundary, then ASSERT().\r
1c2f052d 700\r
79964ac8 701 If 16-bit MMIO register operations are not supported, then ASSERT().\r
702\r
703 @param Address The MMIO register to read.\r
704\r
705 @return The value read.\r
706\r
707**/\r
708UINT16\r
709EFIAPI\r
710MmioRead16 (\r
711 IN UINTN Address\r
712 )\r
713{\r
714 //\r
715 // Make sure Address is aligned on a 16-bit boundary.\r
716 //\r
717 ASSERT ((Address & 1) == 0);\r
718 return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);\r
719}\r
720\r
721/**\r
722 Writes a 16-bit MMIO register.\r
723\r
724 Writes the 16-bit MMIO register specified by Address with the value specified\r
725 by Value and returns Value. This function must guarantee that all MMIO read\r
726 and write operations are serialized.\r
727\r
596cecff 728 If Address is not aligned on a 16-bit boundary, then ASSERT().\r
1c2f052d 729\r
79964ac8 730 If 16-bit MMIO register operations are not supported, then ASSERT().\r
731\r
732 @param Address The MMIO register to write.\r
733 @param Value The value to write to the MMIO register.\r
734\r
735**/\r
736UINT16\r
737EFIAPI\r
738MmioWrite16 (\r
739 IN UINTN Address,\r
740 IN UINT16 Value\r
741 )\r
742{\r
743 //\r
744 // Make sure Address is aligned on a 16-bit boundary.\r
745 //\r
746 ASSERT ((Address & 1) == 0);\r
747 return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);\r
748}\r
749\r
750/**\r
751 Reads a 32-bit MMIO register.\r
752\r
753 Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r
754 returned. This function must guarantee that all MMIO read and write\r
755 operations are serialized.\r
756\r
596cecff 757 If Address is not aligned on a 32-bit boundary, then ASSERT().\r
1c2f052d 758\r
79964ac8 759 If 32-bit MMIO register operations are not supported, then ASSERT().\r
760\r
761 @param Address The MMIO register to read.\r
762\r
763 @return The value read.\r
764\r
765**/\r
766UINT32\r
767EFIAPI\r
768MmioRead32 (\r
769 IN UINTN Address\r
770 )\r
771{\r
772 //\r
773 // Make sure Address is aligned on a 32-bit boundary.\r
774 //\r
775 ASSERT ((Address & 3) == 0);\r
776 return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);\r
777}\r
778\r
779/**\r
780 Writes a 32-bit MMIO register.\r
781\r
782 Writes the 32-bit MMIO register specified by Address with the value specified\r
783 by Value and returns Value. This function must guarantee that all MMIO read\r
784 and write operations are serialized.\r
785\r
596cecff 786 If Address is not aligned on a 32-bit boundary, then ASSERT().\r
1c2f052d 787\r
79964ac8 788 If 32-bit MMIO register operations are not supported, then ASSERT().\r
789\r
790 @param Address The MMIO register to write.\r
791 @param Value The value to write to the MMIO register.\r
792\r
793**/\r
794UINT32\r
795EFIAPI\r
796MmioWrite32 (\r
797 IN UINTN Address,\r
798 IN UINT32 Value\r
799 )\r
800{\r
801 //\r
802 // Make sure Address is aligned on a 32-bit boundary.\r
803 //\r
804 ASSERT ((Address & 3) == 0);\r
805 return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);\r
806}\r
807\r
808/**\r
809 Reads a 64-bit MMIO register.\r
810\r
811 Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r
812 returned. This function must guarantee that all MMIO read and write\r
813 operations are serialized.\r
814\r
596cecff 815 If Address is not aligned on a 64-bit boundary, then ASSERT().\r
1c2f052d 816\r
79964ac8 817 If 64-bit MMIO register operations are not supported, then ASSERT().\r
818\r
819 @param Address The MMIO register to read.\r
820\r
821 @return The value read.\r
822\r
823**/\r
824UINT64\r
825EFIAPI\r
826MmioRead64 (\r
827 IN UINTN Address\r
828 )\r
829{\r
830 //\r
831 // Make sure Address is aligned on a 64-bit boundary.\r
832 //\r
833 ASSERT ((Address & 7) == 0);\r
834 return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);\r
835}\r
836\r
837/**\r
838 Writes a 64-bit MMIO register.\r
839\r
840 Writes the 64-bit MMIO register specified by Address with the value specified\r
841 by Value and returns Value. This function must guarantee that all MMIO read\r
842 and write operations are serialized.\r
843\r
596cecff 844 If Address is not aligned on a 64-bit boundary, then ASSERT().\r
1c2f052d 845\r
79964ac8 846 If 64-bit MMIO register operations are not supported, then ASSERT().\r
847\r
848 @param Address The MMIO register to write.\r
849 @param Value The value to write to the MMIO register.\r
850\r
851**/\r
852UINT64\r
853EFIAPI\r
854MmioWrite64 (\r
855 IN UINTN Address,\r
856 IN UINT64 Value\r
857 )\r
858{\r
859 //\r
860 // Make sure Address is aligned on a 64-bit boundary.\r
861 //\r
862 ASSERT ((Address & 7) == 0);\r
863 return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);\r
864}\r