[mirror_edk2.git] / IntelFrameworkPkg / Library / DxeIoLibCpuIo / IoLib.c

/** @file\r
  I/O Library.\r
  The implementation of I/O operation for this library instance \r
  are based on EFI_CPU_IO_PROTOCOL.\r
  \r
  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
  Module Name:  IoLib.c\r
\r
**/\r
\r
\r
#include "DxeCpuIoLibInternal.h"\r
\r
//\r
// Globle varible to cache pointer to CpuIo protocol.\r
//\r
EFI_CPU_IO_PROTOCOL  *mCpuIo = NULL;\r
\r
/**\r
  The constructor function caches the pointer to CpuIo protocol.\r
\r
  The constructor function locates CpuIo protocol from protocol database.\r
  It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.\r
\r
  @param  ImageHandle   The firmware allocated handle for the EFI image.\r
  @param  SystemTable   A pointer to the EFI System Table.\r
\r
  @retval EFI_SUCCESS   The constructor always returns EFI_SUCCESS.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
IoLibConstructor (\r
  IN      EFI_HANDLE                ImageHandle,\r
  IN      EFI_SYSTEM_TABLE          *SystemTable\r
  )\r
{\r
  EFI_STATUS  Status;\r
\r
  Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID **) &mCpuIo);\r
  ASSERT_EFI_ERROR (Status);\r
\r
  return Status;\r
}\r
\r
/**\r
  Reads registers in the EFI CPU I/O space.\r
\r
  Reads the I/O port specified by Port with registers width specified by Width.\r
  The read value is returned. If such operations are not supported, then ASSERT().\r
  This function must guarantee that all I/O read and write operations are serialized.\r
\r
  @param  Port          The base address of the I/O operation.\r
                        The caller is responsible for aligning the Address if required.\r
  @param  Width         The width of the I/O operation.\r
\r
  @return Data read from registers in the EFI CPU I/O space.\r
\r
**/\r
UINT64\r
EFIAPI\r
IoReadWorker (\r
  IN      UINTN                      Port,\r
  IN      EFI_CPU_IO_PROTOCOL_WIDTH  Width\r
  )\r
{\r
  EFI_STATUS                        Status;\r
  UINT64                            Data;\r
\r
  Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);\r
  ASSERT_EFI_ERROR (Status);\r
\r
  return Data;\r
}\r
\r
/**\r
  Writes registers in the EFI CPU I/O space.\r
\r
  Writes the I/O port specified by Port with registers width and value specified by Width\r
  and Data respectively.  Data is returned. If such operations are not supported, then ASSERT().\r
  This function must guarantee that all I/O read and write operations are serialized.\r
\r
  @param  Port          The base address of the I/O operation.\r
                        The caller is responsible for aligning the Address if required.\r
  @param  Width         The width of the I/O operation.\r
  @param  Data          The value to write to the I/O port.\r
\r
  @return The parameter of Data.\r
\r
**/\r
UINT64\r
EFIAPI\r
IoWriteWorker (\r
  IN      UINTN                      Port,\r
  IN      EFI_CPU_IO_PROTOCOL_WIDTH  Width,\r
  IN      UINT64                     Data\r
  )\r
{\r
  EFI_STATUS  Status;\r
\r
  Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);\r
  ASSERT_EFI_ERROR (Status);\r
\r
  return Data;\r
}\r
\r
/**\r
  Reads registers in the EFI CPU I/O space.\r
\r
  Reads the I/O port specified by Port with registers width specified by Width.\r
  The port is read Count times, and the read data is stored in the provided Buffer.\r
\r
  This function must guarantee that all I/O read and write operations are serialized.\r
  If such operations are not supported, then ASSERT().\r
\r
  @param  Port          The base address of the I/O operation.\r
                        The caller is responsible for aligning the Address if required.\r
  @param  Width         The width of the I/O operation.\r
  @param  Count         The number of times to read I/O port.\r
  @param  Buffer        The buffer to store the read data into.\r
\r
**/\r
VOID\r
EFIAPI\r
IoReadFifoWorker (\r
  IN      UINTN                      Port,\r
  IN      EFI_CPU_IO_PROTOCOL_WIDTH  Width,\r
  IN      UINTN                      Count,\r
  IN      VOID                       *Buffer\r
  )\r
{\r
  EFI_STATUS  Status;\r
\r
  Status = mCpuIo->Io.Read (mCpuIo, Width, Port, Count, Buffer);\r
  ASSERT_EFI_ERROR (Status);\r
}\r
\r
/**\r
  Writes registers in the EFI CPU I/O space.\r
\r
  Writes the I/O port specified by Port with registers width specified by Width.\r
  The port is written Count times, and the write data is retrieved from the provided Buffer.\r
\r
  This function must guarantee that all I/O read and write operations are serialized.\r
  If such operations are not supported, then ASSERT().\r
\r
  @param  Port          The base address of the I/O operation.\r
                        The caller is responsible for aligning the Address if required.\r
  @param  Width         The width of the I/O operation.\r
  @param  Count         The number of times to write I/O port.\r
  @param  Buffer        The buffer to store the read data into.\r
\r
**/\r
VOID\r
EFIAPI\r
IoWriteFifoWorker (\r
  IN      UINTN                      Port,\r
  IN      EFI_CPU_IO_PROTOCOL_WIDTH  Width,\r
  IN      UINTN                      Count,\r
  IN      VOID                       *Buffer\r
  )\r
{\r
  EFI_STATUS  Status;\r
\r
  Status = mCpuIo->Io.Write (mCpuIo, Width, Port, Count, Buffer);\r
  ASSERT_EFI_ERROR (Status);\r
}\r
\r
/**\r
  Reads memory-mapped registers in the EFI system memory space.\r
\r
  Reads the MMIO registers specified by Address with registers width specified by Width.\r
  The read value is returned. If such operations are not supported, then ASSERT().\r
  This function must guarantee that all MMIO read and write operations are serialized.\r
\r
  @param  Address       The MMIO register to read.\r
                        The caller is responsible for aligning the Address if required.\r
  @param  Width         The width of the I/O operation.\r
\r
  @return Data read from registers in the EFI system memory space.\r
\r
**/\r
UINT64\r
EFIAPI\r
MmioReadWorker (\r
  IN      UINTN                      Address,\r
  IN      EFI_CPU_IO_PROTOCOL_WIDTH  Width\r
  )\r
{\r
  EFI_STATUS  Status;\r
  UINT64      Data;\r
\r
  Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);\r
  ASSERT_EFI_ERROR (Status);\r
\r
  return Data;\r
}\r
\r
/**\r
  Writes memory-mapped registers in the EFI system memory space.\r
\r
  Writes the MMIO registers specified by Address with registers width and value specified by Width\r
  and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r
  This function must guarantee that all MMIO read and write operations are serialized.\r
\r
  @param  Address       The MMIO register to read.\r
                        The caller is responsible for aligning the Address if required.\r
  @param  Width         The width of the I/O operation.\r
  @param  Data          The value to write to the I/O port.\r
  \r
  @return Data read from registers in the EFI system memory space.\r
\r
**/\r
UINT64\r
EFIAPI\r
MmioWriteWorker (\r
  IN      UINTN                      Address,\r
  IN      EFI_CPU_IO_PROTOCOL_WIDTH  Width,\r
  IN      UINT64                     Data\r
  )\r
{\r
  EFI_STATUS  Status;\r
\r
  Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);\r
  ASSERT_EFI_ERROR (Status);\r
\r
  return Data;\r
}\r
\r
/**\r
  Reads an 8-bit I/O port.\r
\r
  Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r
  This function must guarantee that all I/O read and write operations are\r
  serialized.\r
\r
  If 8-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port  The I/O port to read.\r
\r
  @return The value read.\r
\r
**/\r
UINT8\r
EFIAPI\r
IoRead8 (\r
  IN      UINTN                     Port\r
  )\r
{\r
  return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);\r
}\r
\r
/**\r
  Writes an 8-bit I/O port.\r
\r
  Writes the 8-bit I/O port specified by Port with the value specified by Value\r
  and returns Value. This function must guarantee that all I/O read and write\r
  operations are serialized.\r
\r
  If 8-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port  The I/O port to write.\r
  @param  Value The value to write to the I/O port.\r
\r
  @return The value written the I/O port.\r
\r
**/\r
UINT8\r
EFIAPI\r
IoWrite8 (\r
  IN      UINTN                     Port,\r
  IN      UINT8                     Value\r
  )\r
{\r
  return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);\r
}\r
\r
/**\r
  Reads a 16-bit I/O port.\r
\r
  Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r
  This function must guarantee that all I/O read and write operations are\r
  serialized.\r
\r
  If Port is not aligned on a 16-bit boundary, then ASSERT().\r
 \r
  If 16-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port  The I/O port to read.\r
\r
  @return The value read.\r
\r
**/\r
UINT16\r
EFIAPI\r
IoRead16 (\r
  IN      UINTN                     Port\r
  )\r
{\r
  //\r
  // Make sure Port is aligned on a 16-bit boundary.\r
  //\r
  ASSERT ((Port & 1) == 0);\r
  return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);\r
}\r
\r
/**\r
  Writes a 16-bit I/O port.\r
\r
  Writes the 16-bit I/O port specified by Port with the value specified by Value\r
  and returns Value. This function must guarantee that all I/O read and write\r
  operations are serialized.\r
\r
  If Port is not aligned on a 16-bit boundary, then ASSERT().\r
\r
  If 16-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port  The I/O port to write.\r
  @param  Value The value to write to the I/O port.\r
\r
  @return The value written the I/O port.\r
\r
**/\r
UINT16\r
EFIAPI\r
IoWrite16 (\r
  IN      UINTN                     Port,\r
  IN      UINT16                    Value\r
  )\r
{\r
  //\r
  // Make sure Port is aligned on a 16-bit boundary.\r
  //\r
  ASSERT ((Port & 1) == 0);\r
  return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);\r
}\r
\r
/**\r
  Reads a 32-bit I/O port.\r
\r
  Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r
  This function must guarantee that all I/O read and write operations are\r
  serialized.\r
 \r
  If Port is not aligned on a 32-bit boundary, then ASSERT().\r
\r
  If 32-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port  The I/O port to read.\r
\r
  @return The value read.\r
\r
**/\r
UINT32\r
EFIAPI\r
IoRead32 (\r
  IN      UINTN                     Port\r
  )\r
{\r
  //\r
  // Make sure Port is aligned on a 32-bit boundary.\r
  //\r
  ASSERT ((Port & 3) == 0);\r
  return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);\r
}\r
\r
/**\r
  Writes a 32-bit I/O port.\r
\r
  Writes the 32-bit I/O port specified by Port with the value specified by Value\r
  and returns Value. This function must guarantee that all I/O read and write\r
  operations are serialized.\r
\r
  If Port is not aligned on a 32-bit boundary, then ASSERT().\r
\r
  If 32-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port  The I/O port to write.\r
  @param  Value The value to write to the I/O port.\r
\r
  @return The value written the I/O port.\r
\r
**/\r
UINT32\r
EFIAPI\r
IoWrite32 (\r
  IN      UINTN                     Port,\r
  IN      UINT32                    Value\r
  )\r
{\r
  //\r
  // Make sure Port is aligned on a 32-bit boundary.\r
  //\r
  ASSERT ((Port & 3) == 0);\r
  return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);\r
}\r
\r
/**\r
  Reads a 64-bit I/O port.\r
\r
  Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r
  This function must guarantee that all I/O read and write operations are\r
  serialized.\r
\r
  If Port is not aligned on a 64-bit boundary, then ASSERT().\r
\r
  If 64-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port  The I/O port to read.\r
\r
  @return The value read.\r
\r
**/\r
UINT64\r
EFIAPI\r
IoRead64 (\r
  IN      UINTN                     Port\r
  )\r
{\r
  //\r
  // Make sure Port is aligned on a 64-bit boundary.\r
  //\r
  ASSERT ((Port & 7) == 0);\r
  return IoReadWorker (Port, EfiCpuIoWidthUint64);\r
}\r
\r
/**\r
  Writes a 64-bit I/O port.\r
\r
  Writes the 64-bit I/O port specified by Port with the value specified by Value\r
  and returns Value. This function must guarantee that all I/O read and write\r
  operations are serialized.\r
\r
  If Port is not aligned on a 64-bit boundary, then ASSERT().\r
 \r
  If 64-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port  The I/O port to write.\r
  @param  Value The value to write to the I/O port.\r
\r
  @return The value written the I/O port.\r
\r
**/\r
UINT64\r
EFIAPI\r
IoWrite64 (\r
  IN      UINTN                     Port,\r
  IN      UINT64                    Value\r
  )\r
{\r
  //\r
  // Make sure Port is aligned on a 64-bit boundary.\r
  //\r
  ASSERT ((Port & 7) == 0);\r
  return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);\r
}\r
\r
/**\r
  Reads an 8-bit I/O port fifo into a block of memory.\r
\r
  Reads the 8-bit I/O fifo port specified by Port.\r
  The port is read Count times, and the read data is\r
  stored in the provided Buffer.\r
\r
  This function must guarantee that all I/O read and write operations are\r
  serialized.\r
\r
  If 8-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port    The I/O port to read.\r
  @param  Count   The number of times to read I/O port.\r
  @param  Buffer  The buffer to store the read data into.\r
\r
**/\r
VOID\r
EFIAPI\r
IoReadFifo8 (\r
  IN      UINTN                     Port,\r
  IN      UINTN                     Count,\r
  OUT     VOID                      *Buffer\r
  )\r
{\r
  IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);\r
}\r
\r
/**\r
  Writes a block of memory into an 8-bit I/O port fifo.\r
\r
  Writes the 8-bit I/O fifo port specified by Port.\r
  The port is written Count times, and the write data is\r
  retrieved from the provided Buffer.\r
\r
  This function must guarantee that all I/O write and write operations are\r
  serialized.\r
\r
  If 8-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port    The I/O port to write.\r
  @param  Count   The number of times to write I/O port.\r
  @param  Buffer  The buffer to retrieve the write data from.\r
\r
**/\r
VOID\r
EFIAPI\r
IoWriteFifo8 (\r
  IN      UINTN                     Port,\r
  IN      UINTN                     Count,\r
  IN      VOID                      *Buffer\r
  )\r
{\r
  IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);\r
}\r
\r
/**\r
  Reads a 16-bit I/O port fifo into a block of memory.\r
\r
  Reads the 16-bit I/O fifo port specified by Port.\r
  The port is read Count times, and the read data is\r
  stored in the provided Buffer.\r
\r
  This function must guarantee that all I/O read and write operations are\r
  serialized.\r
\r
  If 16-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port    The I/O port to read.\r
  @param  Count   The number of times to read I/O port.\r
  @param  Buffer  The buffer to store the read data into.\r
\r
**/\r
VOID\r
EFIAPI\r
IoReadFifo16 (\r
  IN      UINTN                     Port,\r
  IN      UINTN                     Count,\r
  OUT     VOID                      *Buffer\r
  )\r
{\r
  //\r
  // Make sure Port is aligned on a 16-bit boundary.\r
  //\r
  ASSERT ((Port & 1) == 0);\r
  IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);\r
}\r
\r
/**\r
  Writes a block of memory into a 16-bit I/O port fifo.\r
\r
  Writes the 16-bit I/O fifo port specified by Port.\r
  The port is written Count times, and the write data is\r
  retrieved from the provided Buffer.\r
\r
  This function must guarantee that all I/O write and write operations are\r
  serialized.\r
\r
  If 16-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port    The I/O port to write.\r
  @param  Count   The number of times to write I/O port.\r
  @param  Buffer  The buffer to retrieve the write data from.\r
\r
**/\r
VOID\r
EFIAPI\r
IoWriteFifo16 (\r
  IN      UINTN                     Port,\r
  IN      UINTN                     Count,\r
  IN      VOID                      *Buffer\r
  )\r
{\r
  //\r
  // Make sure Port is aligned on a 16-bit boundary.\r
  //\r
  ASSERT ((Port & 1) == 0);\r
  IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);\r
}\r
\r
/**\r
  Reads a 32-bit I/O port fifo into a block of memory.\r
\r
  Reads the 32-bit I/O fifo port specified by Port.\r
  The port is read Count times, and the read data is\r
  stored in the provided Buffer.\r
\r
  This function must guarantee that all I/O read and write operations are\r
  serialized.\r
\r
  If 32-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port    The I/O port to read.\r
  @param  Count   The number of times to read I/O port.\r
  @param  Buffer  The buffer to store the read data into.\r
\r
**/\r
VOID\r
EFIAPI\r
IoReadFifo32 (\r
  IN      UINTN                     Port,\r
  IN      UINTN                     Count,\r
  OUT     VOID                      *Buffer\r
  )\r
{\r
  //\r
  // Make sure Port is aligned on a 32-bit boundary.\r
  //\r
  ASSERT ((Port & 3) == 0);\r
  IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);\r
}\r
\r
/**\r
  Writes a block of memory into a 32-bit I/O port fifo.\r
\r
  Writes the 32-bit I/O fifo port specified by Port.\r
  The port is written Count times, and the write data is\r
  retrieved from the provided Buffer.\r
\r
  This function must guarantee that all I/O write and write operations are\r
  serialized.\r
\r
  If 32-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port    The I/O port to write.\r
  @param  Count   The number of times to write I/O port.\r
  @param  Buffer  The buffer to retrieve the write data from.\r
\r
**/\r
VOID\r
EFIAPI\r
IoWriteFifo32 (\r
  IN      UINTN                     Port,\r
  IN      UINTN                     Count,\r
  IN      VOID                      *Buffer\r
  )\r
{\r
  //\r
  // Make sure Port is aligned on a 32-bit boundary.\r
  //\r
  ASSERT ((Port & 3) == 0);\r
  IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);\r
}\r
\r
/**\r
  Reads an 8-bit MMIO register.\r
\r
  Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r
  returned. This function must guarantee that all MMIO read and write\r
  operations are serialized.\r
\r
  If 8-bit MMIO register operations are not supported, then ASSERT().\r
\r
  @param  Address The MMIO register to read.\r
\r
  @return The value read.\r
\r
**/\r
UINT8\r
EFIAPI\r
MmioRead8 (\r
  IN      UINTN                     Address\r
  )\r
{\r
  return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);\r
}\r
\r
/**\r
  Writes an 8-bit MMIO register.\r
\r
  Writes the 8-bit MMIO register specified by Address with the value specified\r
  by Value and returns Value. This function must guarantee that all MMIO read\r
  and write operations are serialized.\r
\r
  If 8-bit MMIO register operations are not supported, then ASSERT().\r
\r
  @param  Address The MMIO register to write.\r
  @param  Value   The value to write to the MMIO register.\r
\r
**/\r
UINT8\r
EFIAPI\r
MmioWrite8 (\r
  IN      UINTN                     Address,\r
  IN      UINT8                     Value\r
  )\r
{\r
  return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);\r
}\r
\r
/**\r
  Reads a 16-bit MMIO register.\r
\r
  Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r
  returned. This function must guarantee that all MMIO read and write\r
  operations are serialized.\r
\r
  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
 \r
  If 16-bit MMIO register operations are not supported, then ASSERT().\r
\r
  @param  Address The MMIO register to read.\r
\r
  @return The value read.\r
\r
**/\r
UINT16\r
EFIAPI\r
MmioRead16 (\r
  IN      UINTN                     Address\r
  )\r
{\r
  //\r
  // Make sure Address is aligned on a 16-bit boundary.\r
  //\r
  ASSERT ((Address & 1) == 0);\r
  return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);\r
}\r
\r
/**\r
  Writes a 16-bit MMIO register.\r
\r
  Writes the 16-bit MMIO register specified by Address with the value specified\r
  by Value and returns Value. This function must guarantee that all MMIO read\r
  and write operations are serialized.\r
\r
  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
 \r
  If 16-bit MMIO register operations are not supported, then ASSERT().\r
\r
  @param  Address The MMIO register to write.\r
  @param  Value   The value to write to the MMIO register.\r
\r
**/\r
UINT16\r
EFIAPI\r
MmioWrite16 (\r
  IN      UINTN                     Address,\r
  IN      UINT16                    Value\r
  )\r
{\r
  //\r
  // Make sure Address is aligned on a 16-bit boundary.\r
  //\r
  ASSERT ((Address & 1) == 0);\r
  return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);\r
}\r
\r
/**\r
  Reads a 32-bit MMIO register.\r
\r
  Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r
  returned. This function must guarantee that all MMIO read and write\r
  operations are serialized.\r
\r
  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
  \r
  If 32-bit MMIO register operations are not supported, then ASSERT().\r
\r
  @param  Address The MMIO register to read.\r
\r
  @return The value read.\r
\r
**/\r
UINT32\r
EFIAPI\r
MmioRead32 (\r
  IN      UINTN                     Address\r
  )\r
{\r
  //\r
  // Make sure Address is aligned on a 32-bit boundary.\r
  //\r
  ASSERT ((Address & 3) == 0);\r
  return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);\r
}\r
\r
/**\r
  Writes a 32-bit MMIO register.\r
\r
  Writes the 32-bit MMIO register specified by Address with the value specified\r
  by Value and returns Value. This function must guarantee that all MMIO read\r
  and write operations are serialized.\r
\r
  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
 \r
  If 32-bit MMIO register operations are not supported, then ASSERT().\r
\r
  @param  Address The MMIO register to write.\r
  @param  Value   The value to write to the MMIO register.\r
\r
**/\r
UINT32\r
EFIAPI\r
MmioWrite32 (\r
  IN      UINTN                     Address,\r
  IN      UINT32                    Value\r
  )\r
{\r
  //\r
  // Make sure Address is aligned on a 32-bit boundary.\r
  //\r
  ASSERT ((Address & 3) == 0);\r
  return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);\r
}\r
\r
/**\r
  Reads a 64-bit MMIO register.\r
\r
  Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r
  returned. This function must guarantee that all MMIO read and write\r
  operations are serialized.\r
\r
  If Address is not aligned on a 64-bit boundary, then ASSERT().\r
 \r
  If 64-bit MMIO register operations are not supported, then ASSERT().\r
\r
  @param  Address The MMIO register to read.\r
\r
  @return The value read.\r
\r
**/\r
UINT64\r
EFIAPI\r
MmioRead64 (\r
  IN      UINTN                     Address\r
  )\r
{\r
  //\r
  // Make sure Address is aligned on a 64-bit boundary.\r
  //\r
  ASSERT ((Address & 7) == 0);\r
  return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);\r
}\r
\r
/**\r
  Writes a 64-bit MMIO register.\r
\r
  Writes the 64-bit MMIO register specified by Address with the value specified\r
  by Value and returns Value. This function must guarantee that all MMIO read\r
  and write operations are serialized.\r
\r
  If Address is not aligned on a 64-bit boundary, then ASSERT().\r
 \r
  If 64-bit MMIO register operations are not supported, then ASSERT().\r
\r
  @param  Address The MMIO register to write.\r
  @param  Value   The value to write to the MMIO register.\r
\r
**/\r
UINT64\r
EFIAPI\r
MmioWrite64 (\r
  IN      UINTN                     Address,\r
  IN      UINT64                    Value\r
  )\r
{\r
  //\r
  // Make sure Address is aligned on a 64-bit boundary.\r
  //\r
  ASSERT ((Address & 7) == 0);\r
  return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);\r
}\r