]> git.proxmox.com Git - mirror_edk2.git/blame - IntelFsp2Pkg/Include/FspEas/FspApi.h
IntelFsp2Pkg/FspApi.h: Add comment for structure definition.
[mirror_edk2.git] / IntelFsp2Pkg / Include / FspEas / FspApi.h
CommitLineData
cf1d4549
JY
1/** @file\r
2 Intel FSP API definition from Intel Firmware Support Package External\r
3 Architecture Specification v2.0.\r
4\r
5 Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r
6 This program and the accompanying materials\r
7 are licensed and made available under the terms and conditions of the BSD License\r
8 which accompanies this distribution. The full text of the license may be found at\r
9 http://opensource.org/licenses/bsd-license.php.\r
10\r
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13\r
14**/\r
15\r
16#ifndef _FSP_API_H_\r
17#define _FSP_API_H_\r
18\r
19#pragma pack(1)\r
6d0ac988
JY
20///\r
21/// FSP_UPD_HEADER Configuration.\r
22///\r
cf1d4549
JY
23typedef struct {\r
24 ///\r
25 /// UPD Region Signature. This signature will be\r
26 /// "XXXXXX_T" for FSP-T\r
27 /// "XXXXXX_M" for FSP-M\r
28 /// "XXXXXX_S" for FSP-S\r
29 /// Where XXXXXX is an unique signature\r
30 ///\r
31 UINT64 Signature;\r
32 ///\r
33 /// Revision of the Data structure. For FSP v2.0 value is 1.\r
34 ///\r
35 UINT8 Revision;\r
36 UINT8 Reserved[23];\r
37} FSP_UPD_HEADER;\r
38\r
6d0ac988
JY
39///\r
40/// FSPM_ARCH_UPD Configuration.\r
41///\r
cf1d4549
JY
42typedef struct {\r
43 ///\r
44 /// Revision of the structure. For FSP v2.0 value is 1.\r
45 ///\r
46 UINT8 Revision;\r
47 UINT8 Reserved[3];\r
48 ///\r
49 /// Pointer to the non-volatile storage (NVS) data buffer.\r
50 /// If it is NULL it indicates the NVS data is not available.\r
51 ///\r
52 VOID *NvsBufferPtr;\r
53 ///\r
54 /// Pointer to the temporary stack base address to be\r
55 /// consumed inside FspMemoryInit() API.\r
56 ///\r
57 VOID *StackBase;\r
58 ///\r
59 /// Temporary stack size to be consumed inside\r
60 /// FspMemoryInit() API.\r
61 ///\r
62 UINT32 StackSize;\r
63 ///\r
64 /// Size of memory to be reserved by FSP below "top\r
65 /// of low usable memory" for bootloader usage.\r
66 ///\r
67 UINT32 BootLoaderTolumSize;\r
68 ///\r
69 /// Current boot mode.\r
70 ///\r
71 UINT32 BootMode;\r
72 UINT8 Reserved1[8];\r
73} FSPM_ARCH_UPD;\r
74\r
6d0ac988
JY
75///\r
76/// FSPT_UPD_COMMON Configuration.\r
77///\r
cf1d4549 78typedef struct {\r
6d0ac988
JY
79 ///\r
80 /// FSP_UPD_HEADER Configuration.\r
81 ///\r
cf1d4549
JY
82 FSP_UPD_HEADER FspUpdHeader;\r
83} FSPT_UPD_COMMON;\r
84\r
6d0ac988
JY
85///\r
86/// FSPM_UPD_COMMON Configuration.\r
87///\r
cf1d4549 88typedef struct {\r
6d0ac988
JY
89 ///\r
90 /// FSP_UPD_HEADER Configuration.\r
91 ///\r
cf1d4549 92 FSP_UPD_HEADER FspUpdHeader;\r
6d0ac988
JY
93 ///\r
94 /// FSPM_ARCH_UPD Configuration.\r
95 ///\r
cf1d4549
JY
96 FSPM_ARCH_UPD FspmArchUpd;\r
97} FSPM_UPD_COMMON;\r
98\r
6d0ac988
JY
99///\r
100/// FSPS_UPD_COMMON Configuration.\r
101///\r
cf1d4549 102typedef struct {\r
6d0ac988
JY
103 ///\r
104 /// FSP_UPD_HEADER Configuration.\r
105 ///\r
cf1d4549
JY
106 FSP_UPD_HEADER FspUpdHeader;\r
107} FSPS_UPD_COMMON;\r
108\r
6d0ac988
JY
109///\r
110/// Enumeration of FSP_INIT_PHASE for NOTIFY_PHASE.\r
111///\r
cf1d4549
JY
112typedef enum {\r
113 ///\r
114 /// This stage is notified when the bootloader completes the\r
115 /// PCI enumeration and the resource allocation for the\r
116 /// PCI devices is complete.\r
117 ///\r
118 EnumInitPhaseAfterPciEnumeration = 0x20,\r
119 ///\r
120 /// This stage is notified just before the bootloader hand-off\r
121 /// to the OS loader.\r
122 ///\r
123 EnumInitPhaseReadyToBoot = 0x40,\r
124 ///\r
125 /// This stage is notified just before the firmware/Preboot\r
126 /// environment transfers management of all system resources\r
127 /// to the OS or next level execution environment.\r
128 ///\r
129 EnumInitPhaseEndOfFirmware = 0xF0\r
130} FSP_INIT_PHASE;\r
131\r
6d0ac988
JY
132///\r
133/// Definition of NOTIFY_PHASE_PARAMS.\r
134///\r
cf1d4549
JY
135typedef struct {\r
136 ///\r
137 /// Notification phase used for NotifyPhase API\r
138 ///\r
139 FSP_INIT_PHASE Phase;\r
140} NOTIFY_PHASE_PARAMS;\r
141\r
142#pragma pack()\r
143\r
144/**\r
145 This FSP API is called soon after coming out of reset and before memory and stack is\r
146 available. This FSP API will load the microcode update, enable code caching for the\r
147 region specified by the boot loader and also setup a temporary stack to be used until\r
148 main memory is initialized.\r
149\r
150 A hardcoded stack can be set up with the following values, and the "esp" register\r
151 initialized to point to this hardcoded stack.\r
152 1. The return address where the FSP will return control after setting up a temporary\r
153 stack.\r
154 2. A pointer to the input parameter structure\r
155\r
156 However, since the stack is in ROM and not writeable, this FSP API cannot be called\r
157 using the "call" instruction, but needs to be jumped to.\r
158\r
159 @param[in] FsptUpdDataPtr Pointer to the FSPT_UPD data structure.\r
160\r
161 @retval EFI_SUCCESS Temporary RAM was initialized successfully.\r
162 @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r
163 @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r
164 @retval EFI_DEVICE_ERROR Temp RAM initialization failed.\r
165\r
166 If this function is successful, the FSP initializes the ECX and EDX registers to point to\r
167 a temporary but writeable memory range available to the boot loader and returns with\r
168 FSP_SUCCESS in register EAX. Register ECX points to the start of this temporary\r
169 memory range and EDX points to the end of the range. Boot loader is free to use the\r
170 whole range described. Typically the boot loader can reload the ESP register to point\r
171 to the end of this returned range so that it can be used as a standard stack.\r
172**/\r
173typedef\r
174EFI_STATUS\r
175(EFIAPI *FSP_TEMP_RAM_INIT) (\r
176 IN VOID *FsptUpdDataPtr\r
177 );\r
178\r
179/**\r
180 This FSP API is used to notify the FSP about the different phases in the boot process.\r
181 This allows the FSP to take appropriate actions as needed during different initialization\r
182 phases. The phases will be platform dependent and will be documented with the FSP\r
183 release. The current FSP supports two notify phases:\r
184 Post PCI enumeration\r
185 Ready To Boot\r
186\r
187 @param[in] NotifyPhaseParamPtr Address pointer to the NOTIFY_PHASE_PRAMS\r
188\r
189 @retval EFI_SUCCESS The notification was handled successfully.\r
190 @retval EFI_UNSUPPORTED The notification was not called in the proper order.\r
191 @retval EFI_INVALID_PARAMETER The notification code is invalid.\r
192**/\r
193typedef\r
194EFI_STATUS\r
195(EFIAPI *FSP_NOTIFY_PHASE) (\r
196 IN NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr\r
197 );\r
198\r
199/**\r
200 This FSP API is called after TempRamInit and initializes the memory.\r
201 This FSP API accepts a pointer to a data structure that will be platform dependent\r
202 and defined for each FSP binary. This will be documented in Integration guide with\r
203 each FSP release.\r
204 After FspMemInit completes its execution, it passes the pointer to the HobList and\r
205 returns to the boot loader from where it was called. BootLoader is responsible to \r
206 migrate it's stack and data to Memory.\r
207 FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to\r
208 complete the silicon initialization and provides bootloader an opportunity to get\r
209 control after system memory is available and before the temporary RAM is torn down.\r
210\r
211 @param[in] FspmUpdDataPtr Pointer to the FSPM_UPD data sructure.\r
212 @param[out] HobListPtr Pointer to receive the address of the HOB list.\r
213\r
214 @retval EFI_SUCCESS FSP execution environment was initialized successfully.\r
215 @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r
216 @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r
217 @retval EFI_DEVICE_ERROR FSP initialization failed.\r
218 @retval EFI_OUT_OF_RESOURCES Stack range requested by FSP is not met.\r
219 @retval FSP_STATUS_RESET_REQUIREDx A reset is reuired. These status codes will not be returned during S3.\r
220**/\r
221typedef\r
222EFI_STATUS\r
223(EFIAPI *FSP_MEMORY_INIT) (\r
224 IN VOID *FspmUpdDataPtr,\r
225 OUT VOID **HobListPtr\r
226 );\r
227\r
228\r
229/**\r
230 This FSP API is called after FspMemoryInit API. This FSP API tears down the temporary\r
231 memory setup by TempRamInit API. This FSP API accepts a pointer to a data structure\r
232 that will be platform dependent and defined for each FSP binary. This will be\r
233 documented in Integration Guide.\r
234 FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to\r
235 complete the silicon initialization and provides bootloader an opportunity to get\r
236 control after system memory is available and before the temporary RAM is torn down.\r
237\r
238 @param[in] TempRamExitParamPtr Pointer to the Temp Ram Exit parameters structure.\r
239 This structure is normally defined in the Integration Guide.\r
240 And if it is not defined in the Integration Guide, pass NULL.\r
241\r
242 @retval EFI_SUCCESS FSP execution environment was initialized successfully.\r
243 @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r
244 @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r
245 @retval EFI_DEVICE_ERROR FSP initialization failed.\r
246**/\r
247typedef\r
248EFI_STATUS\r
249(EFIAPI *FSP_TEMP_RAM_EXIT) (\r
250 IN VOID *TempRamExitParamPtr\r
251 );\r
252\r
253\r
254/**\r
255 This FSP API is called after TempRamExit API.\r
256 FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to complete the\r
257 silicon initialization.\r
258\r
259 @param[in] FspsUpdDataPtr Pointer to the FSPS_UPD data structure.\r
260 If NULL, FSP will use the default parameters.\r
261\r
262 @retval EFI_SUCCESS FSP execution environment was initialized successfully.\r
263 @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r
264 @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r
265 @retval EFI_DEVICE_ERROR FSP initialization failed.\r
266 @retval FSP_STATUS_RESET_REQUIREDx A reset is reuired. These status codes will not be returned during S3.\r
267**/\r
268typedef\r
269EFI_STATUS\r
270(EFIAPI *FSP_SILICON_INIT) (\r
271 IN VOID *FspsUpdDataPtr\r
272 );\r
273\r
274#endif\r