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1/** @file\r
2 Intel FSP API definition from Intel Firmware Support Package External\r
f2cdb268 3 Architecture Specification v2.0 - v2.2\r
cf1d4549 4\r
f2cdb268 5 Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.<BR>\r
9672cd30 6 SPDX-License-Identifier: BSD-2-Clause-Patent\r
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7\r
8**/\r
9\r
10#ifndef _FSP_API_H_\r
11#define _FSP_API_H_\r
12\r
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13#include <Pi/PiStatusCode.h>\r
14\r
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15///\r
16/// FSP Reset Status code\r
17/// These are defined in FSP EAS v2.0 section 11.2.2 - OEM Status Code\r
18/// @{\r
19#define FSP_STATUS_RESET_REQUIRED_COLD 0x40000001\r
20#define FSP_STATUS_RESET_REQUIRED_WARM 0x40000002\r
21#define FSP_STATUS_RESET_REQUIRED_3 0x40000003\r
22#define FSP_STATUS_RESET_REQUIRED_4 0x40000004\r
23#define FSP_STATUS_RESET_REQUIRED_5 0x40000005\r
24#define FSP_STATUS_RESET_REQUIRED_6 0x40000006\r
25#define FSP_STATUS_RESET_REQUIRED_7 0x40000007\r
26#define FSP_STATUS_RESET_REQUIRED_8 0x40000008\r
27/// @}\r
28\r
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29///\r
30/// FSP Event related definition.\r
31///\r
32#define FSP_EVENT_CODE 0xF5000000\r
33#define FSP_POST_CODE (FSP_EVENT_CODE | 0x00F80000)\r
34\r
35/*\r
36 FSP may optionally include the capability of generating events messages to aid in the debugging of firmware issues.\r
37 These events fall under three catagories: Error, Progress, and Debug. The event reporting mechanism follows the\r
38 status code services described in section 6 and 7 of the PI Specification v1.7 Volume 3.\r
39\r
40 @param[in] Type Indicates the type of event being reported.\r
41 See MdePkg/Include/Pi/PiStatusCode.h for the definition of EFI_STATUS_CODE_TYPE.\r
42 @param[in] Value Describes the current status of a hardware or software entity.\r
43 This includes information about the class and subclass that is used to classify the entity as well as an operation.\r
44 For progress events, the operation is the current activity. For error events, it is the exception.\r
45 For debug events, it is not defined at this time.\r
46 See MdePkg/Include/Pi/PiStatusCode.h for the definition of EFI_STATUS_CODE_VALUE.\r
47 @param[in] Instance The enumeration of a hardware or software entity within the system.\r
48 A system may contain multiple entities that match a class/subclass pairing. The instance differentiates between them.\r
49 An instance of 0 indicates that instance information is unavailable, not meaningful, or not relevant.\r
50 Valid instance numbers start with 1.\r
51 @param[in] *CallerId This parameter can be used to identify the sub-module within the FSP generating the event.\r
52 This parameter may be NULL.\r
53 @param[in] *Data This optional parameter may be used to pass additional data. The contents can have event-specific data.\r
54 For example, the FSP provides a EFI_STATUS_CODE_STRING_DATA instance to this parameter when sending debug messages.\r
55 This parameter is NULL when no additional data is provided.\r
56\r
57 @retval EFI_SUCCESS The event was handled successfully.\r
58 @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r
59 @retval EFI_DEVICE_ERROR The event handler failed.\r
60*/\r
61typedef\r
62EFI_STATUS\r
63(EFIAPI *FSP_EVENT_HANDLER) (\r
64 IN EFI_STATUS_CODE_TYPE Type,\r
65 IN EFI_STATUS_CODE_VALUE Value,\r
66 IN UINT32 Instance,\r
67 IN OPTIONAL EFI_GUID *CallerId,\r
68 IN OPTIONAL EFI_STATUS_CODE_DATA *Data\r
69 );\r
70\r
71/*\r
72 Handler for FSP-T debug log messages, provided by the bootloader.\r
73\r
74 @param[in] DebugMessage A pointer to the debug message to be written to the log.\r
75 @param[in] MessageLength Number of bytes to written to the debug log.\r
76\r
77 @retval UINT32 The return value indicates the number of bytes actually written to\r
78 the debug log. If the return value is less than MessageLength,\r
79 an error occurred.\r
80*/\r
81typedef\r
82UINT32\r
83(EFIAPI *FSP_DEBUG_HANDLER) (\r
84 IN CHAR8* DebugMessage,\r
85 IN UINT32 MessageLength\r
86 );\r
87\r
cf1d4549 88#pragma pack(1)\r
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89///\r
90/// FSP_UPD_HEADER Configuration.\r
91///\r
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92typedef struct {\r
93 ///\r
94 /// UPD Region Signature. This signature will be\r
95 /// "XXXXXX_T" for FSP-T\r
96 /// "XXXXXX_M" for FSP-M\r
97 /// "XXXXXX_S" for FSP-S\r
98 /// Where XXXXXX is an unique signature\r
99 ///\r
100 UINT64 Signature;\r
101 ///\r
102 /// Revision of the Data structure. For FSP v2.0 value is 1.\r
103 ///\r
104 UINT8 Revision;\r
105 UINT8 Reserved[23];\r
106} FSP_UPD_HEADER;\r
107\r
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108///\r
109/// FSPM_ARCH_UPD Configuration.\r
110///\r
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111typedef struct {\r
112 ///\r
113 /// Revision of the structure. For FSP v2.0 value is 1.\r
114 ///\r
115 UINT8 Revision;\r
116 UINT8 Reserved[3];\r
117 ///\r
118 /// Pointer to the non-volatile storage (NVS) data buffer.\r
119 /// If it is NULL it indicates the NVS data is not available.\r
120 ///\r
121 VOID *NvsBufferPtr;\r
122 ///\r
123 /// Pointer to the temporary stack base address to be\r
124 /// consumed inside FspMemoryInit() API.\r
125 ///\r
126 VOID *StackBase;\r
127 ///\r
128 /// Temporary stack size to be consumed inside\r
129 /// FspMemoryInit() API.\r
130 ///\r
131 UINT32 StackSize;\r
132 ///\r
133 /// Size of memory to be reserved by FSP below "top\r
134 /// of low usable memory" for bootloader usage.\r
135 ///\r
136 UINT32 BootLoaderTolumSize;\r
137 ///\r
138 /// Current boot mode.\r
139 ///\r
140 UINT32 BootMode;\r
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141 ///\r
142 /// Optional event handler for the bootloader to be informed of events occurring during FSP execution.\r
143 /// This value is only valid if Revision is >= 2.\r
144 ///\r
145 FSP_EVENT_HANDLER *FspEventHandler;\r
146 UINT8 Reserved1[4];\r
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147} FSPM_ARCH_UPD;\r
148\r
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149///\r
150/// FSPT_UPD_COMMON Configuration.\r
151///\r
cf1d4549 152typedef struct {\r
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153 ///\r
154 /// FSP_UPD_HEADER Configuration.\r
155 ///\r
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156 FSP_UPD_HEADER FspUpdHeader;\r
157} FSPT_UPD_COMMON;\r
158\r
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159///\r
160/// FSPM_UPD_COMMON Configuration.\r
161///\r
cf1d4549 162typedef struct {\r
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163 ///\r
164 /// FSP_UPD_HEADER Configuration.\r
165 ///\r
cf1d4549 166 FSP_UPD_HEADER FspUpdHeader;\r
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167 ///\r
168 /// FSPM_ARCH_UPD Configuration.\r
169 ///\r
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170 FSPM_ARCH_UPD FspmArchUpd;\r
171} FSPM_UPD_COMMON;\r
172\r
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173///\r
174/// FSPS_UPD_COMMON Configuration.\r
175///\r
cf1d4549 176typedef struct {\r
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177 ///\r
178 /// FSP_UPD_HEADER Configuration.\r
179 ///\r
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180 FSP_UPD_HEADER FspUpdHeader;\r
181} FSPS_UPD_COMMON;\r
182\r
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183///\r
184/// Enumeration of FSP_INIT_PHASE for NOTIFY_PHASE.\r
185///\r
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186typedef enum {\r
187 ///\r
188 /// This stage is notified when the bootloader completes the\r
189 /// PCI enumeration and the resource allocation for the\r
190 /// PCI devices is complete.\r
191 ///\r
192 EnumInitPhaseAfterPciEnumeration = 0x20,\r
193 ///\r
194 /// This stage is notified just before the bootloader hand-off\r
195 /// to the OS loader.\r
196 ///\r
197 EnumInitPhaseReadyToBoot = 0x40,\r
198 ///\r
199 /// This stage is notified just before the firmware/Preboot\r
200 /// environment transfers management of all system resources\r
201 /// to the OS or next level execution environment.\r
202 ///\r
203 EnumInitPhaseEndOfFirmware = 0xF0\r
204} FSP_INIT_PHASE;\r
205\r
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206///\r
207/// Definition of NOTIFY_PHASE_PARAMS.\r
208///\r
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209typedef struct {\r
210 ///\r
211 /// Notification phase used for NotifyPhase API\r
212 ///\r
213 FSP_INIT_PHASE Phase;\r
214} NOTIFY_PHASE_PARAMS;\r
215\r
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216///\r
217/// Action definition for FspMultiPhaseSiInit API\r
218///\r
219typedef enum {\r
220 EnumMultiPhaseGetNumberOfPhases = 0x0,\r
221 EnumMultiPhaseExecutePhase = 0x1\r
222} FSP_MULTI_PHASE_ACTION;\r
223\r
224///\r
225/// Data structure returned by FSP when bootloader calling\r
226/// FspMultiPhaseSiInit API with action 0 (EnumMultiPhaseGetNumberOfPhases)\r
227///\r
228typedef struct {\r
229 UINT32 NumberOfPhases;\r
230 UINT32 PhasesExecuted;\r
231} FSP_MULTI_PHASE_GET_NUMBER_OF_PHASES_PARAMS;\r
232\r
233///\r
234/// FspMultiPhaseSiInit function parameter.\r
235///\r
236/// For action 0 (EnumMultiPhaseGetNumberOfPhases):\r
237/// - PhaseIndex must be 0.\r
238/// - MultiPhaseParamPtr should point to an instance of FSP_MULTI_PHASE_GET_NUMBER_OF_PHASES_PARAMS.\r
239///\r
240/// For action 1 (EnumMultiPhaseExecutePhase):\r
241/// - PhaseIndex will be the phase that will be executed by FSP.\r
242/// - MultiPhaseParamPtr shall be NULL.\r
243///\r
244typedef struct {\r
245 IN FSP_MULTI_PHASE_ACTION MultiPhaseAction;\r
246 IN UINT32 PhaseIndex;\r
247 IN OUT VOID *MultiPhaseParamPtr;\r
248} FSP_MULTI_PHASE_PARAMS;\r
249\r
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250#pragma pack()\r
251\r
252/**\r
253 This FSP API is called soon after coming out of reset and before memory and stack is\r
254 available. This FSP API will load the microcode update, enable code caching for the\r
255 region specified by the boot loader and also setup a temporary stack to be used until\r
256 main memory is initialized.\r
257\r
258 A hardcoded stack can be set up with the following values, and the "esp" register\r
259 initialized to point to this hardcoded stack.\r
260 1. The return address where the FSP will return control after setting up a temporary\r
261 stack.\r
262 2. A pointer to the input parameter structure\r
263\r
264 However, since the stack is in ROM and not writeable, this FSP API cannot be called\r
265 using the "call" instruction, but needs to be jumped to.\r
266\r
267 @param[in] FsptUpdDataPtr Pointer to the FSPT_UPD data structure.\r
268\r
269 @retval EFI_SUCCESS Temporary RAM was initialized successfully.\r
270 @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r
271 @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r
272 @retval EFI_DEVICE_ERROR Temp RAM initialization failed.\r
273\r
274 If this function is successful, the FSP initializes the ECX and EDX registers to point to\r
275 a temporary but writeable memory range available to the boot loader and returns with\r
276 FSP_SUCCESS in register EAX. Register ECX points to the start of this temporary\r
277 memory range and EDX points to the end of the range. Boot loader is free to use the\r
278 whole range described. Typically the boot loader can reload the ESP register to point\r
279 to the end of this returned range so that it can be used as a standard stack.\r
280**/\r
281typedef\r
282EFI_STATUS\r
283(EFIAPI *FSP_TEMP_RAM_INIT) (\r
284 IN VOID *FsptUpdDataPtr\r
285 );\r
286\r
287/**\r
288 This FSP API is used to notify the FSP about the different phases in the boot process.\r
289 This allows the FSP to take appropriate actions as needed during different initialization\r
290 phases. The phases will be platform dependent and will be documented with the FSP\r
291 release. The current FSP supports two notify phases:\r
292 Post PCI enumeration\r
293 Ready To Boot\r
294\r
295 @param[in] NotifyPhaseParamPtr Address pointer to the NOTIFY_PHASE_PRAMS\r
296\r
297 @retval EFI_SUCCESS The notification was handled successfully.\r
298 @retval EFI_UNSUPPORTED The notification was not called in the proper order.\r
299 @retval EFI_INVALID_PARAMETER The notification code is invalid.\r
300**/\r
301typedef\r
302EFI_STATUS\r
303(EFIAPI *FSP_NOTIFY_PHASE) (\r
304 IN NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr\r
305 );\r
306\r
307/**\r
308 This FSP API is called after TempRamInit and initializes the memory.\r
309 This FSP API accepts a pointer to a data structure that will be platform dependent\r
310 and defined for each FSP binary. This will be documented in Integration guide with\r
311 each FSP release.\r
312 After FspMemInit completes its execution, it passes the pointer to the HobList and\r
e37bb20c 313 returns to the boot loader from where it was called. BootLoader is responsible to\r
91cc60ba 314 migrate its stack and data to Memory.\r
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315 FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to\r
316 complete the silicon initialization and provides bootloader an opportunity to get\r
317 control after system memory is available and before the temporary RAM is torn down.\r
318\r
91cc60ba 319 @param[in] FspmUpdDataPtr Pointer to the FSPM_UPD data structure.\r
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320 @param[out] HobListPtr Pointer to receive the address of the HOB list.\r
321\r
322 @retval EFI_SUCCESS FSP execution environment was initialized successfully.\r
323 @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r
324 @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r
325 @retval EFI_DEVICE_ERROR FSP initialization failed.\r
326 @retval EFI_OUT_OF_RESOURCES Stack range requested by FSP is not met.\r
327 @retval FSP_STATUS_RESET_REQUIREDx A reset is reuired. These status codes will not be returned during S3.\r
328**/\r
329typedef\r
330EFI_STATUS\r
331(EFIAPI *FSP_MEMORY_INIT) (\r
332 IN VOID *FspmUpdDataPtr,\r
333 OUT VOID **HobListPtr\r
334 );\r
335\r
336\r
337/**\r
338 This FSP API is called after FspMemoryInit API. This FSP API tears down the temporary\r
339 memory setup by TempRamInit API. This FSP API accepts a pointer to a data structure\r
340 that will be platform dependent and defined for each FSP binary. This will be\r
341 documented in Integration Guide.\r
342 FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to\r
343 complete the silicon initialization and provides bootloader an opportunity to get\r
344 control after system memory is available and before the temporary RAM is torn down.\r
345\r
346 @param[in] TempRamExitParamPtr Pointer to the Temp Ram Exit parameters structure.\r
347 This structure is normally defined in the Integration Guide.\r
348 And if it is not defined in the Integration Guide, pass NULL.\r
349\r
350 @retval EFI_SUCCESS FSP execution environment was initialized successfully.\r
351 @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r
352 @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r
353 @retval EFI_DEVICE_ERROR FSP initialization failed.\r
354**/\r
355typedef\r
356EFI_STATUS\r
357(EFIAPI *FSP_TEMP_RAM_EXIT) (\r
358 IN VOID *TempRamExitParamPtr\r
359 );\r
360\r
361\r
362/**\r
363 This FSP API is called after TempRamExit API.\r
364 FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to complete the\r
365 silicon initialization.\r
366\r
367 @param[in] FspsUpdDataPtr Pointer to the FSPS_UPD data structure.\r
368 If NULL, FSP will use the default parameters.\r
369\r
370 @retval EFI_SUCCESS FSP execution environment was initialized successfully.\r
371 @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r
372 @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r
373 @retval EFI_DEVICE_ERROR FSP initialization failed.\r
91cc60ba 374 @retval FSP_STATUS_RESET_REQUIREDx A reset is required. These status codes will not be returned during S3.\r
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375**/\r
376typedef\r
377EFI_STATUS\r
378(EFIAPI *FSP_SILICON_INIT) (\r
379 IN VOID *FspsUpdDataPtr\r
380 );\r
381\r
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382/**\r
383 This FSP API is expected to be called after FspSiliconInit but before FspNotifyPhase.\r
384 This FSP API provides multi-phase silicon initialization; which brings greater modularity\r
385 beyond the existing FspSiliconInit() API. Increased modularity is achieved by adding an\r
386 extra API to FSP-S. This allows the bootloader to add board specific initialization steps\r
387 throughout the SiliconInit flow as needed.\r
388\r
389 @param[in,out] FSP_MULTI_PHASE_PARAMS For action - EnumMultiPhaseGetNumberOfPhases:\r
390 FSP_MULTI_PHASE_PARAMS->MultiPhaseParamPtr will contain\r
391 how many phases supported by FSP.\r
392 For action - EnumMultiPhaseExecutePhase:\r
393 FSP_MULTI_PHASE_PARAMS->MultiPhaseParamPtr shall be NULL.\r
394 @retval EFI_SUCCESS FSP execution environment was initialized successfully.\r
395 @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r
396 @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r
397 @retval EFI_DEVICE_ERROR FSP initialization failed.\r
398 @retval FSP_STATUS_RESET_REQUIREDx A reset is required. These status codes will not be returned during S3.\r
399**/\r
400typedef\r
401EFI_STATUS\r
402(EFIAPI *FSP_MULTI_PHASE_SI_INIT) (\r
403 IN FSP_MULTI_PHASE_PARAMS *MultiPhaseSiInitParamPtr\r
404);\r
405\r
cf1d4549 406#endif\r