projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| cf1d4549 JY |
1 | /** @file\r |
| 2 | \r | |
| f2cdb268 | 3 | Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.<BR>\r |
| 9672cd30 | 4 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| cf1d4549 JY |
5 | \r |
| 6 | **/\r | |
| 7 | \r | |
| 8 | #ifndef _FSP_GLOBAL_DATA_H_\r | |
| 9 | #define _FSP_GLOBAL_DATA_H_\r | |
| 10 | \r | |
| 11 | #include <FspEas.h>\r | |
| 12 | \r | |
| a2e61f34 CC |
13 | #define FSP_IN_API_MODE 0\r |
| 14 | #define FSP_IN_DISPATCH_MODE 1\r | |
| 15 | \r | |
| cf1d4549 JY |
16 | #pragma pack(1)\r |
| 17 | \r | |
| 18 | typedef enum {\r | |
| 19 | TempRamInitApiIndex,\r | |
| 20 | FspInitApiIndex,\r | |
| 21 | NotifyPhaseApiIndex,\r | |
| 22 | FspMemoryInitApiIndex,\r | |
| 23 | TempRamExitApiIndex,\r | |
| 24 | FspSiliconInitApiIndex,\r | |
| f2cdb268 | 25 | FspMultiPhaseSiInitApiIndex,\r |
| cf1d4549 JY |
26 | FspApiIndexMax\r |
| 27 | } FSP_API_INDEX;\r | |
| 28 | \r | |
| 29 | typedef struct {\r | |
| 30 | VOID *DataPtr;\r | |
| 31 | UINT32 MicrocodeRegionBase;\r | |
| 32 | UINT32 MicrocodeRegionSize;\r | |
| 33 | UINT32 CodeRegionBase;\r | |
| 34 | UINT32 CodeRegionSize;\r | |
| cf1d4549 JY |
35 | } FSP_PLAT_DATA;\r |
| 36 | \r | |
| 37 | #define FSP_GLOBAL_DATA_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'D')\r | |
| 38 | #define FSP_PERFORMANCE_DATA_SIGNATURE SIGNATURE_32 ('P', 'E', 'R', 'F')\r | |
| 19d29d35 | 39 | #define FSP_PERFORMANCE_DATA_TIMER_MASK 0xFFFFFFFFFFFFFF\r |
| cf1d4549 JY |
40 | \r |
| 41 | typedef struct {\r | |
| 42 | UINT32 Signature;\r | |
| 43 | UINT8 Version;\r | |
| 44 | UINT8 Reserved1[3];\r | |
| 45 | UINT32 CoreStack;\r | |
| 46 | UINT32 StatusCode;\r | |
| 47 | UINT32 Reserved2[8];\r | |
| 48 | FSP_PLAT_DATA PlatformData;\r | |
| 49 | FSP_INFO_HEADER *FspInfoHeader;\r | |
| 50 | VOID *UpdDataPtr;\r | |
| 51 | VOID *TempRamInitUpdPtr;\r | |
| 52 | VOID *MemoryInitUpdPtr;\r | |
| 53 | VOID *SiliconInitUpdPtr;\r | |
| 54 | UINT8 ApiIdx;\r | |
| a2e61f34 | 55 | UINT8 FspMode; // 0: FSP in API mode; 1: FSP in DISPATCH mode\r |
| f2cdb268 CC |
56 | UINT8 OnSeparateStack;\r |
| 57 | UINT8 Reserved3;\r | |
| 58 | UINT32 NumberOfPhases;\r | |
| 59 | UINT32 PhasesExecuted;\r | |
| 60 | UINT8 Reserved4[20];\r | |
| cf1d4549 JY |
61 | UINT32 PerfSig;\r |
| 62 | UINT16 PerfLen;\r | |
| f2cdb268 | 63 | UINT16 Reserved5;\r |
| cf1d4549 JY |
64 | UINT32 PerfIdx;\r |
| 65 | UINT64 PerfData[32];\r | |
| 66 | } FSP_GLOBAL_DATA;\r | |
| 67 | \r | |
| 68 | #pragma pack()\r | |
| 69 | \r | |
| 70 | #endif\r |