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1 | /** @file\r |
2 | Intel FSP Header File definition from Intel Firmware Support Package External\r | |
3 | Architecture Specification v2.0.\r | |
4 | \r | |
e37bb20c | 5 | Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r |
cf1d4549 JY |
6 | This program and the accompanying materials\r |
7 | are licensed and made available under the terms and conditions of the BSD License\r | |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php.\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
14 | **/\r | |
15 | \r | |
16 | #ifndef __FSP_HEADER_FILE_H__\r | |
17 | #define __FSP_HEADER_FILE_H__\r | |
18 | \r | |
19 | #define FSP_HEADER_REVISION_3 3\r | |
20 | \r | |
21 | #define FSPE_HEADER_REVISION_1 1\r | |
22 | #define FSPP_HEADER_REVISION_1 1\r | |
23 | \r | |
24 | ///\r | |
25 | /// Fixed FSP header offset in the FSP image\r | |
26 | ///\r | |
27 | #define FSP_INFO_HEADER_OFF 0x94\r | |
28 | \r | |
29 | #define OFFSET_IN_FSP_INFO_HEADER(x) (UINT32)&((FSP_INFO_HEADER *)(UINTN)0)->x\r | |
30 | \r | |
31 | #define FSP_INFO_HEADER_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'H')\r | |
32 | \r | |
33 | #pragma pack(1)\r | |
34 | \r | |
35 | ///\r | |
36 | /// FSP Information Header as described in FSP v2.0 Spec section 5.1.1.\r | |
37 | ///\r | |
38 | typedef struct {\r | |
39 | ///\r | |
40 | /// Byte 0x00: Signature ('FSPH') for the FSP Information Header.\r | |
41 | ///\r | |
42 | UINT32 Signature;\r | |
43 | ///\r | |
44 | /// Byte 0x04: Length of the FSP Information Header.\r | |
45 | ///\r | |
46 | UINT32 HeaderLength;\r | |
47 | ///\r | |
48 | /// Byte 0x08: Reserved.\r | |
49 | ///\r | |
50 | UINT8 Reserved1[2];\r | |
51 | ///\r | |
52 | /// Byte 0x0A: Indicates compliance with a revision of this specification in the BCD format.\r | |
53 | ///\r | |
54 | UINT8 SpecVersion;\r | |
55 | ///\r | |
56 | /// Byte 0x0B: Revision of the FSP Information Header.\r | |
57 | ///\r | |
58 | UINT8 HeaderRevision;\r | |
59 | ///\r | |
60 | /// Byte 0x0C: Revision of the FSP binary.\r | |
61 | ///\r | |
62 | UINT32 ImageRevision;\r | |
63 | ///\r | |
64 | /// Byte 0x10: Signature string that will help match the FSP Binary to a supported HW configuration.\r | |
65 | ///\r | |
66 | CHAR8 ImageId[8];\r | |
67 | ///\r | |
68 | /// Byte 0x18: Size of the entire FSP binary.\r | |
69 | ///\r | |
70 | UINT32 ImageSize;\r | |
71 | ///\r | |
72 | /// Byte 0x1C: FSP binary preferred base address.\r | |
73 | ///\r | |
74 | UINT32 ImageBase;\r | |
75 | ///\r | |
76 | /// Byte 0x20: Attribute for the FSP binary.\r | |
77 | ///\r | |
78 | UINT16 ImageAttribute;\r | |
79 | ///\r | |
80 | /// Byte 0x22: Attributes of the FSP Component.\r | |
81 | ///\r | |
82 | UINT16 ComponentAttribute;\r | |
83 | ///\r | |
84 | /// Byte 0x24: Offset of the FSP configuration region.\r | |
85 | ///\r | |
86 | UINT32 CfgRegionOffset;\r | |
87 | ///\r | |
88 | /// Byte 0x28: Size of the FSP configuration region.\r | |
89 | ///\r | |
90 | UINT32 CfgRegionSize;\r | |
91 | ///\r | |
92 | /// Byte 0x2C: Reserved2.\r | |
93 | ///\r | |
94 | UINT32 Reserved2;\r | |
95 | ///\r | |
96 | /// Byte 0x30: The offset for the API to setup a temporary stack till the memory is initialized.\r | |
97 | ///\r | |
98 | UINT32 TempRamInitEntryOffset;\r | |
99 | ///\r | |
100 | /// Byte 0x34: Reserved3.\r | |
101 | ///\r | |
102 | UINT32 Reserved3;\r | |
103 | ///\r | |
104 | /// Byte 0x38: The offset for the API to inform the FSP about the different stages in the boot process.\r | |
105 | ///\r | |
106 | UINT32 NotifyPhaseEntryOffset;\r | |
107 | ///\r | |
108 | /// Byte 0x3C: The offset for the API to initialize the memory.\r | |
109 | ///\r | |
110 | UINT32 FspMemoryInitEntryOffset;\r | |
111 | ///\r | |
112 | /// Byte 0x40: The offset for the API to tear down temporary RAM.\r | |
113 | ///\r | |
114 | UINT32 TempRamExitEntryOffset;\r | |
115 | ///\r | |
116 | /// Byte 0x44: The offset for the API to initialize the CPU and chipset.\r | |
117 | ///\r | |
118 | UINT32 FspSiliconInitEntryOffset;\r | |
119 | } FSP_INFO_HEADER;\r | |
120 | \r | |
121 | ///\r | |
122 | /// Signature of the FSP Extended Header\r | |
123 | ///\r | |
124 | #define FSP_INFO_EXTENDED_HEADER_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'E')\r | |
125 | \r | |
126 | ///\r | |
127 | /// FSP Information Extended Header as described in FSP v2.0 Spec section 5.1.2.\r | |
128 | ///\r | |
129 | typedef struct {\r | |
130 | ///\r | |
131 | /// Byte 0x00: Signature ('FSPE') for the FSP Extended Information Header.\r | |
132 | ///\r | |
133 | UINT32 Signature;\r | |
134 | ///\r | |
135 | /// Byte 0x04: Length of the table in bytes, including all additional FSP producer defined data.\r | |
136 | ///\r | |
137 | UINT32 Length;\r | |
138 | ///\r | |
139 | /// Byte 0x08: FSP producer defined revision of the table.\r | |
140 | ///\r | |
141 | UINT8 Revision;\r | |
142 | ///\r | |
143 | /// Byte 0x09: Reserved for future use.\r | |
144 | ///\r | |
145 | UINT8 Reserved;\r | |
146 | ///\r | |
e37bb20c | 147 | /// Byte 0x0A: FSP producer identification string\r |
cf1d4549 JY |
148 | ///\r |
149 | CHAR8 FspProducerId[6];\r | |
150 | ///\r | |
151 | /// Byte 0x10: FSP producer implementation revision number. Larger numbers are assumed to be newer revisions.\r | |
152 | ///\r | |
153 | UINT32 FspProducerRevision;\r | |
154 | ///\r | |
155 | /// Byte 0x14: Size of the FSP producer defined data (n) in bytes.\r | |
156 | ///\r | |
157 | UINT32 FspProducerDataSize;\r | |
158 | ///\r | |
159 | /// Byte 0x18: FSP producer defined data of size (n) defined by FspProducerDataSize.\r | |
160 | ///\r | |
161 | } FSP_INFO_EXTENDED_HEADER;\r | |
162 | \r | |
163 | //\r | |
164 | // A generic table search algorithm for additional tables can be implemented with a\r | |
165 | // signature search algorithm until a terminator signature 'FSPP' is found.\r | |
166 | //\r | |
167 | #define FSP_FSPP_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'P')\r | |
168 | #define FSP_PATCH_TABLE_SIGNATURE FSP_FSPP_SIGNATURE\r | |
169 | \r | |
170 | ///\r | |
171 | /// FSP Patch Table as described in FSP v2.0 Spec section 5.1.5.\r | |
172 | ///\r | |
173 | typedef struct {\r | |
174 | ///\r | |
175 | /// Byte 0x00: FSP Patch Table Signature "FSPP".\r | |
176 | ///\r | |
177 | UINT32 Signature;\r | |
178 | ///\r | |
179 | /// Byte 0x04: Size including the PatchData.\r | |
180 | ///\r | |
181 | UINT16 HeaderLength;\r | |
182 | ///\r | |
183 | /// Byte 0x06: Revision is set to 0x01.\r | |
184 | ///\r | |
185 | UINT8 HeaderRevision;\r | |
186 | ///\r | |
187 | /// Byte 0x07: Reserved for future use.\r | |
188 | ///\r | |
189 | UINT8 Reserved;\r | |
190 | ///\r | |
191 | /// Byte 0x08: Number of entries to Patch.\r | |
192 | ///\r | |
193 | UINT32 PatchEntryNum;\r | |
194 | ///\r | |
195 | /// Byte 0x0C: Patch Data.\r | |
196 | ///\r | |
197 | //UINT32 PatchData[];\r | |
198 | } FSP_PATCH_TABLE;\r | |
199 | \r | |
200 | #pragma pack()\r | |
201 | \r | |
202 | extern EFI_GUID gFspHeaderFileGuid;\r | |
203 | \r | |
204 | #endif\r |