projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| cf1d4549 JY |
1 | /** @file\r |
| 2 | \r | |
| 3 | Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r | |
| 9672cd30 | 4 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| cf1d4549 JY |
5 | \r |
| 6 | **/\r | |
| 7 | \r | |
| 8 | #ifndef _CACHE_LIB_H_\r | |
| 9 | #define _CACHE_LIB_H_\r | |
| 10 | \r | |
| 11 | //\r | |
| 12 | // EFI_MEMORY_CACHE_TYPE\r | |
| 13 | //\r | |
| 14 | typedef INT32 EFI_MEMORY_CACHE_TYPE;\r | |
| 15 | \r | |
| 111f2228 MK |
16 | #define EFI_CACHE_UNCACHEABLE 0\r |
| 17 | #define EFI_CACHE_WRITECOMBINING 1\r | |
| 18 | #define EFI_CACHE_WRITETHROUGH 4\r | |
| 19 | #define EFI_CACHE_WRITEPROTECTED 5\r | |
| 20 | #define EFI_CACHE_WRITEBACK 6\r | |
| cf1d4549 JY |
21 | \r |
| 22 | /**\r | |
| 23 | Reset all the MTRRs to a known state.\r | |
| 24 | \r | |
| 25 | @retval EFI_SUCCESS All MTRRs have been reset successfully.\r | |
| 26 | \r | |
| 27 | **/\r | |
| 28 | EFI_STATUS\r | |
| 29 | EFIAPI\r | |
| 30 | ResetCacheAttributes (\r | |
| 31 | VOID\r | |
| 32 | );\r | |
| 33 | \r | |
| 34 | /**\r | |
| 35 | Given the memory range and cache type, programs the MTRRs.\r | |
| 36 | \r | |
| 37 | @param[in] MemoryAddress Base Address of Memory to program MTRR.\r | |
| 38 | @param[in] MemoryLength Length of Memory to program MTRR.\r | |
| 39 | @param[in] MemoryCacheType Cache Type.\r | |
| 40 | \r | |
| 41 | @retval EFI_SUCCESS Mtrr are set successfully.\r | |
| 42 | @retval EFI_LOAD_ERROR No empty MTRRs to use.\r | |
| 43 | @retval EFI_INVALID_PARAMETER The input parameter is not valid.\r | |
| 44 | @retval others An error occurs when setting MTTR.\r | |
| 45 | \r | |
| 46 | **/\r | |
| 47 | EFI_STATUS\r | |
| 48 | EFIAPI\r | |
| 49 | SetCacheAttributes (\r | |
| 111f2228 MK |
50 | IN EFI_PHYSICAL_ADDRESS MemoryAddress,\r |
| 51 | IN UINT64 MemoryLength,\r | |
| 52 | IN EFI_MEMORY_CACHE_TYPE MemoryCacheType\r | |
| cf1d4549 JY |
53 | );\r |
| 54 | \r | |
| 55 | #endif\r |