projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 3837e2e0 CC |
1 | /** @file\r |
| 2 | Header file for FSP-M Arch Config PPI for Dispatch mode\r | |
| 3 | \r | |
| 3837e2e0 CC |
4 | Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>\r |
| 5 | \r | |
| 9672cd30 | 6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| 3837e2e0 CC |
7 | \r |
| 8 | **/\r | |
| 9 | \r | |
| 10 | #ifndef _FSPM_ARCH_CONFIG_PPI_H_\r | |
| 11 | #define _FSPM_ARCH_CONFIG_PPI_H_\r | |
| 12 | \r | |
| 111f2228 | 13 | #define FSPM_ARCH_CONFIG_PPI_REVISION 0x1\r |
| 3837e2e0 CC |
14 | \r |
| 15 | ///\r | |
| 16 | /// Global ID for the FSPM_ARCH_CONFIG_PPI.\r | |
| 17 | ///\r | |
| 18 | #define FSPM_ARCH_CONFIG_GUID \\r | |
| 19 | { \\r | |
| 20 | 0x824d5a3a, 0xaf92, 0x4c0c, { 0x9f, 0x19, 0x19, 0x52, 0x6d, 0xca, 0x4a, 0xbb } \\r | |
| 21 | }\r | |
| 22 | \r | |
| 23 | ///\r | |
| 24 | /// This PPI provides FSP-M Arch Config PPI.\r | |
| 25 | ///\r | |
| 26 | typedef struct {\r | |
| 27 | ///\r | |
| 28 | /// Revision of the structure\r | |
| 29 | ///\r | |
| 111f2228 MK |
30 | UINT8 Revision;\r |
| 31 | UINT8 Reserved[3];\r | |
| 3837e2e0 CC |
32 | ///\r |
| 33 | /// Pointer to the non-volatile storage (NVS) data buffer.\r | |
| 34 | /// If it is NULL it indicates the NVS data is not available.\r | |
| 35 | ///\r | |
| 111f2228 | 36 | VOID *NvsBufferPtr;\r |
| 3837e2e0 CC |
37 | ///\r |
| 38 | /// Size of memory to be reserved by FSP below "top\r | |
| 39 | /// of low usable memory" for bootloader usage.\r | |
| 40 | ///\r | |
| 111f2228 MK |
41 | UINT32 BootLoaderTolumSize;\r |
| 42 | UINT8 Reserved1[4];\r | |
| 3837e2e0 CC |
43 | } FSPM_ARCH_CONFIG_PPI;\r |
| 44 | \r | |
| 111f2228 | 45 | extern EFI_GUID gFspmArchConfigPpiGuid;\r |
| 3837e2e0 CC |
46 | \r |
| 47 | #endif // _FSPM_ARCH_CONFIG_PPI_H_\r |