projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| cf1d4549 JY |
1 | ## @file\r |
| 2 | # Provides drivers and definitions to support fsp in EDKII bios.\r | |
| 3 | #\r | |
| 4 | # Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r | |
| 5 | # This program and the accompanying materials are licensed and made available under\r | |
| 6 | # the terms and conditions of the BSD License that accompanies this distribution.\r | |
| 7 | # The full text of the license may be found at\r | |
| 8 | # http://opensource.org/licenses/bsd-license.php.\r | |
| 9 | #\r | |
| 10 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 11 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 12 | #\r | |
| 13 | ##\r | |
| 14 | \r | |
| 15 | [Defines]\r | |
| 16 | DEC_SPECIFICATION = 0x00010005\r | |
| 17 | PACKAGE_NAME = IntelFsp2WrapperPkg\r | |
| 18 | PACKAGE_GUID = FAFE06D4-7245-42D7-9FD2-E5D5E36AB0A0\r | |
| 19 | PACKAGE_VERSION = 0.1\r | |
| 20 | \r | |
| 21 | [Includes]\r | |
| 22 | Include\r | |
| 23 | \r | |
| 24 | [LibraryClasses]\r | |
| 25 | ## @libraryclass Provide FSP API related function.\r | |
| 26 | FspWrapperApiLib|Include/Library/FspWrapperApiLib.h\r | |
| 27 | FspWrapperApiTestLib|Include/Library/FspWrapperApiTestLib.h\r | |
| 28 | \r | |
| 29 | ## @libraryclass Provide FSP hob process related function.\r | |
| 30 | FspWrapperHobProcessLib|Include/Library/FspWrapperHobProcessLib.h\r | |
| 31 | \r | |
| 32 | ## @libraryclass Provide FSP platform related function.\r | |
| 33 | FspWrapperPlatformLib|Include/Library/FspWrapperPlatformLib.h\r | |
| 34 | \r | |
| 35 | [Guids]\r | |
| 36 | #\r | |
| 37 | # GUID defined in package\r | |
| 38 | #\r | |
| 6f6bf5c7 | 39 | gIntelFsp2WrapperTokenSpaceGuid = { 0xa34cf082, 0xf50, 0x4f0d, { 0x89, 0x8a, 0x3d, 0x39, 0x30, 0x2b, 0xc5, 0x1e } }\r |
| cf1d4549 JY |
40 | gFspApiPerformanceGuid = { 0xc9122295, 0x56ed, 0x4d4e, { 0x06, 0xa6, 0x50, 0x8d, 0x89, 0x4d, 0x3e, 0x40 } }\r |
| 41 | gFspHobGuid = { 0x6d86fb36, 0xba90, 0x472c, { 0xb5, 0x83, 0x3f, 0xbe, 0xd3, 0xfb, 0x20, 0x9a } }\r | |
| 42 | \r | |
| 43 | [Ppis]\r | |
| 44 | gFspSiliconInitDonePpiGuid = { 0x4eb6e09c, 0xd256, 0x4e1e, { 0xb5, 0x0a, 0x87, 0x4b, 0xd2, 0x84, 0xb3, 0xde } }\r | |
| 45 | gTopOfTemporaryRamPpiGuid = { 0x2f3962b2, 0x57c5, 0x44ec, { 0x9e, 0xfc, 0xa6, 0x9f, 0xd3, 0x02, 0x03, 0x2b } }\r | |
| 46 | \r | |
| 47 | [Protocols]\r | |
| 48 | gAddPerfRecordProtocolGuid = { 0xc4a58d6d, 0x3677, 0x49cb, { 0xa0, 0x0a, 0x94, 0x70, 0x76, 0x5f, 0xb5, 0x5e } }\r | |
| 49 | \r | |
| 50 | ################################################################################\r | |
| 51 | #\r | |
| 52 | # PCD Declarations section - list of all PCDs Declared by this Package\r | |
| 53 | # Only this package should be providing the\r | |
| 54 | # declaration, other packages should not.\r | |
| 55 | #\r | |
| 56 | ################################################################################\r | |
| 57 | [PcdsFixedAtBuild, PcdsPatchableInModule]\r | |
| 58 | ## Provides the memory mapped base address of the BIOS CodeCache Flash Device.\r | |
| 6f6bf5c7 | 59 | gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress|0xFFE00000|UINT32|0x10000001\r |
| cf1d4549 | 60 | ## Provides the size of the BIOS Flash Device.\r |
| 6f6bf5c7 | 61 | gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00200000|UINT32|0x10000002\r |
| cf1d4549 JY |
62 | \r |
| 63 | ## Indicates the base address of the first Microcode Patch in the Microcode Region\r | |
| 6f6bf5c7 JY |
64 | gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x10000005\r |
| 65 | gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x10000006\r | |
| cf1d4549 | 66 | ## Indicates the offset of the Cpu Microcode.\r |
| 6f6bf5c7 | 67 | gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset|0x90|UINT32|0x10000007\r |
| cf1d4549 JY |
68 | \r |
| 69 | ## Indicate the PEI memory size platform want to report\r | |
| 6f6bf5c7 | 70 | gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x1800000|UINT32|0x40000004\r |
| cf1d4549 | 71 | ## Indicate the PEI memory size platform want to report\r |
| 6f6bf5c7 | 72 | gIntelFsp2WrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UINT32|0x40000005\r |
| cf1d4549 JY |
73 | \r |
| 74 | ## This is the base address of FSP-T/M/S\r | |
| 6f6bf5c7 JY |
75 | gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT32|0x00000300\r |
| 76 | gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00000301\r | |
| 6d40ea81 SY |
77 | \r |
| 78 | [PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx]\r | |
| 79 | gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT32|0x00001001\r | |
| 80 |