IntelFsp2WrapperPkg: Support FSP Dispatch mode
[mirror_edk2.git] / IntelFsp2WrapperPkg / Library / BaseFspWrapperApiLib / FspWrapperApiLib.c
CommitLineData
cf1d4549
JY
1/** @file\r
2 Provide FSP API related function.\r
3\r
d953f4f1 4 Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r
cf1d4549
JY
5 This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php.\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#include <PiPei.h>\r
16\r
17#include <Library/FspWrapperApiLib.h>\r
18#include <Library/BaseLib.h>\r
19#include <Library/BaseMemoryLib.h>\r
20\r
21/**\r
22 Wrapper for a thunk to transition from long mode to compatibility mode to execute 32-bit code and then transit back to\r
23 long mode.\r
24\r
25 @param[in] Function The 32bit code entry to be executed.\r
26 @param[in] Param1 The first parameter to pass to 32bit code.\r
27 @param[in] Param2 The second parameter to pass to 32bit code.\r
28\r
29 @return EFI_STATUS.\r
30**/\r
31EFI_STATUS\r
32Execute32BitCode (\r
33 IN UINT64 Function,\r
34 IN UINT64 Param1,\r
35 IN UINT64 Param2\r
36 );\r
37\r
38/**\r
39 Find FSP header pointer.\r
40\r
41 @param[in] FlashFvFspBase Flash address of FSP FV.\r
42\r
43 @return FSP header pointer.\r
44**/\r
45FSP_INFO_HEADER *\r
46EFIAPI\r
47FspFindFspHeader (\r
48 IN EFI_PHYSICAL_ADDRESS FlashFvFspBase\r
49 )\r
50{\r
51 UINT8 *CheckPointer;\r
52\r
53 CheckPointer = (UINT8 *) (UINTN) FlashFvFspBase;\r
54\r
55 if (((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->Signature != EFI_FVH_SIGNATURE) {\r
56 return NULL;\r
57 }\r
58\r
59 if (((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->ExtHeaderOffset != 0) {\r
60 CheckPointer = CheckPointer + ((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->ExtHeaderOffset;\r
61 CheckPointer = CheckPointer + ((EFI_FIRMWARE_VOLUME_EXT_HEADER *)CheckPointer)->ExtHeaderSize;\r
62 CheckPointer = (UINT8 *) ALIGN_POINTER (CheckPointer, 8);\r
63 } else {\r
64 CheckPointer = CheckPointer + ((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->HeaderLength;\r
65 }\r
66\r
67\r
68 CheckPointer = CheckPointer + sizeof (EFI_FFS_FILE_HEADER);\r
69\r
70 if (((EFI_RAW_SECTION *)CheckPointer)->Type != EFI_SECTION_RAW) {\r
71 return NULL;\r
72 }\r
73\r
74 CheckPointer = CheckPointer + sizeof (EFI_RAW_SECTION);\r
75\r
76 return (FSP_INFO_HEADER *)CheckPointer;\r
77}\r
78\r
79/**\r
80 Call FSP API - FspNotifyPhase.\r
81\r
82 @param[in] NotifyPhaseParams Address pointer to the NOTIFY_PHASE_PARAMS structure.\r
83\r
84 @return EFI status returned by FspNotifyPhase API.\r
85**/\r
86EFI_STATUS\r
87EFIAPI\r
88CallFspNotifyPhase (\r
89 IN NOTIFY_PHASE_PARAMS *NotifyPhaseParams\r
90 )\r
91{\r
92 FSP_INFO_HEADER *FspHeader;\r
93 FSP_NOTIFY_PHASE NotifyPhaseApi;\r
94 EFI_STATUS Status;\r
95 BOOLEAN InterruptState;\r
96\r
97 FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspsBaseAddress));\r
98 if (FspHeader == NULL) {\r
99 return EFI_DEVICE_ERROR;\r
100 }\r
101\r
d953f4f1 102 NotifyPhaseApi = (FSP_NOTIFY_PHASE)((UINTN)FspHeader->ImageBase + FspHeader->NotifyPhaseEntryOffset);\r
cf1d4549
JY
103 InterruptState = SaveAndDisableInterrupts ();\r
104 Status = Execute32BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams, (UINTN)NULL);\r
105 SetInterruptState (InterruptState);\r
106\r
107 return Status;\r
108}\r
109\r
110/**\r
111 Call FSP API - FspMemoryInit.\r
112\r
113 @param[in] FspmUpdDataPtr Address pointer to the FSP_MEMORY_INIT_PARAMS structure.\r
114 @param[out] HobListPtr Address of the HobList pointer.\r
115\r
116 @return EFI status returned by FspMemoryInit API.\r
117**/\r
118EFI_STATUS\r
119EFIAPI\r
120CallFspMemoryInit (\r
121 IN VOID *FspmUpdDataPtr,\r
122 OUT VOID **HobListPtr\r
123 )\r
124{\r
125 FSP_INFO_HEADER *FspHeader;\r
126 FSP_MEMORY_INIT FspMemoryInitApi;\r
127 EFI_STATUS Status;\r
128 BOOLEAN InterruptState;\r
129\r
130 FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress));\r
131 if (FspHeader == NULL) {\r
132 return EFI_DEVICE_ERROR;\r
133 }\r
134\r
d953f4f1 135 FspMemoryInitApi = (FSP_MEMORY_INIT)((UINTN)FspHeader->ImageBase + FspHeader->FspMemoryInitEntryOffset);\r
cf1d4549
JY
136 InterruptState = SaveAndDisableInterrupts ();\r
137 Status = Execute32BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspmUpdDataPtr, (UINTN)HobListPtr);\r
138 SetInterruptState (InterruptState);\r
139\r
140 return Status;\r
141}\r
142\r
143/**\r
144 Call FSP API - TempRamExit.\r
145\r
146 @param[in] TempRamExitParam Address pointer to the TempRamExit parameters structure.\r
147\r
148 @return EFI status returned by TempRamExit API.\r
149**/\r
150EFI_STATUS\r
151EFIAPI\r
152CallTempRamExit (\r
153 IN VOID *TempRamExitParam\r
154 )\r
155{\r
156 FSP_INFO_HEADER *FspHeader;\r
157 FSP_TEMP_RAM_EXIT TempRamExitApi;\r
158 EFI_STATUS Status;\r
159 BOOLEAN InterruptState;\r
160\r
161 FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress));\r
162 if (FspHeader == NULL) {\r
163 return EFI_DEVICE_ERROR;\r
164 }\r
165\r
d953f4f1 166 TempRamExitApi = (FSP_TEMP_RAM_EXIT)((UINTN)FspHeader->ImageBase + FspHeader->TempRamExitEntryOffset);\r
cf1d4549
JY
167 InterruptState = SaveAndDisableInterrupts ();\r
168 Status = Execute32BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam, (UINTN)NULL);\r
169 SetInterruptState (InterruptState);\r
170\r
171 return Status;\r
172}\r
173\r
174/**\r
175 Call FSP API - FspSiliconInit.\r
176\r
177 @param[in] FspsUpdDataPtr Address pointer to the Silicon Init parameters structure.\r
178\r
179 @return EFI status returned by FspSiliconInit API.\r
180**/\r
181EFI_STATUS\r
182EFIAPI\r
183CallFspSiliconInit (\r
184 IN VOID *FspsUpdDataPtr\r
185 )\r
186{\r
187 FSP_INFO_HEADER *FspHeader;\r
188 FSP_SILICON_INIT FspSiliconInitApi;\r
189 EFI_STATUS Status;\r
190 BOOLEAN InterruptState;\r
191\r
192 FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspsBaseAddress));\r
193 if (FspHeader == NULL) {\r
194 return EFI_DEVICE_ERROR;\r
195 }\r
196\r
d953f4f1 197 FspSiliconInitApi = (FSP_SILICON_INIT)((UINTN)FspHeader->ImageBase + FspHeader->FspSiliconInitEntryOffset);\r
cf1d4549
JY
198 InterruptState = SaveAndDisableInterrupts ();\r
199 Status = Execute32BitCode ((UINTN)FspSiliconInitApi, (UINTN)FspsUpdDataPtr, (UINTN)NULL);\r
200 SetInterruptState (InterruptState);\r
201\r
202 return Status;\r
203}\r