ArmPkg: only attempt buildin MmCommunicationDxe for AArch64
[mirror_edk2.git] / IntelFsp2WrapperPkg / Library / SecFspWrapperPlatformSecLibSample / FspWrapperPlatformSecLibSample.c
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1/** @file\r
2 Sample to provide FSP wrapper platform sec related function.\r
3\r
4 Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r
512e23a3 5 SPDX-License-Identifier: BSD-2-Clause-Patent\r
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6\r
7**/\r
8\r
9#include <PiPei.h>\r
10\r
11#include <Ppi/SecPlatformInformation.h>\r
12#include <Ppi/SecPerformance.h>\r
13\r
14#include <Library/LocalApicLib.h>\r
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15#include <Library/DebugLib.h>\r
16#include <Library/BaseMemoryLib.h>\r
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17\r
18/**\r
19 This interface conveys state information out of the Security (SEC) phase into PEI.\r
20\r
21 @param[in] PeiServices Pointer to the PEI Services Table.\r
22 @param[in,out] StructureSize Pointer to the variable describing size of the input buffer.\r
23 @param[out] PlatformInformationRecord Pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.\r
24\r
25 @retval EFI_SUCCESS The data was successfully returned.\r
26 @retval EFI_BUFFER_TOO_SMALL The buffer was too small.\r
27\r
28**/\r
29EFI_STATUS\r
30EFIAPI\r
31SecPlatformInformation (\r
32 IN CONST EFI_PEI_SERVICES **PeiServices,\r
33 IN OUT UINT64 *StructureSize,\r
34 OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord\r
35 );\r
36\r
37/**\r
38 This interface conveys performance information out of the Security (SEC) phase into PEI.\r
39\r
40 This service is published by the SEC phase. The SEC phase handoff has an optional\r
41 EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed from SEC into the\r
42 PEI Foundation. As such, if the platform supports collecting performance data in SEC,\r
43 this information is encapsulated into the data structure abstracted by this service.\r
44 This information is collected for the boot-strap processor (BSP) on IA-32.\r
45\r
46 @param[in] PeiServices The pointer to the PEI Services Table.\r
47 @param[in] This The pointer to this instance of the PEI_SEC_PERFORMANCE_PPI.\r
48 @param[out] Performance The pointer to performance data collected in SEC phase.\r
49\r
50 @retval EFI_SUCCESS The data was successfully returned.\r
51\r
52**/\r
53EFI_STATUS\r
54EFIAPI\r
55SecGetPerformance (\r
56 IN CONST EFI_PEI_SERVICES **PeiServices,\r
57 IN PEI_SEC_PERFORMANCE_PPI *This,\r
58 OUT FIRMWARE_SEC_PERFORMANCE *Performance\r
59 );\r
60\r
61PEI_SEC_PERFORMANCE_PPI mSecPerformancePpi = {\r
62 SecGetPerformance\r
63};\r
64\r
65EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformPpi[] = {\r
66 {\r
67 EFI_PEI_PPI_DESCRIPTOR_PPI,\r
68 &gTopOfTemporaryRamPpiGuid,\r
69 NULL // To be patched later.\r
70 },\r
71 {\r
72 EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,\r
73 &gPeiSecPerformancePpiGuid,\r
74 &mSecPerformancePpi\r
75 },\r
76};\r
77\r
78/**\r
79 A developer supplied function to perform platform specific operations.\r
80\r
81 It's a developer supplied function to perform any operations appropriate to a\r
82 given platform. It's invoked just before passing control to PEI core by SEC\r
83 core. Platform developer may modify the SecCoreData passed to PEI Core.\r
84 It returns a platform specific PPI list that platform wishes to pass to PEI core.\r
85 The Generic SEC core module will merge this list to join the final list passed to\r
86 PEI core.\r
87\r
88 @param[in,out] SecCoreData The same parameter as passing to PEI core. It\r
89 could be overridden by this function.\r
90\r
91 @return The platform specific PPI list to be passed to PEI core or\r
92 NULL if there is no need of such platform specific PPI list.\r
93\r
94**/\r
95EFI_PEI_PPI_DESCRIPTOR *\r
96EFIAPI\r
97SecPlatformMain (\r
98 IN OUT EFI_SEC_PEI_HAND_OFF *SecCoreData\r
99 )\r
100{\r
101 EFI_PEI_PPI_DESCRIPTOR *PpiList;\r
102\r
103 DEBUG((DEBUG_INFO, "SecPlatformMain\n"));\r
104\r
105 DEBUG((DEBUG_INFO, "BootFirmwareVolumeBase - 0x%x\n", SecCoreData->BootFirmwareVolumeBase));\r
106 DEBUG((DEBUG_INFO, "BootFirmwareVolumeSize - 0x%x\n", SecCoreData->BootFirmwareVolumeSize));\r
107 DEBUG((DEBUG_INFO, "TemporaryRamBase - 0x%x\n", SecCoreData->TemporaryRamBase));\r
108 DEBUG((DEBUG_INFO, "TemporaryRamSize - 0x%x\n", SecCoreData->TemporaryRamSize));\r
109 DEBUG((DEBUG_INFO, "PeiTemporaryRamBase - 0x%x\n", SecCoreData->PeiTemporaryRamBase));\r
110 DEBUG((DEBUG_INFO, "PeiTemporaryRamSize - 0x%x\n", SecCoreData->PeiTemporaryRamSize));\r
111 DEBUG((DEBUG_INFO, "StackBase - 0x%x\n", SecCoreData->StackBase));\r
112 DEBUG((DEBUG_INFO, "StackSize - 0x%x\n", SecCoreData->StackSize));\r
113\r
114 InitializeApicTimer (0, (UINT32) -1, TRUE, 5);\r
115\r
116 //\r
117 // Use middle of Heap as temp buffer, it will be copied by caller.\r
118 // Do not use Stack, because it will cause wrong calculation on stack by PeiCore\r
119 //\r
120 PpiList = (VOID *)((UINTN)SecCoreData->PeiTemporaryRamBase + (UINTN)SecCoreData->PeiTemporaryRamSize/2);\r
121 CopyMem (PpiList, mPeiSecPlatformPpi, sizeof(mPeiSecPlatformPpi));\r
122\r
123 //\r
124 // Patch TopOfTemporaryRamPpi\r
125 //\r
126 PpiList[0].Ppi = (VOID *)((UINTN)SecCoreData->TemporaryRamBase + SecCoreData->TemporaryRamSize);\r
127\r
128 return PpiList;\r
129}\r