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1/** @file\r
2 Intel FSP Info Header definition from Intel Firmware Support Package External\r
3 Architecture Specification, April 2014, revision 001.\r
4\r
d5fb1edf 5 Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
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6 This program and the accompanying materials\r
7 are licensed and made available under the terms and conditions of the BSD License\r
8 which accompanies this distribution. The full text of the license may be found at\r
9 http://opensource.org/licenses/bsd-license.php.\r
10\r
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13\r
14**/\r
15\r
16#ifndef _FSP_INFO_HEADER_H_\r
17#define _FSP_INFO_HEADER_H_\r
18\r
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19#define FSP_HEADER_REVISION_1 1\r
20#define FSP_HEADER_REVISION_2 2\r
21\r
22#define FSPE_HEADER_REVISION_1 1\r
23#define FSPP_HEADER_REVISION_1 1\r
24\r
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25///\r
26/// Fixed FSP header offset in the FSP image\r
27///\r
28#define FSP_INFO_HEADER_OFF 0x94\r
29\r
30#define OFFSET_IN_FSP_INFO_HEADER(x) (UINT32)&((FSP_INFO_HEADER *)(UINTN)0)->x\r
31\r
32#pragma pack(1)\r
33\r
34typedef struct {\r
35 ///\r
d5fb1edf 36 /// Byte 0x00: Signature ('FSPH') for the FSP Information Header\r
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37 ///\r
38 UINT32 Signature;\r
39 ///\r
d5fb1edf 40 /// Byte 0x04: Length of the FSP Information Header\r
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41 ///\r
42 UINT32 HeaderLength;\r
43 ///\r
d5fb1edf 44 /// Byte 0x08: Reserved\r
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45 ///\r
46 UINT8 Reserved1[3];\r
47 ///\r
d5fb1edf 48 /// Byte 0x0B: Revision of the FSP Information Header\r
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49 ///\r
50 UINT8 HeaderRevision;\r
51 ///\r
d5fb1edf 52 /// Byte 0x0C: Revision of the FSP binary\r
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53 ///\r
54 UINT32 ImageRevision;\r
55\r
56\r
57 ///\r
d5fb1edf 58 /// Byte 0x10: Signature string that will help match the FSP Binary to a supported\r
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59 /// hardware configuration.\r
60 ///\r
61 CHAR8 ImageId[8];\r
62 ///\r
d5fb1edf 63 /// Byte 0x18: Size of the entire FSP binary\r
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64 ///\r
65 UINT32 ImageSize;\r
66 ///\r
d5fb1edf 67 /// Byte 0x18: FSP binary preferred base address\r
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68 ///\r
69 UINT32 ImageBase;\r
70\r
71\r
72 ///\r
d5fb1edf 73 /// Byte 0x20: Attribute for the FSP binary\r
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74 ///\r
75 UINT32 ImageAttribute;\r
76 ///\r
d5fb1edf 77 /// Byte 0x24: Offset of the FSP configuration region\r
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78 ///\r
79 UINT32 CfgRegionOffset;\r
80 ///\r
d5fb1edf 81 /// Byte 0x24: Size of the FSP configuration region\r
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82 ///\r
83 UINT32 CfgRegionSize;\r
84 ///\r
d5fb1edf 85 /// Byte 0x2C: Number of API entries this FSP supports\r
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86 ///\r
87 UINT32 ApiEntryNum;\r
88\r
89\r
90 ///\r
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91 /// Byte 0x30: The offset for the API to setup a temporary stack till the memory\r
92 /// is initialized.\r
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93 ///\r
94 UINT32 TempRamInitEntryOffset;\r
95 ///\r
d5fb1edf 96 /// Byte 0x34: The offset for the API to initialize the CPU and the chipset (SOC)\r
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97 ///\r
98 UINT32 FspInitEntryOffset;\r
99 ///\r
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100 /// Byte 0x38: The offset for the API to inform the FSP about the different stages\r
101 /// in the boot process\r
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102 ///\r
103 UINT32 NotifyPhaseEntryOffset;\r
d5fb1edf 104\r
a33a2f62 105 ///\r
d5fb1edf 106 /// Below field is added in FSP 1.1\r
a33a2f62 107 ///\r
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108\r
109 ///\r
110 /// Byte 0x3C: The offset for the API to initialize the memory\r
111 ///\r
112 UINT32 FspMemoryInitEntryOffset;\r
113 ///\r
114 /// Byte 0x40: The offset for the API to tear down temporary RAM\r
115 ///\r
116 UINT32 TempRamExitEntryOffset;\r
117 ///\r
118 /// Byte 0x44: The offset for the API to initialize the CPU and chipset\r
119 ///\r
120 UINT32 FspSiliconInitEntryOffset;\r
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121\r
122} FSP_INFO_HEADER;\r
123\r
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124///\r
125/// Below structure is added in FSP 1.1\r
126///\r
127typedef struct {\r
128 ///\r
129 /// Byte 0x00: Signature ('FSPE') for the FSP Extended Information Header\r
130 ///\r
131 UINT32 Signature;\r
132 ///\r
133 /// Byte 0x04: Length of the FSP Extended Header\r
134 ///\r
135 UINT32 HeaderLength;\r
136 ///\r
137 /// Byte 0x08: Revision of the FSP Extended Header\r
138 ///\r
139 UINT8 Revision;\r
140 ///\r
141 /// Byte 0x09: Reserved for future use.\r
142 ///\r
143 UINT8 Reserved;\r
144 ///\r
145 /// Byte 0x0A: An OEM-supplied string that defines the OEM\r
146 ///\r
147 CHAR8 OemId[6];\r
148 ///\r
149 /// Byte 0x10: An OEM-supplied revision number. Larger numbers are assumed to be newer revisions.\r
150 ///\r
151 UINT32 OemRevision;\r
152\r
153} FSP_EXTENTED_HEADER;\r
154\r
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155#pragma pack()\r
156\r
157#endif\r