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1/** @file\r
2 Intel FSP Info Header definition from Intel Firmware Support Package External\r
3b17b245 3 Architecture Specification v1.1, April 2015, revision 001.\r
a33a2f62 4\r
d5fb1edf 5 Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
16a16ea6 6 SPDX-License-Identifier: BSD-2-Clause-Patent\r
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7\r
8**/\r
9\r
10#ifndef _FSP_INFO_HEADER_H_\r
11#define _FSP_INFO_HEADER_H_\r
12\r
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13#define FSP_HEADER_REVISION_1 1\r
14#define FSP_HEADER_REVISION_2 2\r
15\r
16#define FSPE_HEADER_REVISION_1 1\r
17#define FSPP_HEADER_REVISION_1 1\r
18\r
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19///\r
20/// Fixed FSP header offset in the FSP image\r
21///\r
22#define FSP_INFO_HEADER_OFF 0x94\r
23\r
24#define OFFSET_IN_FSP_INFO_HEADER(x) (UINT32)&((FSP_INFO_HEADER *)(UINTN)0)->x\r
25\r
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26#define FSP_INFO_HEADER_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'H')\r
27\r
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28#pragma pack(1)\r
29\r
30typedef struct {\r
31 ///\r
d5fb1edf 32 /// Byte 0x00: Signature ('FSPH') for the FSP Information Header\r
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33 ///\r
34 UINT32 Signature;\r
35 ///\r
d5fb1edf 36 /// Byte 0x04: Length of the FSP Information Header\r
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37 ///\r
38 UINT32 HeaderLength;\r
39 ///\r
d5fb1edf 40 /// Byte 0x08: Reserved\r
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41 ///\r
42 UINT8 Reserved1[3];\r
43 ///\r
d5fb1edf 44 /// Byte 0x0B: Revision of the FSP Information Header\r
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45 ///\r
46 UINT8 HeaderRevision;\r
47 ///\r
d5fb1edf 48 /// Byte 0x0C: Revision of the FSP binary\r
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49 ///\r
50 UINT32 ImageRevision;\r
51\r
52\r
53 ///\r
d5fb1edf 54 /// Byte 0x10: Signature string that will help match the FSP Binary to a supported\r
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55 /// hardware configuration.\r
56 ///\r
57 CHAR8 ImageId[8];\r
58 ///\r
d5fb1edf 59 /// Byte 0x18: Size of the entire FSP binary\r
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60 ///\r
61 UINT32 ImageSize;\r
62 ///\r
9da59186 63 /// Byte 0x1C: FSP binary preferred base address\r
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64 ///\r
65 UINT32 ImageBase;\r
66\r
67\r
68 ///\r
d5fb1edf 69 /// Byte 0x20: Attribute for the FSP binary\r
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70 ///\r
71 UINT32 ImageAttribute;\r
72 ///\r
d5fb1edf 73 /// Byte 0x24: Offset of the FSP configuration region\r
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74 ///\r
75 UINT32 CfgRegionOffset;\r
76 ///\r
9da59186 77 /// Byte 0x28: Size of the FSP configuration region\r
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78 ///\r
79 UINT32 CfgRegionSize;\r
80 ///\r
d5fb1edf 81 /// Byte 0x2C: Number of API entries this FSP supports\r
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82 ///\r
83 UINT32 ApiEntryNum;\r
84\r
85\r
86 ///\r
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87 /// Byte 0x30: The offset for the API to setup a temporary stack till the memory\r
88 /// is initialized.\r
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89 ///\r
90 UINT32 TempRamInitEntryOffset;\r
91 ///\r
d5fb1edf 92 /// Byte 0x34: The offset for the API to initialize the CPU and the chipset (SOC)\r
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93 ///\r
94 UINT32 FspInitEntryOffset;\r
95 ///\r
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96 /// Byte 0x38: The offset for the API to inform the FSP about the different stages\r
97 /// in the boot process\r
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98 ///\r
99 UINT32 NotifyPhaseEntryOffset;\r
d5fb1edf 100\r
a33a2f62 101 ///\r
9da59186 102 /// Below fields are added in FSP Revision 2\r
a33a2f62 103 ///\r
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104\r
105 ///\r
106 /// Byte 0x3C: The offset for the API to initialize the memory\r
107 ///\r
108 UINT32 FspMemoryInitEntryOffset;\r
109 ///\r
110 /// Byte 0x40: The offset for the API to tear down temporary RAM\r
111 ///\r
112 UINT32 TempRamExitEntryOffset;\r
113 ///\r
114 /// Byte 0x44: The offset for the API to initialize the CPU and chipset\r
115 ///\r
116 UINT32 FspSiliconInitEntryOffset;\r
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117\r
118} FSP_INFO_HEADER;\r
119\r
d5fb1edf 120///\r
9da59186 121/// Below structure is added in FSP version 2\r
d5fb1edf 122///\r
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123#define FSP_INFO_EXTENDED_HEADER_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'E')\r
124\r
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125typedef struct {\r
126 ///\r
127 /// Byte 0x00: Signature ('FSPE') for the FSP Extended Information Header\r
128 ///\r
129 UINT32 Signature;\r
130 ///\r
43bfa527 131 /// Byte 0x04: Length of the table in bytes, including all additional FSP producer defined data.\r
d5fb1edf 132 ///\r
43bfa527 133 UINT32 Length;\r
d5fb1edf 134 ///\r
43bfa527 135 /// Byte 0x08: FSP producer defined revision of the table.\r
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136 ///\r
137 UINT8 Revision;\r
138 ///\r
139 /// Byte 0x09: Reserved for future use.\r
140 ///\r
141 UINT8 Reserved;\r
142 ///\r
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143 /// Byte 0x0A: FSP producer identification string \r
144 ///\r
145 CHAR8 FspProducerId[6];\r
146 ///\r
147 /// Byte 0x10: FSP producer implementation revision number. Larger numbers are assumed to be newer revisions.\r
148 ///\r
149 UINT32 FspProducerRevision;\r
150 ///\r
151 /// Byte 0x14: Size of the FSP producer defined data (n) in bytes.\r
d5fb1edf 152 ///\r
43bfa527 153 UINT32 FspProducerDataSize;\r
d5fb1edf 154 ///\r
43bfa527 155 /// Byte 0x18: FSP producer defined data of size (n) defined by FspProducerDataSize.\r
d5fb1edf 156 ///\r
d5fb1edf 157\r
ff6955af 158} FSP_INFO_EXTENDED_HEADER;\r
d5fb1edf 159\r
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160//\r
161// A generic table search algorithm for additional tables can be implemented with a\r
162// signature search algorithm until a terminator signature 'FSPP' is found.\r
163//\r
164#define FSP_FSPP_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'P')\r
165\r
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166#pragma pack()\r
167\r
168#endif\r