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[mirror_edk2.git] / IntelFspPkg / Library / BaseCacheLib / CacheLibInternal.h
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1/** @file\r
2\r
3 Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
4 This program and the accompanying materials\r
5 are licensed and made available under the terms and conditions of the BSD License\r
6 which accompanies this distribution. The full text of the license may be found at\r
7 http://opensource.org/licenses/bsd-license.php.\r
8\r
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
11\r
12**/\r
13\r
14#ifndef _CACHE_LIB_INTERNAL_H_\r
15#define _CACHE_LIB_INTERNAL_H_\r
16\r
17#define EFI_MSR_CACHE_VARIABLE_MTRR_BASE 0x00000200\r
18#define EFI_MSR_CACHE_VARIABLE_MTRR_END 0x0000020F\r
19#define V_EFI_FIXED_MTRR_NUMBER 11\r
20\r
21#define EFI_MSR_IA32_MTRR_FIX64K_00000 0x00000250\r
22#define EFI_MSR_IA32_MTRR_FIX16K_80000 0x00000258\r
23#define EFI_MSR_IA32_MTRR_FIX16K_A0000 0x00000259\r
24#define EFI_MSR_IA32_MTRR_FIX4K_C0000 0x00000268\r
25#define EFI_MSR_IA32_MTRR_FIX4K_C8000 0x00000269\r
26#define EFI_MSR_IA32_MTRR_FIX4K_D0000 0x0000026A\r
27#define EFI_MSR_IA32_MTRR_FIX4K_D8000 0x0000026B\r
28#define EFI_MSR_IA32_MTRR_FIX4K_E0000 0x0000026C\r
29#define EFI_MSR_IA32_MTRR_FIX4K_E8000 0x0000026D\r
30#define EFI_MSR_IA32_MTRR_FIX4K_F0000 0x0000026E\r
31#define EFI_MSR_IA32_MTRR_FIX4K_F8000 0x0000026F\r
32#define EFI_MSR_CACHE_IA32_MTRR_DEF_TYPE 0x000002FF\r
33#define B_EFI_MSR_CACHE_MTRR_VALID BIT11\r
34#define B_EFI_MSR_GLOBAL_MTRR_ENABLE BIT11\r
35#define B_EFI_MSR_FIXED_MTRR_ENABLE BIT10\r
36#define B_EFI_MSR_CACHE_MEMORY_TYPE (BIT2 | BIT1 | BIT0)\r
37\r
38#define EFI_MSR_VALID_MASK 0xFFFFFFFFF\r
39#define EFI_CACHE_VALID_ADDRESS 0xFFFFFF000\r
40#define EFI_SMRR_CACHE_VALID_ADDRESS 0xFFFFF000\r
41#define EFI_CACHE_VALID_EXTENDED_ADDRESS 0xFFFFFFFFFF000\r
42\r
43// Leave one MTRR pairs for OS use\r
44#define EFI_CACHE_NUM_VAR_MTRR_PAIRS_FOR_OS 1\r
45#define EFI_CACHE_LAST_VARIABLE_MTRR_FOR_BIOS (EFI_MSR_CACHE_VARIABLE_MTRR_END) - \\r
46 (EFI_CACHE_NUM_VAR_MTRR_PAIRS_FOR_OS * 2)\r
47\r
48#define EFI_MSR_IA32_MTRR_CAP 0x000000FE\r
49#define B_EFI_MSR_IA32_MTRR_CAP_EMRR_SUPPORT BIT12\r
50#define B_EFI_MSR_IA32_MTRR_CAP_SMRR_SUPPORT BIT11\r
51#define B_EFI_MSR_IA32_MTRR_CAP_WC_SUPPORT BIT10\r
52#define B_EFI_MSR_IA32_MTRR_CAP_FIXED_SUPPORT BIT8\r
53#define B_EFI_MSR_IA32_MTRR_CAP_VARIABLE_SUPPORT (BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0)\r
54\r
55#define CPUID_VIR_PHY_ADDRESS_SIZE 0x80000008\r
56#define CPUID_EXTENDED_FUNCTION 0x80000000\r
57\r
58#endif\r
59\r