projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| a33a2f62 | 1 | /** @file\r |
| d8043ce9 | 2 | This PEIM initialize FSP.\r |
| a33a2f62 | 3 | \r |
| d8043ce9 | 4 | Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r |
| a33a2f62 JY |
5 | This program and the accompanying materials\r |
| 6 | are licensed and made available under the terms and conditions of the BSD License\r | |
| 7 | which accompanies this distribution. The full text of the license may be found at\r | |
| 8 | http://opensource.org/licenses/bsd-license.php.\r | |
| 9 | \r | |
| 10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 12 | \r | |
| 13 | **/\r | |
| 14 | \r | |
| 15 | \r | |
| 16 | #include "FspInitPei.h"\r | |
| 17 | \r | |
| a33a2f62 JY |
18 | /**\r |
| 19 | This is the entrypoint of PEIM\r | |
| 20 | \r | |
| 21 | @param[in] FileHandle Handle of the file being invoked.\r | |
| 22 | @param[in] PeiServices Describes the list of possible PEI Services.\r | |
| 23 | \r | |
| 24 | @retval EFI_SUCCESS if it completed successfully.\r | |
| 25 | **/\r | |
| 26 | EFI_STATUS\r | |
| 27 | EFIAPI\r | |
| 28 | FspPeiEntryPoint (\r | |
| 29 | IN EFI_PEI_FILE_HANDLE FileHandle,\r | |
| 30 | IN CONST EFI_PEI_SERVICES **PeiServices\r | |
| 31 | )\r | |
| 32 | {\r | |
| 33 | FSP_INFO_HEADER *FspHeader;\r | |
| d8043ce9 | 34 | UINT8 PcdFspApiVersion;\r |
| a33a2f62 JY |
35 | \r |
| 36 | DEBUG ((DEBUG_INFO, "FspPeiEntryPoint\n"));\r | |
| d8043ce9 | 37 | PcdFspApiVersion = 1;\r |
| a33a2f62 | 38 | \r |
| d8043ce9 JY |
39 | FspHeader = FspFindFspHeader (PcdGet32 (PcdFlashFvFspBase));\r |
| 40 | DEBUG ((DEBUG_INFO, "FspHeader - 0x%x\n", FspHeader));\r | |
| 41 | if (FspHeader == NULL) {\r | |
| 42 | return EFI_DEVICE_ERROR;\r | |
| 43 | }\r | |
| a33a2f62 | 44 | \r |
| 95c95ac0 JY |
45 | ASSERT (FspHeader->TempRamInitEntryOffset != 0);\r |
| 46 | ASSERT (FspHeader->FspInitEntryOffset != 0);\r | |
| 47 | ASSERT (FspHeader->NotifyPhaseEntryOffset != 0);\r | |
| 48 | \r | |
| d8043ce9 JY |
49 | if ((PcdGet8 (PcdFspApiVersion) >= 2) &&\r |
| 50 | (FspHeader->HeaderRevision >= FSP_HEADER_REVISION_2) &&\r | |
| 95c95ac0 JY |
51 | (FspHeader->ApiEntryNum >= 6) ) {\r |
| 52 | ASSERT (FspHeader->FspMemoryInitEntryOffset != 0);\r | |
| 53 | ASSERT (FspHeader->TempRamExitEntryOffset != 0);\r | |
| 54 | ASSERT (FspHeader->FspSiliconInitEntryOffset != 0);\r | |
| 55 | PcdFspApiVersion = PcdGet8 (PcdFspApiVersion);\r | |
| d8043ce9 JY |
56 | }\r |
| 57 | DEBUG ((DEBUG_INFO, "PcdFspApiVersion - 0x%x\n", PcdFspApiVersion));\r | |
| a33a2f62 | 58 | \r |
| 95c95ac0 | 59 | if (PcdFspApiVersion == 1) {\r |
| d8043ce9 | 60 | PeiFspInitV1 (FspHeader);\r |
| a33a2f62 | 61 | } else {\r |
| d8043ce9 | 62 | PeiFspInitV2 (FspHeader);\r |
| a33a2f62 JY |
63 | }\r |
| 64 | \r | |
| 65 | return EFI_SUCCESS;\r | |
| 66 | }\r |