Update IntelFspPkg according to FSP1.1.
[mirror_edk2.git] / IntelFspWrapperPkg / IntelFspWrapperPkg.dec
CommitLineData
a33a2f62 1## @file\r
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2# Provides drivers and definitions to support fsp in EDKII bios.\r
3#\r
b0446065 4# Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
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5# This program and the accompanying materials are licensed and made available under\r
6# the terms and conditions of the BSD License that accompanies this distribution.\r
7# The full text of the license may be found at\r
8# http://opensource.org/licenses/bsd-license.php.\r
9#\r
10# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12#\r
13##\r
14\r
15[Defines]\r
16 DEC_SPECIFICATION = 0x00010005\r
17 PACKAGE_NAME = IntelFspWrapperPkg\r
18 PACKAGE_GUID = 99101BB6-6DE1-4537-85A3-FD6B594F7468\r
19 PACKAGE_VERSION = 0.1\r
20\r
21[Includes]\r
22 Include\r
23\r
24[LibraryClasses]\r
25\r
26[Guids]\r
27 #\r
28 # GUID defined in package\r
29 #\r
30 gFspWrapperTokenSpaceGuid = {0x2bc1c74a, 0x122f, 0x40b2, { 0xb2, 0x23, 0x8, 0x2b, 0x74, 0x65, 0x22, 0x5d } }\r
31\r
a33a2f62 32[Ppis]\r
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33 gFspInitDonePpiGuid = { 0xf5ef05e4, 0xd538, 0x4774, { 0x8f, 0x1b, 0xe9, 0x77, 0x30, 0x11, 0xe0, 0x38 } }\r
34 gTopOfTemporaryRamPpiGuid = { 0x2f3962b2, 0x57c5, 0x44ec, { 0x9e, 0xfc, 0xa6, 0x9f, 0xd3, 0x02, 0x03, 0x2b } }\r
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35\r
36[Protocols]\r
37\r
38################################################################################\r
39#\r
40# PCD Declarations section - list of all PCDs Declared by this Package\r
41# Only this package should be providing the\r
42# declaration, other packages should not.\r
43#\r
44################################################################################\r
45[PcdsFixedAtBuild, PcdsPatchableInModule]\r
46 ## Provides the memory mapped base address of the BIOS CodeCache Flash Device.\r
47 gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress|0xFFE00000|UINT32|0x10000001\r
48 ## Provides the size of the BIOS Flash Device.\r
49 gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00200000|UINT32|0x10000002\r
50\r
51 ## Indicates the base address of the FSP binary.\r
52 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFF80000|UINT32|0x10000003\r
53 ## Provides the size of the FSP binary.\r
54 gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize|0x00048000|UINT32|0x10000004\r
55\r
56 ## Indicates the base address of the first Microcode Patch in the Microcode Region\r
57 gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x10000005\r
58 gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x10000006\r
59 ## Indicates the offset of the Cpu Microcode.\r
60 gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset|0x90|UINT32|0x10000007\r
61\r
62 ##\r
63 # Maximum number of Ppi is provided by SecCore.\r
64 ##\r
65 gFspWrapperTokenSpaceGuid.PcdSecCoreMaxPpiSupported|0x6|UINT32|0x20000001\r
66\r
67 # This is MAX UPD region size\r
68 gFspWrapperTokenSpaceGuid.PcdMaxUpdRegionSize|0x200|UINT32|0x30000001\r
69\r
70 ## Stack size in the temporary RAM.\r
71 # 0 means half of TemporaryRamSize.\r
72 gFspWrapperTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0|UINT32|0x40000001\r
73\r
74 # This is temporary DRAM base and size for StackTop in FspInit\r
75 gFspWrapperTokenSpaceGuid.PcdTemporaryRamBase|0x00080000|UINT32|0x40000002\r
76 gFspWrapperTokenSpaceGuid.PcdTemporaryRamSize|0x00010000|UINT32|0x40000003\r
77\r
78 ## Indicate the PEI memory size platform want to report\r
79 gFspWrapperTokenSpaceGuid.PcdPeiMinMemSize|0x1800000|UINT32|0x40000004\r
80 ## Indicate the PEI memory size platform want to report\r
81 gFspWrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UINT32|0x40000005\r